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[mirror_ubuntu-artful-kernel.git] / drivers / xen / events / events_base.c
CommitLineData
e46cdb66
JF
1/*
2 * Xen event channels
3 *
4 * Xen models interrupts with abstract event channels. Because each
5 * domain gets 1024 event channels, but NR_IRQ is not that large, we
6 * must dynamically map irqs<->event channels. The event channels
7 * interface with the rest of the kernel by defining a xen interrupt
25985edc 8 * chip. When an event is received, it is mapped to an irq and sent
e46cdb66
JF
9 * through the normal interrupt processing path.
10 *
11 * There are four kinds of events which can be mapped to an event
12 * channel:
13 *
14 * 1. Inter-domain notifications. This includes all the virtual
15 * device events, since they're driven by front-ends in another domain
16 * (typically dom0).
17 * 2. VIRQs, typically used for timers. These are per-cpu events.
18 * 3. IPIs.
d46a78b0 19 * 4. PIRQs - Hardware interrupts.
e46cdb66
JF
20 *
21 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
22 */
23
283c0972
JP
24#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
25
e46cdb66
JF
26#include <linux/linkage.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
59aa56bf 29#include <linux/moduleparam.h>
e46cdb66 30#include <linux/string.h>
28e08861 31#include <linux/bootmem.h>
5a0e3ad6 32#include <linux/slab.h>
b21ddbf5 33#include <linux/irqnr.h>
f731e3ef 34#include <linux/pci.h>
e46cdb66 35
0ec53ecf 36#ifdef CONFIG_X86
38e20b07 37#include <asm/desc.h>
e46cdb66
JF
38#include <asm/ptrace.h>
39#include <asm/irq.h>
0794bfc7 40#include <asm/io_apic.h>
b4ff8389 41#include <asm/i8259.h>
42a1de56 42#include <asm/xen/pci.h>
0ec53ecf
SS
43#endif
44#include <asm/sync_bitops.h>
e46cdb66 45#include <asm/xen/hypercall.h>
8d1b8753 46#include <asm/xen/hypervisor.h>
a001c9d9 47#include <xen/page.h>
e46cdb66 48
38e20b07
SY
49#include <xen/xen.h>
50#include <xen/hvm.h>
e04d0d07 51#include <xen/xen-ops.h>
e46cdb66
JF
52#include <xen/events.h>
53#include <xen/interface/xen.h>
54#include <xen/interface/event_channel.h>
38e20b07
SY
55#include <xen/interface/hvm/hvm_op.h>
56#include <xen/interface/hvm/params.h>
0ec53ecf
SS
57#include <xen/interface/physdev.h>
58#include <xen/interface/sched.h>
6efa20e4 59#include <xen/interface/vcpu.h>
0ec53ecf 60#include <asm/hw_irq.h>
e46cdb66 61
9a489f45
DV
62#include "events_internal.h"
63
ab9a1cca
DV
64const struct evtchn_ops *evtchn_ops;
65
e46cdb66
JF
66/*
67 * This lock protects updates to the following mapping and reference-count
68 * arrays. The lock does not need to be acquired to read the mapping tables.
69 */
77365948 70static DEFINE_MUTEX(irq_mapping_update_lock);
e46cdb66 71
6cb6537d
IC
72static LIST_HEAD(xen_irq_list_head);
73
e46cdb66 74/* IRQ <-> VIRQ mapping. */
204fba4a 75static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
e46cdb66 76
f87e4cac 77/* IRQ <-> IPI mapping */
204fba4a 78static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
f87e4cac 79
d0b075ff 80int **evtchn_to_irq;
bf86ad80 81#ifdef CONFIG_X86
9846ff10 82static unsigned long *pirq_eoi_map;
bf86ad80 83#endif
9846ff10 84static bool (*pirq_needs_eoi)(unsigned irq);
3b32f574 85
d0b075ff
DV
86#define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
87#define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
88#define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
89
e46cdb66
JF
90/* Xen will never allocate port zero for any purpose. */
91#define VALID_EVTCHN(chn) ((chn) != 0)
92
e46cdb66 93static struct irq_chip xen_dynamic_chip;
aaca4964 94static struct irq_chip xen_percpu_chip;
d46a78b0 95static struct irq_chip xen_pirq_chip;
7e186bdd
SS
96static void enable_dynirq(struct irq_data *data);
97static void disable_dynirq(struct irq_data *data);
e46cdb66 98
d0b075ff
DV
99static void clear_evtchn_to_irq_row(unsigned row)
100{
101 unsigned col;
102
103 for (col = 0; col < EVTCHN_PER_ROW; col++)
104 evtchn_to_irq[row][col] = -1;
105}
106
107static void clear_evtchn_to_irq_all(void)
108{
109 unsigned row;
110
111 for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
112 if (evtchn_to_irq[row] == NULL)
113 continue;
114 clear_evtchn_to_irq_row(row);
115 }
116}
117
118static int set_evtchn_to_irq(unsigned evtchn, unsigned irq)
119{
120 unsigned row;
121 unsigned col;
122
123 if (evtchn >= xen_evtchn_max_channels())
124 return -EINVAL;
125
126 row = EVTCHN_ROW(evtchn);
127 col = EVTCHN_COL(evtchn);
128
129 if (evtchn_to_irq[row] == NULL) {
130 /* Unallocated irq entries return -1 anyway */
131 if (irq == -1)
132 return 0;
133
134 evtchn_to_irq[row] = (int *)get_zeroed_page(GFP_KERNEL);
135 if (evtchn_to_irq[row] == NULL)
136 return -ENOMEM;
137
138 clear_evtchn_to_irq_row(row);
139 }
140
141 evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)] = irq;
142 return 0;
143}
144
145int get_evtchn_to_irq(unsigned evtchn)
146{
147 if (evtchn >= xen_evtchn_max_channels())
148 return -1;
149 if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
150 return -1;
151 return evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)];
152}
153
9158c358 154/* Get info for IRQ */
9a489f45 155struct irq_info *info_for_irq(unsigned irq)
ced40d0f 156{
c442b806 157 return irq_get_handler_data(irq);
ced40d0f
JF
158}
159
9158c358 160/* Constructors for packed IRQ information. */
96d4c588 161static int xen_irq_info_common_setup(struct irq_info *info,
3d4cfa37 162 unsigned irq,
9158c358 163 enum xen_irq_type type,
d0b075ff 164 unsigned evtchn,
9158c358 165 unsigned short cpu)
ced40d0f 166{
d0b075ff 167 int ret;
9158c358
IC
168
169 BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
170
171 info->type = type;
6cb6537d 172 info->irq = irq;
9158c358
IC
173 info->evtchn = evtchn;
174 info->cpu = cpu;
3d4cfa37 175
d0b075ff
DV
176 ret = set_evtchn_to_irq(evtchn, irq);
177 if (ret < 0)
178 return ret;
934f585e
JG
179
180 irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
96d4c588 181
08385875 182 return xen_evtchn_port_setup(info);
ced40d0f
JF
183}
184
96d4c588 185static int xen_irq_info_evtchn_setup(unsigned irq,
d0b075ff 186 unsigned evtchn)
ced40d0f 187{
9158c358
IC
188 struct irq_info *info = info_for_irq(irq);
189
96d4c588 190 return xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0);
ced40d0f
JF
191}
192
96d4c588 193static int xen_irq_info_ipi_setup(unsigned cpu,
3d4cfa37 194 unsigned irq,
d0b075ff 195 unsigned evtchn,
9158c358 196 enum ipi_vector ipi)
e46cdb66 197{
9158c358
IC
198 struct irq_info *info = info_for_irq(irq);
199
9158c358 200 info->u.ipi = ipi;
3d4cfa37
IC
201
202 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
96d4c588
DV
203
204 return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0);
ced40d0f
JF
205}
206
96d4c588 207static int xen_irq_info_virq_setup(unsigned cpu,
3d4cfa37 208 unsigned irq,
d0b075ff
DV
209 unsigned evtchn,
210 unsigned virq)
ced40d0f 211{
9158c358
IC
212 struct irq_info *info = info_for_irq(irq);
213
9158c358 214 info->u.virq = virq;
3d4cfa37
IC
215
216 per_cpu(virq_to_irq, cpu)[virq] = irq;
96d4c588
DV
217
218 return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0);
ced40d0f
JF
219}
220
96d4c588 221static int xen_irq_info_pirq_setup(unsigned irq,
d0b075ff
DV
222 unsigned evtchn,
223 unsigned pirq,
224 unsigned gsi,
beafbdc1 225 uint16_t domid,
9158c358 226 unsigned char flags)
ced40d0f 227{
9158c358
IC
228 struct irq_info *info = info_for_irq(irq);
229
9158c358
IC
230 info->u.pirq.pirq = pirq;
231 info->u.pirq.gsi = gsi;
beafbdc1 232 info->u.pirq.domid = domid;
9158c358 233 info->u.pirq.flags = flags;
96d4c588
DV
234
235 return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0);
e46cdb66
JF
236}
237
d0b075ff
DV
238static void xen_irq_info_cleanup(struct irq_info *info)
239{
240 set_evtchn_to_irq(info->evtchn, -1);
241 info->evtchn = 0;
242}
243
e46cdb66
JF
244/*
245 * Accessors for packed IRQ information.
246 */
9a489f45 247unsigned int evtchn_from_irq(unsigned irq)
e46cdb66 248{
474b8fea 249 if (unlikely(WARN(irq >= nr_irqs, "Invalid irq %d!\n", irq)))
110e7c7e
JJ
250 return 0;
251
ced40d0f 252 return info_for_irq(irq)->evtchn;
e46cdb66
JF
253}
254
d4c04536
IC
255unsigned irq_from_evtchn(unsigned int evtchn)
256{
d0b075ff 257 return get_evtchn_to_irq(evtchn);
d4c04536
IC
258}
259EXPORT_SYMBOL_GPL(irq_from_evtchn);
260
9a489f45
DV
261int irq_from_virq(unsigned int cpu, unsigned int virq)
262{
263 return per_cpu(virq_to_irq, cpu)[virq];
264}
265
ced40d0f 266static enum ipi_vector ipi_from_irq(unsigned irq)
e46cdb66 267{
ced40d0f
JF
268 struct irq_info *info = info_for_irq(irq);
269
270 BUG_ON(info == NULL);
271 BUG_ON(info->type != IRQT_IPI);
272
273 return info->u.ipi;
274}
275
276static unsigned virq_from_irq(unsigned irq)
277{
278 struct irq_info *info = info_for_irq(irq);
279
280 BUG_ON(info == NULL);
281 BUG_ON(info->type != IRQT_VIRQ);
282
283 return info->u.virq;
284}
285
7a043f11
SS
286static unsigned pirq_from_irq(unsigned irq)
287{
288 struct irq_info *info = info_for_irq(irq);
289
290 BUG_ON(info == NULL);
291 BUG_ON(info->type != IRQT_PIRQ);
292
293 return info->u.pirq.pirq;
294}
295
ced40d0f
JF
296static enum xen_irq_type type_from_irq(unsigned irq)
297{
298 return info_for_irq(irq)->type;
299}
300
9a489f45 301unsigned cpu_from_irq(unsigned irq)
ced40d0f
JF
302{
303 return info_for_irq(irq)->cpu;
304}
305
9a489f45 306unsigned int cpu_from_evtchn(unsigned int evtchn)
ced40d0f 307{
d0b075ff 308 int irq = get_evtchn_to_irq(evtchn);
ced40d0f
JF
309 unsigned ret = 0;
310
311 if (irq != -1)
312 ret = cpu_from_irq(irq);
313
314 return ret;
e46cdb66
JF
315}
316
bf86ad80 317#ifdef CONFIG_X86
9846ff10 318static bool pirq_check_eoi_map(unsigned irq)
d46a78b0 319{
521394e4 320 return test_bit(pirq_from_irq(irq), pirq_eoi_map);
9846ff10 321}
bf86ad80 322#endif
d46a78b0 323
9846ff10
SS
324static bool pirq_needs_eoi_flag(unsigned irq)
325{
326 struct irq_info *info = info_for_irq(irq);
d46a78b0
JF
327 BUG_ON(info->type != IRQT_PIRQ);
328
329 return info->u.pirq.flags & PIRQ_NEEDS_EOI;
330}
331
e46cdb66
JF
332static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
333{
d0b075ff 334 int irq = get_evtchn_to_irq(chn);
9a489f45 335 struct irq_info *info = info_for_irq(irq);
e46cdb66
JF
336
337 BUG_ON(irq == -1);
338#ifdef CONFIG_SMP
c149e4cd 339 cpumask_copy(irq_get_affinity_mask(irq), cpumask_of(cpu));
e46cdb66 340#endif
9a489f45 341 xen_evtchn_port_bind_to_cpu(info, cpu);
168d2f46 342
9a489f45 343 info->cpu = cpu;
3f70fa82
WL
344}
345
fd21069d
DV
346static void xen_evtchn_mask_all(void)
347{
348 unsigned int evtchn;
349
350 for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
351 mask_evtchn(evtchn);
352}
353
e46cdb66
JF
354/**
355 * notify_remote_via_irq - send event to remote end of event channel via irq
356 * @irq: irq of event channel to send event to
357 *
358 * Unlike notify_remote_via_evtchn(), this is safe to use across
359 * save/restore. Notifications on a broken connection are silently
360 * dropped.
361 */
362void notify_remote_via_irq(int irq)
363{
364 int evtchn = evtchn_from_irq(irq);
365
366 if (VALID_EVTCHN(evtchn))
367 notify_remote_via_evtchn(evtchn);
368}
369EXPORT_SYMBOL_GPL(notify_remote_via_irq);
370
6cb6537d
IC
371static void xen_irq_init(unsigned irq)
372{
373 struct irq_info *info;
b5328cd1 374#ifdef CONFIG_SMP
6cb6537d 375 /* By default all event channels notify CPU#0. */
c149e4cd 376 cpumask_copy(irq_get_affinity_mask(irq), cpumask_of(0));
44626e4a 377#endif
6cb6537d 378
ca62ce8c
IC
379 info = kzalloc(sizeof(*info), GFP_KERNEL);
380 if (info == NULL)
381 panic("Unable to allocate metadata for IRQ%d\n", irq);
6cb6537d
IC
382
383 info->type = IRQT_UNBOUND;
420eb554 384 info->refcnt = -1;
6cb6537d 385
c442b806 386 irq_set_handler_data(irq, info);
ca62ce8c 387
6cb6537d
IC
388 list_add_tail(&info->list, &xen_irq_list_head);
389}
390
4892c9b4 391static int __must_check xen_allocate_irqs_dynamic(int nvec)
0794bfc7 392{
d07c9f18 393 int i, irq = irq_alloc_descs(-1, 0, nvec, -1);
3a69e916 394
4892c9b4
RPM
395 if (irq >= 0) {
396 for (i = 0; i < nvec; i++)
397 xen_irq_init(irq + i);
398 }
ced40d0f 399
e46cdb66 400 return irq;
d46a78b0
JF
401}
402
4892c9b4
RPM
403static inline int __must_check xen_allocate_irq_dynamic(void)
404{
405
406 return xen_allocate_irqs_dynamic(1);
407}
408
7bee9768 409static int __must_check xen_allocate_irq_gsi(unsigned gsi)
c9df1ce5
IC
410{
411 int irq;
412
89911501
IC
413 /*
414 * A PV guest has no concept of a GSI (since it has no ACPI
415 * nor access to/knowledge of the physical APICs). Therefore
416 * all IRQs are dynamically allocated from the entire IRQ
417 * space.
418 */
419 if (xen_pv_domain() && !xen_initial_domain())
c9df1ce5
IC
420 return xen_allocate_irq_dynamic();
421
422 /* Legacy IRQ descriptors are already allocated by the arch. */
b4ff8389 423 if (gsi < nr_legacy_irqs())
6cb6537d
IC
424 irq = gsi;
425 else
426 irq = irq_alloc_desc_at(gsi, -1);
c9df1ce5 427
6cb6537d 428 xen_irq_init(irq);
c9df1ce5
IC
429
430 return irq;
431}
432
433static void xen_free_irq(unsigned irq)
434{
c442b806 435 struct irq_info *info = irq_get_handler_data(irq);
6cb6537d 436
94032c50
KRW
437 if (WARN_ON(!info))
438 return;
439
6cb6537d 440 list_del(&info->list);
9158c358 441
c442b806 442 irq_set_handler_data(irq, NULL);
ca62ce8c 443
420eb554
DDG
444 WARN_ON(info->refcnt > 0);
445
ca62ce8c
IC
446 kfree(info);
447
72146104 448 /* Legacy IRQ descriptors are managed by the arch. */
b4ff8389 449 if (irq < nr_legacy_irqs())
72146104
IC
450 return;
451
c9df1ce5
IC
452 irq_free_desc(irq);
453}
454
d0b075ff
DV
455static void xen_evtchn_close(unsigned int port)
456{
457 struct evtchn_close close;
458
459 close.port = port;
460 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
461 BUG();
d0b075ff
DV
462}
463
d46a78b0
JF
464static void pirq_query_unmask(int irq)
465{
466 struct physdev_irq_status_query irq_status;
467 struct irq_info *info = info_for_irq(irq);
468
469 BUG_ON(info->type != IRQT_PIRQ);
470
7a043f11 471 irq_status.irq = pirq_from_irq(irq);
d46a78b0
JF
472 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
473 irq_status.flags = 0;
474
475 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
476 if (irq_status.flags & XENIRQSTAT_needs_eoi)
477 info->u.pirq.flags |= PIRQ_NEEDS_EOI;
478}
479
7e186bdd
SS
480static void eoi_pirq(struct irq_data *data)
481{
482 int evtchn = evtchn_from_irq(data->irq);
483 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
484 int rc = 0;
485
ff1e22e7
BO
486 if (!VALID_EVTCHN(evtchn))
487 return;
7e186bdd 488
f0f39387
RL
489 if (unlikely(irqd_is_setaffinity_pending(data)) &&
490 likely(!irqd_irq_disabled(data))) {
ff1e22e7
BO
491 int masked = test_and_set_mask(evtchn);
492
493 clear_evtchn(evtchn);
494
495 irq_move_masked_irq(data);
496
497 if (!masked)
498 unmask_evtchn(evtchn);
499 } else
7e186bdd
SS
500 clear_evtchn(evtchn);
501
502 if (pirq_needs_eoi(data->irq)) {
503 rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
504 WARN_ON(rc);
505 }
506}
507
508static void mask_ack_pirq(struct irq_data *data)
509{
510 disable_dynirq(data);
511 eoi_pirq(data);
512}
513
c9e265e0 514static unsigned int __startup_pirq(unsigned int irq)
d46a78b0
JF
515{
516 struct evtchn_bind_pirq bind_pirq;
517 struct irq_info *info = info_for_irq(irq);
518 int evtchn = evtchn_from_irq(irq);
15ebbb82 519 int rc;
d46a78b0
JF
520
521 BUG_ON(info->type != IRQT_PIRQ);
522
523 if (VALID_EVTCHN(evtchn))
524 goto out;
525
7a043f11 526 bind_pirq.pirq = pirq_from_irq(irq);
d46a78b0 527 /* NB. We are happy to share unless we are probing. */
15ebbb82
KRW
528 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
529 BIND_PIRQ__WILL_SHARE : 0;
530 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
531 if (rc != 0) {
02893afd 532 pr_warn("Failed to obtain physical IRQ %d\n", irq);
d46a78b0
JF
533 return 0;
534 }
535 evtchn = bind_pirq.port;
536
537 pirq_query_unmask(irq);
538
d0b075ff 539 rc = set_evtchn_to_irq(evtchn, irq);
85e40b05
JG
540 if (rc)
541 goto err;
542
d46a78b0 543 info->evtchn = evtchn;
16e6bd59 544 bind_evtchn_to_cpu(evtchn, 0);
d46a78b0 545
85e40b05
JG
546 rc = xen_evtchn_port_setup(info);
547 if (rc)
548 goto err;
549
d46a78b0
JF
550out:
551 unmask_evtchn(evtchn);
7e186bdd 552 eoi_pirq(irq_get_irq_data(irq));
d46a78b0
JF
553
554 return 0;
85e40b05
JG
555
556err:
557 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc);
558 xen_evtchn_close(evtchn);
559 return 0;
d46a78b0
JF
560}
561
c9e265e0
TG
562static unsigned int startup_pirq(struct irq_data *data)
563{
564 return __startup_pirq(data->irq);
565}
566
567static void shutdown_pirq(struct irq_data *data)
d46a78b0 568{
c9e265e0 569 unsigned int irq = data->irq;
d46a78b0 570 struct irq_info *info = info_for_irq(irq);
d0b075ff 571 unsigned evtchn = evtchn_from_irq(irq);
d46a78b0
JF
572
573 BUG_ON(info->type != IRQT_PIRQ);
574
575 if (!VALID_EVTCHN(evtchn))
576 return;
577
578 mask_evtchn(evtchn);
d0b075ff
DV
579 xen_evtchn_close(evtchn);
580 xen_irq_info_cleanup(info);
d46a78b0
JF
581}
582
c9e265e0 583static void enable_pirq(struct irq_data *data)
d46a78b0 584{
c9e265e0 585 startup_pirq(data);
d46a78b0
JF
586}
587
c9e265e0 588static void disable_pirq(struct irq_data *data)
d46a78b0 589{
7e186bdd 590 disable_dynirq(data);
d46a78b0
JF
591}
592
68c2c39a 593int xen_irq_from_gsi(unsigned gsi)
d46a78b0 594{
6cb6537d 595 struct irq_info *info;
d46a78b0 596
6cb6537d
IC
597 list_for_each_entry(info, &xen_irq_list_head, list) {
598 if (info->type != IRQT_PIRQ)
d46a78b0
JF
599 continue;
600
6cb6537d
IC
601 if (info->u.pirq.gsi == gsi)
602 return info->irq;
d46a78b0
JF
603 }
604
605 return -1;
606}
68c2c39a 607EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
d46a78b0 608
96d4c588
DV
609static void __unbind_from_irq(unsigned int irq)
610{
96d4c588
DV
611 int evtchn = evtchn_from_irq(irq);
612 struct irq_info *info = irq_get_handler_data(irq);
613
614 if (info->refcnt > 0) {
615 info->refcnt--;
616 if (info->refcnt != 0)
617 return;
618 }
619
620 if (VALID_EVTCHN(evtchn)) {
d0b075ff
DV
621 unsigned int cpu = cpu_from_irq(irq);
622
623 xen_evtchn_close(evtchn);
96d4c588
DV
624
625 switch (type_from_irq(irq)) {
626 case IRQT_VIRQ:
d0b075ff 627 per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1;
96d4c588
DV
628 break;
629 case IRQT_IPI:
d0b075ff 630 per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1;
96d4c588
DV
631 break;
632 default:
633 break;
634 }
635
d0b075ff 636 xen_irq_info_cleanup(info);
96d4c588
DV
637 }
638
639 BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
640
641 xen_free_irq(irq);
642}
643
653378ac
IC
644/*
645 * Do not make any assumptions regarding the relationship between the
646 * IRQ number returned here and the Xen pirq argument.
7a043f11
SS
647 *
648 * Note: We don't assign an event channel until the irq actually started
649 * up. Return an existing irq if we've already got one for the gsi.
e5ac0bda
SS
650 *
651 * Shareable implies level triggered, not shareable implies edge
652 * triggered here.
d46a78b0 653 */
f4d0635b
IC
654int xen_bind_pirq_gsi_to_irq(unsigned gsi,
655 unsigned pirq, int shareable, char *name)
d46a78b0 656{
a0e18116 657 int irq = -1;
d46a78b0 658 struct physdev_irq irq_op;
96d4c588 659 int ret;
d46a78b0 660
77365948 661 mutex_lock(&irq_mapping_update_lock);
d46a78b0 662
68c2c39a 663 irq = xen_irq_from_gsi(gsi);
d46a78b0 664 if (irq != -1) {
283c0972
JP
665 pr_info("%s: returning irq %d for gsi %u\n",
666 __func__, irq, gsi);
420eb554 667 goto out;
d46a78b0
JF
668 }
669
c9df1ce5 670 irq = xen_allocate_irq_gsi(gsi);
7bee9768
IC
671 if (irq < 0)
672 goto out;
d46a78b0 673
d46a78b0 674 irq_op.irq = irq;
b5401a96
AN
675 irq_op.vector = 0;
676
677 /* Only the privileged domain can do this. For non-priv, the pcifront
678 * driver provides a PCI bus that does the call to do exactly
679 * this in the priv domain. */
680 if (xen_initial_domain() &&
681 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
c9df1ce5 682 xen_free_irq(irq);
d46a78b0
JF
683 irq = -ENOSPC;
684 goto out;
685 }
686
96d4c588 687 ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF,
9158c358 688 shareable ? PIRQ_SHAREABLE : 0);
96d4c588
DV
689 if (ret < 0) {
690 __unbind_from_irq(irq);
691 irq = ret;
692 goto out;
693 }
d46a78b0 694
7e186bdd
SS
695 pirq_query_unmask(irq);
696 /* We try to use the handler with the appropriate semantic for the
e5ac0bda
SS
697 * type of interrupt: if the interrupt is an edge triggered
698 * interrupt we use handle_edge_irq.
7e186bdd 699 *
e5ac0bda
SS
700 * On the other hand if the interrupt is level triggered we use
701 * handle_fasteoi_irq like the native code does for this kind of
7e186bdd 702 * interrupts.
e5ac0bda 703 *
7e186bdd
SS
704 * Depending on the Xen version, pirq_needs_eoi might return true
705 * not only for level triggered interrupts but for edge triggered
706 * interrupts too. In any case Xen always honors the eoi mechanism,
707 * not injecting any more pirqs of the same kind if the first one
708 * hasn't received an eoi yet. Therefore using the fasteoi handler
709 * is the right choice either way.
710 */
e5ac0bda 711 if (shareable)
7e186bdd
SS
712 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
713 handle_fasteoi_irq, name);
714 else
715 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
716 handle_edge_irq, name);
717
d46a78b0 718out:
77365948 719 mutex_unlock(&irq_mapping_update_lock);
d46a78b0
JF
720
721 return irq;
722}
723
f731e3ef 724#ifdef CONFIG_PCI_MSI
bf480d95 725int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
cbf6aa89 726{
5cad61a6 727 int rc;
cbf6aa89 728 struct physdev_get_free_pirq op_get_free_pirq;
cbf6aa89 729
bf480d95 730 op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
cbf6aa89 731 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
cbf6aa89 732
5cad61a6
IC
733 WARN_ONCE(rc == -ENOSYS,
734 "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
735
736 return rc ? -1 : op_get_free_pirq.pirq;
cbf6aa89
IC
737}
738
bf480d95 739int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
4892c9b4 740 int pirq, int nvec, const char *name, domid_t domid)
809f9267 741{
4892c9b4 742 int i, irq, ret;
4b41df7f 743
77365948 744 mutex_lock(&irq_mapping_update_lock);
809f9267 745
4892c9b4 746 irq = xen_allocate_irqs_dynamic(nvec);
e6599225 747 if (irq < 0)
bb5d079a 748 goto out;
809f9267 749
4892c9b4
RPM
750 for (i = 0; i < nvec; i++) {
751 irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name);
752
753 ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid,
754 i == 0 ? 0 : PIRQ_MSI_GROUP);
755 if (ret < 0)
756 goto error_irq;
757 }
809f9267 758
5f6fb454 759 ret = irq_set_msi_desc(irq, msidesc);
bf480d95
IC
760 if (ret < 0)
761 goto error_irq;
809f9267 762out:
77365948 763 mutex_unlock(&irq_mapping_update_lock);
4b41df7f 764 return irq;
bf480d95 765error_irq:
4892c9b4
RPM
766 for (; i >= 0; i--)
767 __unbind_from_irq(irq + i);
77365948 768 mutex_unlock(&irq_mapping_update_lock);
e6599225 769 return ret;
809f9267 770}
f731e3ef
QH
771#endif
772
b5401a96
AN
773int xen_destroy_irq(int irq)
774{
38aa66fc
JF
775 struct physdev_unmap_pirq unmap_irq;
776 struct irq_info *info = info_for_irq(irq);
b5401a96
AN
777 int rc = -ENOENT;
778
77365948 779 mutex_lock(&irq_mapping_update_lock);
b5401a96 780
4892c9b4
RPM
781 /*
782 * If trying to remove a vector in a MSI group different
783 * than the first one skip the PIRQ unmap unless this vector
784 * is the first one in the group.
785 */
786 if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) {
12334715 787 unmap_irq.pirq = info->u.pirq.pirq;
beafbdc1 788 unmap_irq.domid = info->u.pirq.domid;
38aa66fc 789 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
1eff1ad0
KRW
790 /* If another domain quits without making the pci_disable_msix
791 * call, the Xen hypervisor takes care of freeing the PIRQs
792 * (free_domain_pirqs).
793 */
794 if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
283c0972 795 pr_info("domain %d does not have %d anymore\n",
1eff1ad0
KRW
796 info->u.pirq.domid, info->u.pirq.pirq);
797 else if (rc) {
283c0972 798 pr_warn("unmap irq failed %d\n", rc);
38aa66fc
JF
799 goto out;
800 }
801 }
b5401a96 802
c9df1ce5 803 xen_free_irq(irq);
b5401a96
AN
804
805out:
77365948 806 mutex_unlock(&irq_mapping_update_lock);
b5401a96
AN
807 return rc;
808}
809
af42b8d1 810int xen_irq_from_pirq(unsigned pirq)
d46a78b0 811{
69c358ce 812 int irq;
d46a78b0 813
69c358ce 814 struct irq_info *info;
e46cdb66 815
77365948 816 mutex_lock(&irq_mapping_update_lock);
69c358ce
IC
817
818 list_for_each_entry(info, &xen_irq_list_head, list) {
9bb9efe4 819 if (info->type != IRQT_PIRQ)
69c358ce
IC
820 continue;
821 irq = info->irq;
822 if (info->u.pirq.pirq == pirq)
823 goto out;
824 }
825 irq = -1;
826out:
77365948 827 mutex_unlock(&irq_mapping_update_lock);
69c358ce
IC
828
829 return irq;
af42b8d1
SS
830}
831
e6197acc
KRW
832
833int xen_pirq_from_irq(unsigned irq)
834{
835 return pirq_from_irq(irq);
836}
837EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
96d4c588 838
b536b4b9 839int bind_evtchn_to_irq(unsigned int evtchn)
e46cdb66
JF
840{
841 int irq;
96d4c588 842 int ret;
e46cdb66 843
d0b075ff
DV
844 if (evtchn >= xen_evtchn_max_channels())
845 return -ENOMEM;
846
77365948 847 mutex_lock(&irq_mapping_update_lock);
e46cdb66 848
d0b075ff 849 irq = get_evtchn_to_irq(evtchn);
e46cdb66
JF
850
851 if (irq == -1) {
c9df1ce5 852 irq = xen_allocate_irq_dynamic();
68ba45ff 853 if (irq < 0)
7bee9768 854 goto out;
e46cdb66 855
c442b806 856 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
7e186bdd 857 handle_edge_irq, "event");
e46cdb66 858
96d4c588
DV
859 ret = xen_irq_info_evtchn_setup(irq, evtchn);
860 if (ret < 0) {
861 __unbind_from_irq(irq);
862 irq = ret;
863 goto out;
864 }
97253eee
DV
865 /* New interdomain events are bound to VCPU 0. */
866 bind_evtchn_to_cpu(evtchn, 0);
5e152e6c
KRW
867 } else {
868 struct irq_info *info = info_for_irq(irq);
869 WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
e46cdb66
JF
870 }
871
7bee9768 872out:
77365948 873 mutex_unlock(&irq_mapping_update_lock);
e46cdb66
JF
874
875 return irq;
876}
b536b4b9 877EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
e46cdb66 878
f87e4cac
JF
879static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
880{
881 struct evtchn_bind_ipi bind_ipi;
882 int evtchn, irq;
96d4c588 883 int ret;
f87e4cac 884
77365948 885 mutex_lock(&irq_mapping_update_lock);
f87e4cac
JF
886
887 irq = per_cpu(ipi_to_irq, cpu)[ipi];
90af9514 888
f87e4cac 889 if (irq == -1) {
c9df1ce5 890 irq = xen_allocate_irq_dynamic();
f87e4cac
JF
891 if (irq < 0)
892 goto out;
893
c442b806 894 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
aaca4964 895 handle_percpu_irq, "ipi");
f87e4cac 896
8058c0b8 897 bind_ipi.vcpu = xen_vcpu_nr(cpu);
f87e4cac
JF
898 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
899 &bind_ipi) != 0)
900 BUG();
901 evtchn = bind_ipi.port;
902
96d4c588
DV
903 ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
904 if (ret < 0) {
905 __unbind_from_irq(irq);
906 irq = ret;
907 goto out;
908 }
f87e4cac 909 bind_evtchn_to_cpu(evtchn, cpu);
5e152e6c
KRW
910 } else {
911 struct irq_info *info = info_for_irq(irq);
912 WARN_ON(info == NULL || info->type != IRQT_IPI);
f87e4cac
JF
913 }
914
f87e4cac 915 out:
77365948 916 mutex_unlock(&irq_mapping_update_lock);
f87e4cac
JF
917 return irq;
918}
919
854072dd
JG
920int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
921 unsigned int remote_port)
2e820f58
IC
922{
923 struct evtchn_bind_interdomain bind_interdomain;
924 int err;
925
926 bind_interdomain.remote_dom = remote_domain;
927 bind_interdomain.remote_port = remote_port;
928
929 err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
930 &bind_interdomain);
931
932 return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
933}
854072dd 934EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq);
2e820f58 935
62cc5fc7
OH
936static int find_virq(unsigned int virq, unsigned int cpu)
937{
938 struct evtchn_status status;
939 int port, rc = -ENOENT;
940
941 memset(&status, 0, sizeof(status));
d0b075ff 942 for (port = 0; port < xen_evtchn_max_channels(); port++) {
62cc5fc7
OH
943 status.dom = DOMID_SELF;
944 status.port = port;
945 rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
946 if (rc < 0)
947 continue;
948 if (status.status != EVTCHNSTAT_virq)
949 continue;
b36585a0 950 if (status.u.virq == virq && status.vcpu == xen_vcpu_nr(cpu)) {
62cc5fc7
OH
951 rc = port;
952 break;
953 }
954 }
955 return rc;
956}
f87e4cac 957
0dc0064a
DV
958/**
959 * xen_evtchn_nr_channels - number of usable event channel ports
960 *
961 * This may be less than the maximum supported by the current
962 * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
963 * supported.
964 */
965unsigned xen_evtchn_nr_channels(void)
966{
967 return evtchn_ops->nr_channels();
968}
969EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
970
77bb3dfd 971int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
e46cdb66
JF
972{
973 struct evtchn_bind_virq bind_virq;
62cc5fc7 974 int evtchn, irq, ret;
e46cdb66 975
77365948 976 mutex_lock(&irq_mapping_update_lock);
e46cdb66
JF
977
978 irq = per_cpu(virq_to_irq, cpu)[virq];
979
980 if (irq == -1) {
c9df1ce5 981 irq = xen_allocate_irq_dynamic();
68ba45ff 982 if (irq < 0)
7bee9768 983 goto out;
a52521f1 984
77bb3dfd
DV
985 if (percpu)
986 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
987 handle_percpu_irq, "virq");
988 else
989 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
990 handle_edge_irq, "virq");
a52521f1 991
e46cdb66 992 bind_virq.virq = virq;
8058c0b8 993 bind_virq.vcpu = xen_vcpu_nr(cpu);
62cc5fc7
OH
994 ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
995 &bind_virq);
996 if (ret == 0)
997 evtchn = bind_virq.port;
998 else {
999 if (ret == -EEXIST)
1000 ret = find_virq(virq, cpu);
1001 BUG_ON(ret < 0);
1002 evtchn = ret;
1003 }
e46cdb66 1004
96d4c588
DV
1005 ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
1006 if (ret < 0) {
1007 __unbind_from_irq(irq);
1008 irq = ret;
1009 goto out;
1010 }
e46cdb66
JF
1011
1012 bind_evtchn_to_cpu(evtchn, cpu);
5e152e6c
KRW
1013 } else {
1014 struct irq_info *info = info_for_irq(irq);
1015 WARN_ON(info == NULL || info->type != IRQT_VIRQ);
e46cdb66
JF
1016 }
1017
7bee9768 1018out:
77365948 1019 mutex_unlock(&irq_mapping_update_lock);
e46cdb66
JF
1020
1021 return irq;
1022}
1023
1024static void unbind_from_irq(unsigned int irq)
1025{
77365948 1026 mutex_lock(&irq_mapping_update_lock);
96d4c588 1027 __unbind_from_irq(irq);
77365948 1028 mutex_unlock(&irq_mapping_update_lock);
e46cdb66
JF
1029}
1030
1031int bind_evtchn_to_irqhandler(unsigned int evtchn,
7c239975 1032 irq_handler_t handler,
e46cdb66
JF
1033 unsigned long irqflags,
1034 const char *devname, void *dev_id)
1035{
361ae8cb 1036 int irq, retval;
e46cdb66
JF
1037
1038 irq = bind_evtchn_to_irq(evtchn);
7bee9768
IC
1039 if (irq < 0)
1040 return irq;
e46cdb66
JF
1041 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1042 if (retval != 0) {
1043 unbind_from_irq(irq);
1044 return retval;
1045 }
1046
1047 return irq;
1048}
1049EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
1050
2e820f58
IC
1051int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
1052 unsigned int remote_port,
1053 irq_handler_t handler,
1054 unsigned long irqflags,
1055 const char *devname,
1056 void *dev_id)
1057{
1058 int irq, retval;
1059
1060 irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
1061 if (irq < 0)
1062 return irq;
1063
1064 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1065 if (retval != 0) {
1066 unbind_from_irq(irq);
1067 return retval;
1068 }
1069
1070 return irq;
1071}
1072EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
1073
e46cdb66 1074int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
7c239975 1075 irq_handler_t handler,
e46cdb66
JF
1076 unsigned long irqflags, const char *devname, void *dev_id)
1077{
361ae8cb 1078 int irq, retval;
e46cdb66 1079
77bb3dfd 1080 irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
7bee9768
IC
1081 if (irq < 0)
1082 return irq;
e46cdb66
JF
1083 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1084 if (retval != 0) {
1085 unbind_from_irq(irq);
1086 return retval;
1087 }
1088
1089 return irq;
1090}
1091EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
1092
f87e4cac
JF
1093int bind_ipi_to_irqhandler(enum ipi_vector ipi,
1094 unsigned int cpu,
1095 irq_handler_t handler,
1096 unsigned long irqflags,
1097 const char *devname,
1098 void *dev_id)
1099{
1100 int irq, retval;
1101
1102 irq = bind_ipi_to_irq(ipi, cpu);
1103 if (irq < 0)
1104 return irq;
1105
9bab0b7f 1106 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
f87e4cac
JF
1107 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1108 if (retval != 0) {
1109 unbind_from_irq(irq);
1110 return retval;
1111 }
1112
1113 return irq;
1114}
1115
e46cdb66
JF
1116void unbind_from_irqhandler(unsigned int irq, void *dev_id)
1117{
94032c50
KRW
1118 struct irq_info *info = irq_get_handler_data(irq);
1119
1120 if (WARN_ON(!info))
1121 return;
e46cdb66
JF
1122 free_irq(irq, dev_id);
1123 unbind_from_irq(irq);
1124}
1125EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
1126
6ccecb0f
DV
1127/**
1128 * xen_set_irq_priority() - set an event channel priority.
1129 * @irq:irq bound to an event channel.
1130 * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
1131 */
1132int xen_set_irq_priority(unsigned irq, unsigned priority)
1133{
1134 struct evtchn_set_priority set_priority;
1135
1136 set_priority.port = evtchn_from_irq(irq);
1137 set_priority.priority = priority;
1138
1139 return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
1140 &set_priority);
1141}
1142EXPORT_SYMBOL_GPL(xen_set_irq_priority);
1143
420eb554
DDG
1144int evtchn_make_refcounted(unsigned int evtchn)
1145{
d0b075ff 1146 int irq = get_evtchn_to_irq(evtchn);
420eb554
DDG
1147 struct irq_info *info;
1148
1149 if (irq == -1)
1150 return -ENOENT;
1151
1152 info = irq_get_handler_data(irq);
1153
1154 if (!info)
1155 return -ENOENT;
1156
1157 WARN_ON(info->refcnt != -1);
1158
1159 info->refcnt = 1;
1160
1161 return 0;
1162}
1163EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
1164
1165int evtchn_get(unsigned int evtchn)
1166{
1167 int irq;
1168 struct irq_info *info;
1169 int err = -ENOENT;
1170
d0b075ff 1171 if (evtchn >= xen_evtchn_max_channels())
c3b3f16d
DDG
1172 return -EINVAL;
1173
420eb554
DDG
1174 mutex_lock(&irq_mapping_update_lock);
1175
d0b075ff 1176 irq = get_evtchn_to_irq(evtchn);
420eb554
DDG
1177 if (irq == -1)
1178 goto done;
1179
1180 info = irq_get_handler_data(irq);
1181
1182 if (!info)
1183 goto done;
1184
1185 err = -EINVAL;
1186 if (info->refcnt <= 0)
1187 goto done;
1188
1189 info->refcnt++;
1190 err = 0;
1191 done:
1192 mutex_unlock(&irq_mapping_update_lock);
1193
1194 return err;
1195}
1196EXPORT_SYMBOL_GPL(evtchn_get);
1197
1198void evtchn_put(unsigned int evtchn)
1199{
d0b075ff 1200 int irq = get_evtchn_to_irq(evtchn);
420eb554
DDG
1201 if (WARN_ON(irq == -1))
1202 return;
1203 unbind_from_irq(irq);
1204}
1205EXPORT_SYMBOL_GPL(evtchn_put);
1206
f87e4cac
JF
1207void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
1208{
6efa20e4
KRW
1209 int irq;
1210
072b2064 1211#ifdef CONFIG_X86
6efa20e4 1212 if (unlikely(vector == XEN_NMI_VECTOR)) {
ad5475f9
VK
1213 int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu),
1214 NULL);
6efa20e4
KRW
1215 if (rc < 0)
1216 printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
1217 return;
1218 }
072b2064 1219#endif
6efa20e4 1220 irq = per_cpu(ipi_to_irq, cpu)[vector];
f87e4cac
JF
1221 BUG_ON(irq < 0);
1222 notify_remote_via_irq(irq);
1223}
1224
245b2e70
TH
1225static DEFINE_PER_CPU(unsigned, xed_nesting_count);
1226
38e20b07 1227static void __xen_evtchn_do_upcall(void)
e46cdb66 1228{
780f36d8 1229 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
9a489f45 1230 int cpu = get_cpu();
088c05a8 1231 unsigned count;
e46cdb66 1232
229664be 1233 do {
229664be 1234 vcpu_info->evtchn_upcall_pending = 0;
e46cdb66 1235
b2e4ae69 1236 if (__this_cpu_inc_return(xed_nesting_count) - 1)
229664be 1237 goto out;
e46cdb66 1238
9a489f45 1239 xen_evtchn_handle_events(cpu);
e46cdb66 1240
229664be
JF
1241 BUG_ON(!irqs_disabled());
1242
780f36d8
CL
1243 count = __this_cpu_read(xed_nesting_count);
1244 __this_cpu_write(xed_nesting_count, 0);
183d03cc 1245 } while (count != 1 || vcpu_info->evtchn_upcall_pending);
229664be
JF
1246
1247out:
38e20b07
SY
1248
1249 put_cpu();
1250}
1251
1252void xen_evtchn_do_upcall(struct pt_regs *regs)
1253{
1254 struct pt_regs *old_regs = set_irq_regs(regs);
1255
772aebce 1256 irq_enter();
0ec53ecf 1257#ifdef CONFIG_X86
99c8b79d 1258 inc_irq_stat(irq_hv_callback_count);
d06eb3ee 1259#endif
38e20b07
SY
1260
1261 __xen_evtchn_do_upcall();
1262
3445a8fd
JF
1263 irq_exit();
1264 set_irq_regs(old_regs);
38e20b07 1265}
3445a8fd 1266
38e20b07
SY
1267void xen_hvm_evtchn_do_upcall(void)
1268{
1269 __xen_evtchn_do_upcall();
e46cdb66 1270}
183d03cc 1271EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
e46cdb66 1272
eb1e305f
JF
1273/* Rebind a new event channel to an existing irq. */
1274void rebind_evtchn_irq(int evtchn, int irq)
1275{
d77bbd4d
JF
1276 struct irq_info *info = info_for_irq(irq);
1277
94032c50
KRW
1278 if (WARN_ON(!info))
1279 return;
1280
eb1e305f
JF
1281 /* Make sure the irq is masked, since the new event channel
1282 will also be masked. */
1283 disable_irq(irq);
1284
77365948 1285 mutex_lock(&irq_mapping_update_lock);
eb1e305f
JF
1286
1287 /* After resume the irq<->evtchn mappings are all cleared out */
d0b075ff 1288 BUG_ON(get_evtchn_to_irq(evtchn) != -1);
eb1e305f 1289 /* Expect irq to have been bound before,
d77bbd4d
JF
1290 so there should be a proper type */
1291 BUG_ON(info->type == IRQT_UNBOUND);
eb1e305f 1292
96d4c588 1293 (void)xen_irq_info_evtchn_setup(irq, evtchn);
eb1e305f 1294
77365948 1295 mutex_unlock(&irq_mapping_update_lock);
eb1e305f 1296
5cec9883
BO
1297 bind_evtchn_to_cpu(evtchn, info->cpu);
1298 /* This will be deferred until interrupt is processed */
1299 irq_set_affinity(irq, cpumask_of(info->cpu));
eb1e305f
JF
1300
1301 /* Unmask the event channel. */
1302 enable_irq(irq);
1303}
1304
e46cdb66 1305/* Rebind an evtchn so that it gets delivered to a specific cpu */
d5dedd45 1306static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
e46cdb66
JF
1307{
1308 struct evtchn_bind_vcpu bind_vcpu;
1309 int evtchn = evtchn_from_irq(irq);
4704fe4f 1310 int masked;
e46cdb66 1311
be49472f
IC
1312 if (!VALID_EVTCHN(evtchn))
1313 return -1;
1314
e46cdb66
JF
1315 /* Send future instances of this interrupt to other vcpu. */
1316 bind_vcpu.port = evtchn;
8058c0b8 1317 bind_vcpu.vcpu = xen_vcpu_nr(tcpu);
e46cdb66 1318
4704fe4f
DV
1319 /*
1320 * Mask the event while changing the VCPU binding to prevent
1321 * it being delivered on an unexpected VCPU.
1322 */
3f70fa82 1323 masked = test_and_set_mask(evtchn);
4704fe4f 1324
e46cdb66
JF
1325 /*
1326 * If this fails, it usually just indicates that we're dealing with a
1327 * virq or IPI channel, which don't actually need to be rebound. Ignore
1328 * it, but don't do the xenlinux-level rebind in that case.
1329 */
1330 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
1331 bind_evtchn_to_cpu(evtchn, tcpu);
e46cdb66 1332
4704fe4f
DV
1333 if (!masked)
1334 unmask_evtchn(evtchn);
1335
d5dedd45
YL
1336 return 0;
1337}
e46cdb66 1338
c9e265e0
TG
1339static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
1340 bool force)
e46cdb66 1341{
753fbd23 1342 unsigned tcpu = cpumask_first_and(dest, cpu_online_mask);
d5dedd45 1343
c9e265e0 1344 return rebind_irq_to_cpu(data->irq, tcpu);
e46cdb66
JF
1345}
1346
c9e265e0 1347static void enable_dynirq(struct irq_data *data)
e46cdb66 1348{
c9e265e0 1349 int evtchn = evtchn_from_irq(data->irq);
e46cdb66
JF
1350
1351 if (VALID_EVTCHN(evtchn))
1352 unmask_evtchn(evtchn);
1353}
1354
c9e265e0 1355static void disable_dynirq(struct irq_data *data)
e46cdb66 1356{
c9e265e0 1357 int evtchn = evtchn_from_irq(data->irq);
e46cdb66
JF
1358
1359 if (VALID_EVTCHN(evtchn))
1360 mask_evtchn(evtchn);
1361}
1362
c9e265e0 1363static void ack_dynirq(struct irq_data *data)
e46cdb66 1364{
c9e265e0 1365 int evtchn = evtchn_from_irq(data->irq);
e46cdb66 1366
ff1e22e7
BO
1367 if (!VALID_EVTCHN(evtchn))
1368 return;
e46cdb66 1369
f0f39387
RL
1370 if (unlikely(irqd_is_setaffinity_pending(data)) &&
1371 likely(!irqd_irq_disabled(data))) {
ff1e22e7
BO
1372 int masked = test_and_set_mask(evtchn);
1373
1374 clear_evtchn(evtchn);
1375
1376 irq_move_masked_irq(data);
1377
1378 if (!masked)
1379 unmask_evtchn(evtchn);
1380 } else
7e186bdd
SS
1381 clear_evtchn(evtchn);
1382}
1383
1384static void mask_ack_dynirq(struct irq_data *data)
1385{
1386 disable_dynirq(data);
1387 ack_dynirq(data);
e46cdb66
JF
1388}
1389
c9e265e0 1390static int retrigger_dynirq(struct irq_data *data)
e46cdb66 1391{
4640ddf5
DV
1392 unsigned int evtchn = evtchn_from_irq(data->irq);
1393 int masked;
1394
1395 if (!VALID_EVTCHN(evtchn))
1396 return 0;
1397
1398 masked = test_and_set_mask(evtchn);
1399 set_evtchn(evtchn);
1400 if (!masked)
1401 unmask_evtchn(evtchn);
1402
1403 return 1;
e46cdb66
JF
1404}
1405
0a85226f 1406static void restore_pirqs(void)
9a069c33
SS
1407{
1408 int pirq, rc, irq, gsi;
1409 struct physdev_map_pirq map_irq;
69c358ce 1410 struct irq_info *info;
9a069c33 1411
69c358ce
IC
1412 list_for_each_entry(info, &xen_irq_list_head, list) {
1413 if (info->type != IRQT_PIRQ)
9a069c33
SS
1414 continue;
1415
69c358ce
IC
1416 pirq = info->u.pirq.pirq;
1417 gsi = info->u.pirq.gsi;
1418 irq = info->irq;
1419
9a069c33
SS
1420 /* save/restore of PT devices doesn't work, so at this point the
1421 * only devices present are GSI based emulated devices */
9a069c33
SS
1422 if (!gsi)
1423 continue;
1424
1425 map_irq.domid = DOMID_SELF;
1426 map_irq.type = MAP_PIRQ_TYPE_GSI;
1427 map_irq.index = gsi;
1428 map_irq.pirq = pirq;
1429
1430 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
1431 if (rc) {
283c0972
JP
1432 pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
1433 gsi, irq, pirq, rc);
9158c358 1434 xen_free_irq(irq);
9a069c33
SS
1435 continue;
1436 }
1437
1438 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
1439
c9e265e0 1440 __startup_pirq(irq);
9a069c33
SS
1441 }
1442}
1443
0e91398f
JF
1444static void restore_cpu_virqs(unsigned int cpu)
1445{
1446 struct evtchn_bind_virq bind_virq;
1447 int virq, irq, evtchn;
1448
1449 for (virq = 0; virq < NR_VIRQS; virq++) {
1450 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1451 continue;
1452
ced40d0f 1453 BUG_ON(virq_from_irq(irq) != virq);
0e91398f
JF
1454
1455 /* Get a new binding from Xen. */
1456 bind_virq.virq = virq;
8058c0b8 1457 bind_virq.vcpu = xen_vcpu_nr(cpu);
0e91398f
JF
1458 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1459 &bind_virq) != 0)
1460 BUG();
1461 evtchn = bind_virq.port;
1462
1463 /* Record the new mapping. */
96d4c588 1464 (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
0e91398f 1465 bind_evtchn_to_cpu(evtchn, cpu);
0e91398f
JF
1466 }
1467}
1468
1469static void restore_cpu_ipis(unsigned int cpu)
1470{
1471 struct evtchn_bind_ipi bind_ipi;
1472 int ipi, irq, evtchn;
1473
1474 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
1475 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
1476 continue;
1477
ced40d0f 1478 BUG_ON(ipi_from_irq(irq) != ipi);
0e91398f
JF
1479
1480 /* Get a new binding from Xen. */
8058c0b8 1481 bind_ipi.vcpu = xen_vcpu_nr(cpu);
0e91398f
JF
1482 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1483 &bind_ipi) != 0)
1484 BUG();
1485 evtchn = bind_ipi.port;
1486
1487 /* Record the new mapping. */
96d4c588 1488 (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
0e91398f 1489 bind_evtchn_to_cpu(evtchn, cpu);
0e91398f
JF
1490 }
1491}
1492
2d9e1e2f
JF
1493/* Clear an irq's pending state, in preparation for polling on it */
1494void xen_clear_irq_pending(int irq)
1495{
1496 int evtchn = evtchn_from_irq(irq);
1497
1498 if (VALID_EVTCHN(evtchn))
1499 clear_evtchn(evtchn);
1500}
d9a8814f 1501EXPORT_SYMBOL(xen_clear_irq_pending);
168d2f46
JF
1502void xen_set_irq_pending(int irq)
1503{
1504 int evtchn = evtchn_from_irq(irq);
1505
1506 if (VALID_EVTCHN(evtchn))
1507 set_evtchn(evtchn);
1508}
1509
1510bool xen_test_irq_pending(int irq)
1511{
1512 int evtchn = evtchn_from_irq(irq);
1513 bool ret = false;
1514
1515 if (VALID_EVTCHN(evtchn))
1516 ret = test_evtchn(evtchn);
1517
1518 return ret;
1519}
1520
d9a8814f
KRW
1521/* Poll waiting for an irq to become pending with timeout. In the usual case,
1522 * the irq will be disabled so it won't deliver an interrupt. */
1523void xen_poll_irq_timeout(int irq, u64 timeout)
2d9e1e2f
JF
1524{
1525 evtchn_port_t evtchn = evtchn_from_irq(irq);
1526
1527 if (VALID_EVTCHN(evtchn)) {
1528 struct sched_poll poll;
1529
1530 poll.nr_ports = 1;
d9a8814f 1531 poll.timeout = timeout;
ff3c5362 1532 set_xen_guest_handle(poll.ports, &evtchn);
2d9e1e2f
JF
1533
1534 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
1535 BUG();
1536 }
1537}
d9a8814f
KRW
1538EXPORT_SYMBOL(xen_poll_irq_timeout);
1539/* Poll waiting for an irq to become pending. In the usual case, the
1540 * irq will be disabled so it won't deliver an interrupt. */
1541void xen_poll_irq(int irq)
1542{
1543 xen_poll_irq_timeout(irq, 0 /* no timeout */);
1544}
2d9e1e2f 1545
c7c2c3a2
KRW
1546/* Check whether the IRQ line is shared with other guests. */
1547int xen_test_irq_shared(int irq)
1548{
1549 struct irq_info *info = info_for_irq(irq);
94032c50
KRW
1550 struct physdev_irq_status_query irq_status;
1551
1552 if (WARN_ON(!info))
1553 return -ENOENT;
1554
1555 irq_status.irq = info->u.pirq.pirq;
c7c2c3a2
KRW
1556
1557 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
1558 return 0;
1559 return !(irq_status.flags & XENIRQSTAT_shared);
1560}
1561EXPORT_SYMBOL_GPL(xen_test_irq_shared);
1562
0e91398f
JF
1563void xen_irq_resume(void)
1564{
fd21069d 1565 unsigned int cpu;
6cb6537d 1566 struct irq_info *info;
0e91398f 1567
0e91398f 1568 /* New event-channel space is not 'live' yet. */
fd21069d 1569 xen_evtchn_mask_all();
1fe56551 1570 xen_evtchn_resume();
0e91398f
JF
1571
1572 /* No IRQ <-> event-channel mappings. */
6cb6537d
IC
1573 list_for_each_entry(info, &xen_irq_list_head, list)
1574 info->evtchn = 0; /* zap event-channel binding */
0e91398f 1575
d0b075ff 1576 clear_evtchn_to_irq_all();
0e91398f
JF
1577
1578 for_each_possible_cpu(cpu) {
1579 restore_cpu_virqs(cpu);
1580 restore_cpu_ipis(cpu);
1581 }
6903591f 1582
0a85226f 1583 restore_pirqs();
0e91398f
JF
1584}
1585
e46cdb66 1586static struct irq_chip xen_dynamic_chip __read_mostly = {
c9e265e0 1587 .name = "xen-dyn",
54a353a0 1588
c9e265e0
TG
1589 .irq_disable = disable_dynirq,
1590 .irq_mask = disable_dynirq,
1591 .irq_unmask = enable_dynirq,
54a353a0 1592
7e186bdd
SS
1593 .irq_ack = ack_dynirq,
1594 .irq_mask_ack = mask_ack_dynirq,
1595
c9e265e0
TG
1596 .irq_set_affinity = set_affinity_irq,
1597 .irq_retrigger = retrigger_dynirq,
e46cdb66
JF
1598};
1599
d46a78b0 1600static struct irq_chip xen_pirq_chip __read_mostly = {
c9e265e0 1601 .name = "xen-pirq",
d46a78b0 1602
c9e265e0
TG
1603 .irq_startup = startup_pirq,
1604 .irq_shutdown = shutdown_pirq,
c9e265e0 1605 .irq_enable = enable_pirq,
c9e265e0 1606 .irq_disable = disable_pirq,
d46a78b0 1607
7e186bdd
SS
1608 .irq_mask = disable_dynirq,
1609 .irq_unmask = enable_dynirq,
1610
1611 .irq_ack = eoi_pirq,
1612 .irq_eoi = eoi_pirq,
1613 .irq_mask_ack = mask_ack_pirq,
d46a78b0 1614
c9e265e0 1615 .irq_set_affinity = set_affinity_irq,
d46a78b0 1616
c9e265e0 1617 .irq_retrigger = retrigger_dynirq,
d46a78b0
JF
1618};
1619
aaca4964 1620static struct irq_chip xen_percpu_chip __read_mostly = {
c9e265e0 1621 .name = "xen-percpu",
aaca4964 1622
c9e265e0
TG
1623 .irq_disable = disable_dynirq,
1624 .irq_mask = disable_dynirq,
1625 .irq_unmask = enable_dynirq,
aaca4964 1626
c9e265e0 1627 .irq_ack = ack_dynirq,
aaca4964
JF
1628};
1629
38e20b07
SY
1630int xen_set_callback_via(uint64_t via)
1631{
1632 struct xen_hvm_param a;
1633 a.domid = DOMID_SELF;
1634 a.index = HVM_PARAM_CALLBACK_IRQ;
1635 a.value = via;
1636 return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
1637}
1638EXPORT_SYMBOL_GPL(xen_set_callback_via);
1639
ca65f9fc 1640#ifdef CONFIG_XEN_PVHVM
38e20b07
SY
1641/* Vector callbacks are better than PCI interrupts to receive event
1642 * channel notifications because we can receive vector callbacks on any
1643 * vcpu and we don't need PCI support or APIC interactions. */
1644void xen_callback_vector(void)
1645{
1646 int rc;
1647 uint64_t callback_via;
72a9b186
KA
1648
1649 callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
1650 rc = xen_set_callback_via(callback_via);
1651 BUG_ON(rc);
1652 pr_info("Xen HVM callback vector for event delivery is enabled\n");
1653 /* in the restore case the vector has already been allocated */
1654 if (!test_bit(HYPERVISOR_CALLBACK_VECTOR, used_vectors))
1655 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR,
1656 xen_hvm_callback_vector);
38e20b07 1657}
ca65f9fc
SS
1658#else
1659void xen_callback_vector(void) {}
1660#endif
38e20b07 1661
1fe56551
DV
1662#undef MODULE_PARAM_PREFIX
1663#define MODULE_PARAM_PREFIX "xen."
1664
1665static bool fifo_events = true;
1666module_param(fifo_events, bool, 0);
1667
2e3d8860 1668void __init xen_init_IRQ(void)
e46cdb66 1669{
1fe56551
DV
1670 int ret = -EINVAL;
1671
1672 if (fifo_events)
1673 ret = xen_evtchn_fifo_init();
1674 if (ret < 0)
1675 xen_evtchn_2l_init();
ab9a1cca 1676
d0b075ff
DV
1677 evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()),
1678 sizeof(*evtchn_to_irq), GFP_KERNEL);
9d093e29 1679 BUG_ON(!evtchn_to_irq);
e46cdb66 1680
e46cdb66 1681 /* No event channels are 'live' right now. */
fd21069d 1682 xen_evtchn_mask_all();
e46cdb66 1683
9846ff10
SS
1684 pirq_needs_eoi = pirq_needs_eoi_flag;
1685
0ec53ecf 1686#ifdef CONFIG_X86
2771374d
MR
1687 if (xen_pv_domain()) {
1688 irq_ctx_init(smp_processor_id());
1689 if (xen_initial_domain())
1690 pci_xen_initial_domain();
1691 }
1692 if (xen_feature(XENFEAT_hvm_callback_vector))
38e20b07 1693 xen_callback_vector();
2771374d
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1694
1695 if (xen_hvm_domain()) {
38e20b07 1696 native_init_IRQ();
3942b740
SS
1697 /* pci_xen_hvm_init must be called after native_init_IRQ so that
1698 * __acpi_register_gsi can point at the right function */
1699 pci_xen_hvm_init();
38e20b07 1700 } else {
0ec53ecf 1701 int rc;
9846ff10
SS
1702 struct physdev_pirq_eoi_gmfn eoi_gmfn;
1703
9846ff10 1704 pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
0df4f266 1705 eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map);
9846ff10
SS
1706 rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
1707 if (rc != 0) {
1708 free_page((unsigned long) pirq_eoi_map);
1709 pirq_eoi_map = NULL;
1710 } else
1711 pirq_needs_eoi = pirq_check_eoi_map;
38e20b07 1712 }
0ec53ecf 1713#endif
e46cdb66 1714}