]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/xen/events.c
x86/io_apic: add get_nr_irqs_gsi()
[mirror_ubuntu-artful-kernel.git] / drivers / xen / events.c
CommitLineData
e46cdb66
JF
1/*
2 * Xen event channels
3 *
4 * Xen models interrupts with abstract event channels. Because each
5 * domain gets 1024 event channels, but NR_IRQ is not that large, we
6 * must dynamically map irqs<->event channels. The event channels
7 * interface with the rest of the kernel by defining a xen interrupt
8 * chip. When an event is recieved, it is mapped to an irq and sent
9 * through the normal interrupt processing path.
10 *
11 * There are four kinds of events which can be mapped to an event
12 * channel:
13 *
14 * 1. Inter-domain notifications. This includes all the virtual
15 * device events, since they're driven by front-ends in another domain
16 * (typically dom0).
17 * 2. VIRQs, typically used for timers. These are per-cpu events.
18 * 3. IPIs.
d46a78b0 19 * 4. PIRQs - Hardware interrupts.
e46cdb66
JF
20 *
21 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
22 */
23
24#include <linux/linkage.h>
25#include <linux/interrupt.h>
26#include <linux/irq.h>
27#include <linux/module.h>
28#include <linux/string.h>
28e08861 29#include <linux/bootmem.h>
5a0e3ad6 30#include <linux/slab.h>
e46cdb66 31
38e20b07 32#include <asm/desc.h>
e46cdb66
JF
33#include <asm/ptrace.h>
34#include <asm/irq.h>
792dc4f6 35#include <asm/idle.h>
e46cdb66
JF
36#include <asm/sync_bitops.h>
37#include <asm/xen/hypercall.h>
8d1b8753 38#include <asm/xen/hypervisor.h>
e46cdb66 39
38e20b07
SY
40#include <xen/xen.h>
41#include <xen/hvm.h>
e04d0d07 42#include <xen/xen-ops.h>
e46cdb66
JF
43#include <xen/events.h>
44#include <xen/interface/xen.h>
45#include <xen/interface/event_channel.h>
38e20b07
SY
46#include <xen/interface/hvm/hvm_op.h>
47#include <xen/interface/hvm/params.h>
e46cdb66 48
d46a78b0
JF
49/* Leave low irqs free for identity mapping */
50#define LEGACY_IRQS 16
51
e46cdb66
JF
52/*
53 * This lock protects updates to the following mapping and reference-count
54 * arrays. The lock does not need to be acquired to read the mapping tables.
55 */
56static DEFINE_SPINLOCK(irq_mapping_update_lock);
57
58/* IRQ <-> VIRQ mapping. */
204fba4a 59static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
e46cdb66 60
f87e4cac 61/* IRQ <-> IPI mapping */
204fba4a 62static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
f87e4cac 63
ced40d0f
JF
64/* Interrupt types. */
65enum xen_irq_type {
d77bbd4d 66 IRQT_UNBOUND = 0,
f87e4cac
JF
67 IRQT_PIRQ,
68 IRQT_VIRQ,
69 IRQT_IPI,
70 IRQT_EVTCHN
71};
e46cdb66 72
ced40d0f
JF
73/*
74 * Packed IRQ information:
75 * type - enum xen_irq_type
76 * event channel - irq->event channel mapping
77 * cpu - cpu this event channel is bound to
78 * index - type-specific information:
79 * PIRQ - vector, with MSB being "needs EIO"
80 * VIRQ - virq number
81 * IPI - IPI vector
82 * EVTCHN -
83 */
84struct irq_info
85{
86 enum xen_irq_type type; /* type */
87 unsigned short evtchn; /* event channel */
88 unsigned short cpu; /* cpu bound */
89
90 union {
91 unsigned short virq;
92 enum ipi_vector ipi;
93 struct {
94 unsigned short gsi;
d46a78b0
JF
95 unsigned char vector;
96 unsigned char flags;
ced40d0f
JF
97 } pirq;
98 } u;
99};
d46a78b0 100#define PIRQ_NEEDS_EOI (1 << 0)
ced40d0f
JF
101
102static struct irq_info irq_info[NR_IRQS];
e46cdb66
JF
103
104static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
105 [0 ... NR_EVENT_CHANNELS-1] = -1
106};
c7a3589e
MT
107struct cpu_evtchn_s {
108 unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
109};
110static struct cpu_evtchn_s *cpu_evtchn_mask_p;
111static inline unsigned long *cpu_evtchn_mask(int cpu)
112{
113 return cpu_evtchn_mask_p[cpu].bits;
114}
e46cdb66 115
e46cdb66
JF
116/* Xen will never allocate port zero for any purpose. */
117#define VALID_EVTCHN(chn) ((chn) != 0)
118
e46cdb66 119static struct irq_chip xen_dynamic_chip;
aaca4964 120static struct irq_chip xen_percpu_chip;
d46a78b0 121static struct irq_chip xen_pirq_chip;
e46cdb66
JF
122
123/* Constructor for packed IRQ information. */
ced40d0f
JF
124static struct irq_info mk_unbound_info(void)
125{
126 return (struct irq_info) { .type = IRQT_UNBOUND };
127}
128
129static struct irq_info mk_evtchn_info(unsigned short evtchn)
130{
90af9514
IC
131 return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
132 .cpu = 0 };
ced40d0f
JF
133}
134
135static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
e46cdb66 136{
ced40d0f 137 return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
90af9514 138 .cpu = 0, .u.ipi = ipi };
ced40d0f
JF
139}
140
141static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
142{
143 return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
90af9514 144 .cpu = 0, .u.virq = virq };
ced40d0f
JF
145}
146
147static struct irq_info mk_pirq_info(unsigned short evtchn,
148 unsigned short gsi, unsigned short vector)
149{
150 return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
90af9514 151 .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
e46cdb66
JF
152}
153
154/*
155 * Accessors for packed IRQ information.
156 */
ced40d0f 157static struct irq_info *info_for_irq(unsigned irq)
e46cdb66 158{
ced40d0f 159 return &irq_info[irq];
e46cdb66
JF
160}
161
ced40d0f 162static unsigned int evtchn_from_irq(unsigned irq)
e46cdb66 163{
ced40d0f 164 return info_for_irq(irq)->evtchn;
e46cdb66
JF
165}
166
d4c04536
IC
167unsigned irq_from_evtchn(unsigned int evtchn)
168{
169 return evtchn_to_irq[evtchn];
170}
171EXPORT_SYMBOL_GPL(irq_from_evtchn);
172
ced40d0f 173static enum ipi_vector ipi_from_irq(unsigned irq)
e46cdb66 174{
ced40d0f
JF
175 struct irq_info *info = info_for_irq(irq);
176
177 BUG_ON(info == NULL);
178 BUG_ON(info->type != IRQT_IPI);
179
180 return info->u.ipi;
181}
182
183static unsigned virq_from_irq(unsigned irq)
184{
185 struct irq_info *info = info_for_irq(irq);
186
187 BUG_ON(info == NULL);
188 BUG_ON(info->type != IRQT_VIRQ);
189
190 return info->u.virq;
191}
192
193static unsigned gsi_from_irq(unsigned irq)
194{
195 struct irq_info *info = info_for_irq(irq);
196
197 BUG_ON(info == NULL);
198 BUG_ON(info->type != IRQT_PIRQ);
199
200 return info->u.pirq.gsi;
201}
202
203static unsigned vector_from_irq(unsigned irq)
204{
205 struct irq_info *info = info_for_irq(irq);
206
207 BUG_ON(info == NULL);
208 BUG_ON(info->type != IRQT_PIRQ);
209
210 return info->u.pirq.vector;
211}
212
213static enum xen_irq_type type_from_irq(unsigned irq)
214{
215 return info_for_irq(irq)->type;
216}
217
218static unsigned cpu_from_irq(unsigned irq)
219{
220 return info_for_irq(irq)->cpu;
221}
222
223static unsigned int cpu_from_evtchn(unsigned int evtchn)
224{
225 int irq = evtchn_to_irq[evtchn];
226 unsigned ret = 0;
227
228 if (irq != -1)
229 ret = cpu_from_irq(irq);
230
231 return ret;
e46cdb66
JF
232}
233
d46a78b0
JF
234static bool pirq_needs_eoi(unsigned irq)
235{
236 struct irq_info *info = info_for_irq(irq);
237
238 BUG_ON(info->type != IRQT_PIRQ);
239
240 return info->u.pirq.flags & PIRQ_NEEDS_EOI;
241}
242
e46cdb66
JF
243static inline unsigned long active_evtchns(unsigned int cpu,
244 struct shared_info *sh,
245 unsigned int idx)
246{
247 return (sh->evtchn_pending[idx] &
c7a3589e 248 cpu_evtchn_mask(cpu)[idx] &
e46cdb66
JF
249 ~sh->evtchn_mask[idx]);
250}
251
252static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
253{
254 int irq = evtchn_to_irq[chn];
255
256 BUG_ON(irq == -1);
257#ifdef CONFIG_SMP
7f7ace0c 258 cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
e46cdb66
JF
259#endif
260
ced40d0f 261 __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
c7a3589e 262 __set_bit(chn, cpu_evtchn_mask(cpu));
e46cdb66 263
ced40d0f 264 irq_info[irq].cpu = cpu;
e46cdb66
JF
265}
266
267static void init_evtchn_cpu_bindings(void)
268{
269#ifdef CONFIG_SMP
10e58084 270 struct irq_desc *desc;
e46cdb66 271 int i;
10e58084 272
e46cdb66 273 /* By default all event channels notify CPU#0. */
0b8f1efa 274 for_each_irq_desc(i, desc) {
7f7ace0c 275 cpumask_copy(desc->affinity, cpumask_of(0));
0b8f1efa 276 }
e46cdb66
JF
277#endif
278
c7a3589e 279 memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
e46cdb66
JF
280}
281
e46cdb66
JF
282static inline void clear_evtchn(int port)
283{
284 struct shared_info *s = HYPERVISOR_shared_info;
285 sync_clear_bit(port, &s->evtchn_pending[0]);
286}
287
288static inline void set_evtchn(int port)
289{
290 struct shared_info *s = HYPERVISOR_shared_info;
291 sync_set_bit(port, &s->evtchn_pending[0]);
292}
293
168d2f46
JF
294static inline int test_evtchn(int port)
295{
296 struct shared_info *s = HYPERVISOR_shared_info;
297 return sync_test_bit(port, &s->evtchn_pending[0]);
298}
299
e46cdb66
JF
300
301/**
302 * notify_remote_via_irq - send event to remote end of event channel via irq
303 * @irq: irq of event channel to send event to
304 *
305 * Unlike notify_remote_via_evtchn(), this is safe to use across
306 * save/restore. Notifications on a broken connection are silently
307 * dropped.
308 */
309void notify_remote_via_irq(int irq)
310{
311 int evtchn = evtchn_from_irq(irq);
312
313 if (VALID_EVTCHN(evtchn))
314 notify_remote_via_evtchn(evtchn);
315}
316EXPORT_SYMBOL_GPL(notify_remote_via_irq);
317
318static void mask_evtchn(int port)
319{
320 struct shared_info *s = HYPERVISOR_shared_info;
321 sync_set_bit(port, &s->evtchn_mask[0]);
322}
323
324static void unmask_evtchn(int port)
325{
326 struct shared_info *s = HYPERVISOR_shared_info;
327 unsigned int cpu = get_cpu();
328
329 BUG_ON(!irqs_disabled());
330
331 /* Slow path (hypercall) if this is a non-local port. */
332 if (unlikely(cpu != cpu_from_evtchn(port))) {
333 struct evtchn_unmask unmask = { .port = port };
334 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
335 } else {
336 struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
337
338 sync_clear_bit(port, &s->evtchn_mask[0]);
339
340 /*
341 * The following is basically the equivalent of
342 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
343 * the interrupt edge' if the channel is masked.
344 */
345 if (sync_test_bit(port, &s->evtchn_pending[0]) &&
346 !sync_test_and_set_bit(port / BITS_PER_LONG,
347 &vcpu_info->evtchn_pending_sel))
348 vcpu_info->evtchn_upcall_pending = 1;
349 }
350
351 put_cpu();
352}
353
354static int find_unbound_irq(void)
355{
77dff1c7
TG
356 struct irq_data *data;
357 int irq, res;
e46cdb66 358
99ad198c 359 for (irq = 0; irq < nr_irqs; irq++) {
77dff1c7 360 data = irq_get_irq_data(irq);
99ad198c 361 /* only 0->15 have init'd desc; handle irq > 16 */
77dff1c7 362 if (!data)
99ad198c 363 break;
77dff1c7 364 if (data->chip == &no_irq_chip)
99ad198c 365 break;
77dff1c7 366 if (data->chip != &xen_dynamic_chip)
99ad198c 367 continue;
d77bbd4d 368 if (irq_info[irq].type == IRQT_UNBOUND)
77dff1c7 369 return irq;
99ad198c 370 }
e46cdb66 371
5a15d7e8
YL
372 if (irq == nr_irqs)
373 panic("No available IRQ to bind to: increase nr_irqs!\n");
e46cdb66 374
77dff1c7 375 res = irq_alloc_desc_at(irq, 0);
6f8a0ed4 376
77dff1c7
TG
377 if (WARN_ON(res != irq))
378 return -1;
ced40d0f 379
e46cdb66
JF
380 return irq;
381}
382
d46a78b0
JF
383static bool identity_mapped_irq(unsigned irq)
384{
385 /* only identity map legacy irqs */
386 return irq < LEGACY_IRQS;
387}
388
389static void pirq_unmask_notify(int irq)
390{
391 struct physdev_eoi eoi = { .irq = irq };
392
393 if (unlikely(pirq_needs_eoi(irq))) {
394 int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
395 WARN_ON(rc);
396 }
397}
398
399static void pirq_query_unmask(int irq)
400{
401 struct physdev_irq_status_query irq_status;
402 struct irq_info *info = info_for_irq(irq);
403
404 BUG_ON(info->type != IRQT_PIRQ);
405
406 irq_status.irq = irq;
407 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
408 irq_status.flags = 0;
409
410 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
411 if (irq_status.flags & XENIRQSTAT_needs_eoi)
412 info->u.pirq.flags |= PIRQ_NEEDS_EOI;
413}
414
415static bool probing_irq(int irq)
416{
417 struct irq_desc *desc = irq_to_desc(irq);
418
419 return desc && desc->action == NULL;
420}
421
422static unsigned int startup_pirq(unsigned int irq)
423{
424 struct evtchn_bind_pirq bind_pirq;
425 struct irq_info *info = info_for_irq(irq);
426 int evtchn = evtchn_from_irq(irq);
427
428 BUG_ON(info->type != IRQT_PIRQ);
429
430 if (VALID_EVTCHN(evtchn))
431 goto out;
432
433 bind_pirq.pirq = irq;
434 /* NB. We are happy to share unless we are probing. */
435 bind_pirq.flags = probing_irq(irq) ? 0 : BIND_PIRQ__WILL_SHARE;
436 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq) != 0) {
437 if (!probing_irq(irq))
438 printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
439 irq);
440 return 0;
441 }
442 evtchn = bind_pirq.port;
443
444 pirq_query_unmask(irq);
445
446 evtchn_to_irq[evtchn] = irq;
447 bind_evtchn_to_cpu(evtchn, 0);
448 info->evtchn = evtchn;
449
450out:
451 unmask_evtchn(evtchn);
452 pirq_unmask_notify(irq);
453
454 return 0;
455}
456
457static void shutdown_pirq(unsigned int irq)
458{
459 struct evtchn_close close;
460 struct irq_info *info = info_for_irq(irq);
461 int evtchn = evtchn_from_irq(irq);
462
463 BUG_ON(info->type != IRQT_PIRQ);
464
465 if (!VALID_EVTCHN(evtchn))
466 return;
467
468 mask_evtchn(evtchn);
469
470 close.port = evtchn;
471 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
472 BUG();
473
474 bind_evtchn_to_cpu(evtchn, 0);
475 evtchn_to_irq[evtchn] = -1;
476 info->evtchn = 0;
477}
478
479static void enable_pirq(unsigned int irq)
480{
481 startup_pirq(irq);
482}
483
484static void disable_pirq(unsigned int irq)
485{
486}
487
488static void ack_pirq(unsigned int irq)
489{
490 int evtchn = evtchn_from_irq(irq);
491
492 move_native_irq(irq);
493
494 if (VALID_EVTCHN(evtchn)) {
495 mask_evtchn(evtchn);
496 clear_evtchn(evtchn);
497 }
498}
499
500static void end_pirq(unsigned int irq)
501{
502 int evtchn = evtchn_from_irq(irq);
503 struct irq_desc *desc = irq_to_desc(irq);
504
505 if (WARN_ON(!desc))
506 return;
507
508 if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
509 (IRQ_DISABLED|IRQ_PENDING)) {
510 shutdown_pirq(irq);
511 } else if (VALID_EVTCHN(evtchn)) {
512 unmask_evtchn(evtchn);
513 pirq_unmask_notify(irq);
514 }
515}
516
517static int find_irq_by_gsi(unsigned gsi)
518{
519 int irq;
520
521 for (irq = 0; irq < NR_IRQS; irq++) {
522 struct irq_info *info = info_for_irq(irq);
523
524 if (info == NULL || info->type != IRQT_PIRQ)
525 continue;
526
527 if (gsi_from_irq(irq) == gsi)
528 return irq;
529 }
530
531 return -1;
532}
533
534/*
535 * Allocate a physical irq, along with a vector. We don't assign an
536 * event channel until the irq actually started up. Return an
537 * existing irq if we've already got one for the gsi.
538 */
539int xen_allocate_pirq(unsigned gsi)
540{
541 int irq;
542 struct physdev_irq irq_op;
543
544 spin_lock(&irq_mapping_update_lock);
545
546 irq = find_irq_by_gsi(gsi);
547 if (irq != -1) {
548 printk(KERN_INFO "xen_allocate_pirq: returning irq %d for gsi %u\n",
549 irq, gsi);
550 goto out; /* XXX need refcount? */
551 }
552
553 if (identity_mapped_irq(gsi)) {
554 irq = gsi;
555 dynamic_irq_init(irq);
556 } else
557 irq = find_unbound_irq();
558
559 set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
560 handle_level_irq, "pirq");
561
562 irq_op.irq = irq;
563 if (HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
564 dynamic_irq_cleanup(irq);
565 irq = -ENOSPC;
566 goto out;
567 }
568
569 irq_info[irq] = mk_pirq_info(0, gsi, irq_op.vector);
570
571out:
572 spin_unlock(&irq_mapping_update_lock);
573
574 return irq;
575}
576
577int xen_vector_from_irq(unsigned irq)
578{
579 return vector_from_irq(irq);
580}
581
582int xen_gsi_from_irq(unsigned irq)
583{
584 return gsi_from_irq(irq);
585}
586
b536b4b9 587int bind_evtchn_to_irq(unsigned int evtchn)
e46cdb66
JF
588{
589 int irq;
590
591 spin_lock(&irq_mapping_update_lock);
592
593 irq = evtchn_to_irq[evtchn];
594
595 if (irq == -1) {
596 irq = find_unbound_irq();
597
e46cdb66 598 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
dffe2e1e 599 handle_edge_irq, "event");
e46cdb66
JF
600
601 evtchn_to_irq[evtchn] = irq;
ced40d0f 602 irq_info[irq] = mk_evtchn_info(evtchn);
e46cdb66
JF
603 }
604
e46cdb66
JF
605 spin_unlock(&irq_mapping_update_lock);
606
607 return irq;
608}
b536b4b9 609EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
e46cdb66 610
f87e4cac
JF
611static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
612{
613 struct evtchn_bind_ipi bind_ipi;
614 int evtchn, irq;
615
616 spin_lock(&irq_mapping_update_lock);
617
618 irq = per_cpu(ipi_to_irq, cpu)[ipi];
90af9514 619
f87e4cac
JF
620 if (irq == -1) {
621 irq = find_unbound_irq();
622 if (irq < 0)
623 goto out;
624
aaca4964
JF
625 set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
626 handle_percpu_irq, "ipi");
f87e4cac
JF
627
628 bind_ipi.vcpu = cpu;
629 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
630 &bind_ipi) != 0)
631 BUG();
632 evtchn = bind_ipi.port;
633
634 evtchn_to_irq[evtchn] = irq;
ced40d0f 635 irq_info[irq] = mk_ipi_info(evtchn, ipi);
f87e4cac
JF
636 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
637
638 bind_evtchn_to_cpu(evtchn, cpu);
639 }
640
f87e4cac
JF
641 out:
642 spin_unlock(&irq_mapping_update_lock);
643 return irq;
644}
645
646
e46cdb66
JF
647static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
648{
649 struct evtchn_bind_virq bind_virq;
650 int evtchn, irq;
651
652 spin_lock(&irq_mapping_update_lock);
653
654 irq = per_cpu(virq_to_irq, cpu)[virq];
655
656 if (irq == -1) {
657 bind_virq.virq = virq;
658 bind_virq.vcpu = cpu;
659 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
660 &bind_virq) != 0)
661 BUG();
662 evtchn = bind_virq.port;
663
664 irq = find_unbound_irq();
665
aaca4964
JF
666 set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
667 handle_percpu_irq, "virq");
e46cdb66
JF
668
669 evtchn_to_irq[evtchn] = irq;
ced40d0f 670 irq_info[irq] = mk_virq_info(evtchn, virq);
e46cdb66
JF
671
672 per_cpu(virq_to_irq, cpu)[virq] = irq;
673
674 bind_evtchn_to_cpu(evtchn, cpu);
675 }
676
e46cdb66
JF
677 spin_unlock(&irq_mapping_update_lock);
678
679 return irq;
680}
681
682static void unbind_from_irq(unsigned int irq)
683{
684 struct evtchn_close close;
685 int evtchn = evtchn_from_irq(irq);
686
687 spin_lock(&irq_mapping_update_lock);
688
d77bbd4d 689 if (VALID_EVTCHN(evtchn)) {
e46cdb66
JF
690 close.port = evtchn;
691 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
692 BUG();
693
694 switch (type_from_irq(irq)) {
695 case IRQT_VIRQ:
696 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
ced40d0f 697 [virq_from_irq(irq)] = -1;
e46cdb66 698 break;
d68d82af
AN
699 case IRQT_IPI:
700 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
ced40d0f 701 [ipi_from_irq(irq)] = -1;
d68d82af 702 break;
e46cdb66
JF
703 default:
704 break;
705 }
706
707 /* Closed ports are implicitly re-bound to VCPU0. */
708 bind_evtchn_to_cpu(evtchn, 0);
709
710 evtchn_to_irq[evtchn] = -1;
fed5ea87
IC
711 }
712
713 if (irq_info[irq].type != IRQT_UNBOUND) {
ced40d0f 714 irq_info[irq] = mk_unbound_info();
e46cdb66 715
77dff1c7 716 irq_free_desc(irq);
e46cdb66
JF
717 }
718
719 spin_unlock(&irq_mapping_update_lock);
720}
721
722int bind_evtchn_to_irqhandler(unsigned int evtchn,
7c239975 723 irq_handler_t handler,
e46cdb66
JF
724 unsigned long irqflags,
725 const char *devname, void *dev_id)
726{
727 unsigned int irq;
728 int retval;
729
730 irq = bind_evtchn_to_irq(evtchn);
731 retval = request_irq(irq, handler, irqflags, devname, dev_id);
732 if (retval != 0) {
733 unbind_from_irq(irq);
734 return retval;
735 }
736
737 return irq;
738}
739EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
740
741int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
7c239975 742 irq_handler_t handler,
e46cdb66
JF
743 unsigned long irqflags, const char *devname, void *dev_id)
744{
745 unsigned int irq;
746 int retval;
747
748 irq = bind_virq_to_irq(virq, cpu);
749 retval = request_irq(irq, handler, irqflags, devname, dev_id);
750 if (retval != 0) {
751 unbind_from_irq(irq);
752 return retval;
753 }
754
755 return irq;
756}
757EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
758
f87e4cac
JF
759int bind_ipi_to_irqhandler(enum ipi_vector ipi,
760 unsigned int cpu,
761 irq_handler_t handler,
762 unsigned long irqflags,
763 const char *devname,
764 void *dev_id)
765{
766 int irq, retval;
767
768 irq = bind_ipi_to_irq(ipi, cpu);
769 if (irq < 0)
770 return irq;
771
4877c737 772 irqflags |= IRQF_NO_SUSPEND;
f87e4cac
JF
773 retval = request_irq(irq, handler, irqflags, devname, dev_id);
774 if (retval != 0) {
775 unbind_from_irq(irq);
776 return retval;
777 }
778
779 return irq;
780}
781
e46cdb66
JF
782void unbind_from_irqhandler(unsigned int irq, void *dev_id)
783{
784 free_irq(irq, dev_id);
785 unbind_from_irq(irq);
786}
787EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
788
f87e4cac
JF
789void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
790{
791 int irq = per_cpu(ipi_to_irq, cpu)[vector];
792 BUG_ON(irq < 0);
793 notify_remote_via_irq(irq);
794}
795
ee523ca1
JF
796irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
797{
798 struct shared_info *sh = HYPERVISOR_shared_info;
799 int cpu = smp_processor_id();
800 int i;
801 unsigned long flags;
802 static DEFINE_SPINLOCK(debug_lock);
803
804 spin_lock_irqsave(&debug_lock, flags);
805
806 printk("vcpu %d\n ", cpu);
807
808 for_each_online_cpu(i) {
809 struct vcpu_info *v = per_cpu(xen_vcpu, i);
810 printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
e849c3e9 811 (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
ee523ca1
JF
812 v->evtchn_upcall_pending,
813 v->evtchn_pending_sel);
814 }
815 printk("pending:\n ");
816 for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
817 printk("%08lx%s", sh->evtchn_pending[i],
818 i % 8 == 0 ? "\n " : " ");
819 printk("\nmasks:\n ");
820 for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
821 printk("%08lx%s", sh->evtchn_mask[i],
822 i % 8 == 0 ? "\n " : " ");
823
824 printk("\nunmasked:\n ");
825 for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
826 printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
827 i % 8 == 0 ? "\n " : " ");
828
829 printk("\npending list:\n");
830 for(i = 0; i < NR_EVENT_CHANNELS; i++) {
831 if (sync_test_bit(i, sh->evtchn_pending)) {
832 printk(" %d: event %d -> irq %d\n",
ced40d0f
JF
833 cpu_from_evtchn(i), i,
834 evtchn_to_irq[i]);
ee523ca1
JF
835 }
836 }
837
838 spin_unlock_irqrestore(&debug_lock, flags);
839
840 return IRQ_HANDLED;
841}
842
245b2e70
TH
843static DEFINE_PER_CPU(unsigned, xed_nesting_count);
844
e46cdb66
JF
845/*
846 * Search the CPUs pending events bitmasks. For each one found, map
847 * the event number to an irq, and feed it into do_IRQ() for
848 * handling.
849 *
850 * Xen uses a two-level bitmap to speed searching. The first level is
851 * a bitset of words which contain pending event bits. The second
852 * level is a bitset of pending events themselves.
853 */
38e20b07 854static void __xen_evtchn_do_upcall(void)
e46cdb66
JF
855{
856 int cpu = get_cpu();
857 struct shared_info *s = HYPERVISOR_shared_info;
858 struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
229664be 859 unsigned count;
e46cdb66 860
229664be
JF
861 do {
862 unsigned long pending_words;
e46cdb66 863
229664be 864 vcpu_info->evtchn_upcall_pending = 0;
e46cdb66 865
245b2e70 866 if (__get_cpu_var(xed_nesting_count)++)
229664be 867 goto out;
e46cdb66 868
e849c3e9
IY
869#ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
870 /* Clear master flag /before/ clearing selector flag. */
6673cf63 871 wmb();
e849c3e9 872#endif
229664be
JF
873 pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
874 while (pending_words != 0) {
875 unsigned long pending_bits;
876 int word_idx = __ffs(pending_words);
877 pending_words &= ~(1UL << word_idx);
878
879 while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
880 int bit_idx = __ffs(pending_bits);
881 int port = (word_idx * BITS_PER_LONG) + bit_idx;
882 int irq = evtchn_to_irq[port];
ca4dbc66 883 struct irq_desc *desc;
229664be 884
ca4dbc66
EB
885 if (irq != -1) {
886 desc = irq_to_desc(irq);
887 if (desc)
888 generic_handle_irq_desc(irq, desc);
889 }
e46cdb66
JF
890 }
891 }
e46cdb66 892
229664be
JF
893 BUG_ON(!irqs_disabled());
894
245b2e70
TH
895 count = __get_cpu_var(xed_nesting_count);
896 __get_cpu_var(xed_nesting_count) = 0;
183d03cc 897 } while (count != 1 || vcpu_info->evtchn_upcall_pending);
229664be
JF
898
899out:
38e20b07
SY
900
901 put_cpu();
902}
903
904void xen_evtchn_do_upcall(struct pt_regs *regs)
905{
906 struct pt_regs *old_regs = set_irq_regs(regs);
907
908 exit_idle();
909 irq_enter();
910
911 __xen_evtchn_do_upcall();
912
3445a8fd
JF
913 irq_exit();
914 set_irq_regs(old_regs);
38e20b07 915}
3445a8fd 916
38e20b07
SY
917void xen_hvm_evtchn_do_upcall(void)
918{
919 __xen_evtchn_do_upcall();
e46cdb66 920}
183d03cc 921EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
e46cdb66 922
eb1e305f
JF
923/* Rebind a new event channel to an existing irq. */
924void rebind_evtchn_irq(int evtchn, int irq)
925{
d77bbd4d
JF
926 struct irq_info *info = info_for_irq(irq);
927
eb1e305f
JF
928 /* Make sure the irq is masked, since the new event channel
929 will also be masked. */
930 disable_irq(irq);
931
932 spin_lock(&irq_mapping_update_lock);
933
934 /* After resume the irq<->evtchn mappings are all cleared out */
935 BUG_ON(evtchn_to_irq[evtchn] != -1);
936 /* Expect irq to have been bound before,
d77bbd4d
JF
937 so there should be a proper type */
938 BUG_ON(info->type == IRQT_UNBOUND);
eb1e305f
JF
939
940 evtchn_to_irq[evtchn] = irq;
ced40d0f 941 irq_info[irq] = mk_evtchn_info(evtchn);
eb1e305f
JF
942
943 spin_unlock(&irq_mapping_update_lock);
944
945 /* new event channels are always bound to cpu 0 */
0de26520 946 irq_set_affinity(irq, cpumask_of(0));
eb1e305f
JF
947
948 /* Unmask the event channel. */
949 enable_irq(irq);
950}
951
e46cdb66 952/* Rebind an evtchn so that it gets delivered to a specific cpu */
d5dedd45 953static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
e46cdb66
JF
954{
955 struct evtchn_bind_vcpu bind_vcpu;
956 int evtchn = evtchn_from_irq(irq);
957
183d03cc
SS
958 /* events delivered via platform PCI interrupts are always
959 * routed to vcpu 0 */
960 if (!VALID_EVTCHN(evtchn) ||
961 (xen_hvm_domain() && !xen_have_vector_callback))
d5dedd45 962 return -1;
e46cdb66
JF
963
964 /* Send future instances of this interrupt to other vcpu. */
965 bind_vcpu.port = evtchn;
966 bind_vcpu.vcpu = tcpu;
967
968 /*
969 * If this fails, it usually just indicates that we're dealing with a
970 * virq or IPI channel, which don't actually need to be rebound. Ignore
971 * it, but don't do the xenlinux-level rebind in that case.
972 */
973 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
974 bind_evtchn_to_cpu(evtchn, tcpu);
e46cdb66 975
d5dedd45
YL
976 return 0;
977}
e46cdb66 978
d5dedd45 979static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
e46cdb66 980{
0de26520 981 unsigned tcpu = cpumask_first(dest);
d5dedd45
YL
982
983 return rebind_irq_to_cpu(irq, tcpu);
e46cdb66
JF
984}
985
642e0c88
IY
986int resend_irq_on_evtchn(unsigned int irq)
987{
988 int masked, evtchn = evtchn_from_irq(irq);
989 struct shared_info *s = HYPERVISOR_shared_info;
990
991 if (!VALID_EVTCHN(evtchn))
992 return 1;
993
994 masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
995 sync_set_bit(evtchn, s->evtchn_pending);
996 if (!masked)
997 unmask_evtchn(evtchn);
998
999 return 1;
1000}
1001
e46cdb66
JF
1002static void enable_dynirq(unsigned int irq)
1003{
1004 int evtchn = evtchn_from_irq(irq);
1005
1006 if (VALID_EVTCHN(evtchn))
1007 unmask_evtchn(evtchn);
1008}
1009
1010static void disable_dynirq(unsigned int irq)
1011{
1012 int evtchn = evtchn_from_irq(irq);
1013
1014 if (VALID_EVTCHN(evtchn))
1015 mask_evtchn(evtchn);
1016}
1017
1018static void ack_dynirq(unsigned int irq)
1019{
1020 int evtchn = evtchn_from_irq(irq);
1021
1022 move_native_irq(irq);
1023
1024 if (VALID_EVTCHN(evtchn))
1025 clear_evtchn(evtchn);
1026}
1027
1028static int retrigger_dynirq(unsigned int irq)
1029{
1030 int evtchn = evtchn_from_irq(irq);
ee8fa1c6 1031 struct shared_info *sh = HYPERVISOR_shared_info;
e46cdb66
JF
1032 int ret = 0;
1033
1034 if (VALID_EVTCHN(evtchn)) {
ee8fa1c6
JF
1035 int masked;
1036
1037 masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
1038 sync_set_bit(evtchn, sh->evtchn_pending);
1039 if (!masked)
1040 unmask_evtchn(evtchn);
e46cdb66
JF
1041 ret = 1;
1042 }
1043
1044 return ret;
1045}
1046
0e91398f
JF
1047static void restore_cpu_virqs(unsigned int cpu)
1048{
1049 struct evtchn_bind_virq bind_virq;
1050 int virq, irq, evtchn;
1051
1052 for (virq = 0; virq < NR_VIRQS; virq++) {
1053 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1054 continue;
1055
ced40d0f 1056 BUG_ON(virq_from_irq(irq) != virq);
0e91398f
JF
1057
1058 /* Get a new binding from Xen. */
1059 bind_virq.virq = virq;
1060 bind_virq.vcpu = cpu;
1061 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1062 &bind_virq) != 0)
1063 BUG();
1064 evtchn = bind_virq.port;
1065
1066 /* Record the new mapping. */
1067 evtchn_to_irq[evtchn] = irq;
ced40d0f 1068 irq_info[irq] = mk_virq_info(evtchn, virq);
0e91398f
JF
1069 bind_evtchn_to_cpu(evtchn, cpu);
1070
1071 /* Ready for use. */
1072 unmask_evtchn(evtchn);
1073 }
1074}
1075
1076static void restore_cpu_ipis(unsigned int cpu)
1077{
1078 struct evtchn_bind_ipi bind_ipi;
1079 int ipi, irq, evtchn;
1080
1081 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
1082 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
1083 continue;
1084
ced40d0f 1085 BUG_ON(ipi_from_irq(irq) != ipi);
0e91398f
JF
1086
1087 /* Get a new binding from Xen. */
1088 bind_ipi.vcpu = cpu;
1089 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1090 &bind_ipi) != 0)
1091 BUG();
1092 evtchn = bind_ipi.port;
1093
1094 /* Record the new mapping. */
1095 evtchn_to_irq[evtchn] = irq;
ced40d0f 1096 irq_info[irq] = mk_ipi_info(evtchn, ipi);
0e91398f
JF
1097 bind_evtchn_to_cpu(evtchn, cpu);
1098
1099 /* Ready for use. */
1100 unmask_evtchn(evtchn);
1101
1102 }
1103}
1104
2d9e1e2f
JF
1105/* Clear an irq's pending state, in preparation for polling on it */
1106void xen_clear_irq_pending(int irq)
1107{
1108 int evtchn = evtchn_from_irq(irq);
1109
1110 if (VALID_EVTCHN(evtchn))
1111 clear_evtchn(evtchn);
1112}
1113
168d2f46
JF
1114void xen_set_irq_pending(int irq)
1115{
1116 int evtchn = evtchn_from_irq(irq);
1117
1118 if (VALID_EVTCHN(evtchn))
1119 set_evtchn(evtchn);
1120}
1121
1122bool xen_test_irq_pending(int irq)
1123{
1124 int evtchn = evtchn_from_irq(irq);
1125 bool ret = false;
1126
1127 if (VALID_EVTCHN(evtchn))
1128 ret = test_evtchn(evtchn);
1129
1130 return ret;
1131}
1132
2d9e1e2f
JF
1133/* Poll waiting for an irq to become pending. In the usual case, the
1134 irq will be disabled so it won't deliver an interrupt. */
1135void xen_poll_irq(int irq)
1136{
1137 evtchn_port_t evtchn = evtchn_from_irq(irq);
1138
1139 if (VALID_EVTCHN(evtchn)) {
1140 struct sched_poll poll;
1141
1142 poll.nr_ports = 1;
1143 poll.timeout = 0;
ff3c5362 1144 set_xen_guest_handle(poll.ports, &evtchn);
2d9e1e2f
JF
1145
1146 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
1147 BUG();
1148 }
1149}
1150
0e91398f
JF
1151void xen_irq_resume(void)
1152{
1153 unsigned int cpu, irq, evtchn;
1154
1155 init_evtchn_cpu_bindings();
1156
1157 /* New event-channel space is not 'live' yet. */
1158 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1159 mask_evtchn(evtchn);
1160
1161 /* No IRQ <-> event-channel mappings. */
0b8f1efa 1162 for (irq = 0; irq < nr_irqs; irq++)
0e91398f
JF
1163 irq_info[irq].evtchn = 0; /* zap event-channel binding */
1164
1165 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1166 evtchn_to_irq[evtchn] = -1;
1167
1168 for_each_possible_cpu(cpu) {
1169 restore_cpu_virqs(cpu);
1170 restore_cpu_ipis(cpu);
1171 }
1172}
1173
e46cdb66
JF
1174static struct irq_chip xen_dynamic_chip __read_mostly = {
1175 .name = "xen-dyn",
54a353a0
JF
1176
1177 .disable = disable_dynirq,
e46cdb66
JF
1178 .mask = disable_dynirq,
1179 .unmask = enable_dynirq,
54a353a0 1180
e46cdb66
JF
1181 .ack = ack_dynirq,
1182 .set_affinity = set_affinity_irq,
1183 .retrigger = retrigger_dynirq,
1184};
1185
d46a78b0
JF
1186static struct irq_chip xen_pirq_chip __read_mostly = {
1187 .name = "xen-pirq",
1188
1189 .startup = startup_pirq,
1190 .shutdown = shutdown_pirq,
1191
1192 .enable = enable_pirq,
1193 .unmask = enable_pirq,
1194
1195 .disable = disable_pirq,
1196 .mask = disable_pirq,
1197
1198 .ack = ack_pirq,
1199 .end = end_pirq,
1200
1201 .set_affinity = set_affinity_irq,
1202
1203 .retrigger = retrigger_dynirq,
1204};
1205
aaca4964
JF
1206static struct irq_chip xen_percpu_chip __read_mostly = {
1207 .name = "xen-percpu",
1208
1209 .disable = disable_dynirq,
1210 .mask = disable_dynirq,
1211 .unmask = enable_dynirq,
1212
1213 .ack = ack_dynirq,
1214};
1215
38e20b07
SY
1216int xen_set_callback_via(uint64_t via)
1217{
1218 struct xen_hvm_param a;
1219 a.domid = DOMID_SELF;
1220 a.index = HVM_PARAM_CALLBACK_IRQ;
1221 a.value = via;
1222 return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
1223}
1224EXPORT_SYMBOL_GPL(xen_set_callback_via);
1225
ca65f9fc 1226#ifdef CONFIG_XEN_PVHVM
38e20b07
SY
1227/* Vector callbacks are better than PCI interrupts to receive event
1228 * channel notifications because we can receive vector callbacks on any
1229 * vcpu and we don't need PCI support or APIC interactions. */
1230void xen_callback_vector(void)
1231{
1232 int rc;
1233 uint64_t callback_via;
1234 if (xen_have_vector_callback) {
1235 callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
1236 rc = xen_set_callback_via(callback_via);
1237 if (rc) {
1238 printk(KERN_ERR "Request for Xen HVM callback vector"
1239 " failed.\n");
1240 xen_have_vector_callback = 0;
1241 return;
1242 }
1243 printk(KERN_INFO "Xen HVM callback vector for event delivery is "
1244 "enabled\n");
1245 /* in the restore case the vector has already been allocated */
1246 if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
1247 alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
1248 }
1249}
ca65f9fc
SS
1250#else
1251void xen_callback_vector(void) {}
1252#endif
38e20b07 1253
e46cdb66
JF
1254void __init xen_init_IRQ(void)
1255{
1256 int i;
c7a3589e 1257
a70c352a
PE
1258 cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
1259 GFP_KERNEL);
28e08861 1260 BUG_ON(cpu_evtchn_mask_p == NULL);
e46cdb66
JF
1261
1262 init_evtchn_cpu_bindings();
1263
1264 /* No event channels are 'live' right now. */
1265 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1266 mask_evtchn(i);
1267
38e20b07
SY
1268 if (xen_hvm_domain()) {
1269 xen_callback_vector();
1270 native_init_IRQ();
1271 } else {
1272 irq_ctx_init(smp_processor_id());
1273 }
e46cdb66 1274}