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Commit | Line | Data |
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8d725fac AF |
1 | /* |
2 | * QEMU float support | |
3 | * | |
4 | * Derived from SoftFloat. | |
5 | */ | |
158142c2 | 6 | |
a7d1ac78 PM |
7 | /* |
8 | =============================================================================== | |
158142c2 | 9 | This C source fragment is part of the SoftFloat IEC/IEEE Floating-point |
a7d1ac78 | 10 | Arithmetic Package, Release 2a. |
158142c2 FB |
11 | |
12 | Written by John R. Hauser. This work was made possible in part by the | |
13 | International Computer Science Institute, located at Suite 600, 1947 Center | |
14 | Street, Berkeley, California 94704. Funding was partially provided by the | |
15 | National Science Foundation under grant MIP-9311980. The original version | |
16 | of this code was written as part of a project to build a fixed-point vector | |
17 | processor in collaboration with the University of California at Berkeley, | |
18 | overseen by Profs. Nelson Morgan and John Wawrzynek. More information | |
a7d1ac78 | 19 | is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ |
158142c2 FB |
20 | arithmetic/SoftFloat.html'. |
21 | ||
a7d1ac78 PM |
22 | THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort |
23 | has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT | |
24 | TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO | |
25 | PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY | |
26 | AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. | |
158142c2 FB |
27 | |
28 | Derivative works are acceptable, even for commercial purposes, so long as | |
a7d1ac78 PM |
29 | (1) they include prominent notice that the work is derivative, and (2) they |
30 | include prominent notice akin to these four paragraphs for those parts of | |
31 | this code that are retained. | |
158142c2 | 32 | |
a7d1ac78 PM |
33 | =============================================================================== |
34 | */ | |
158142c2 | 35 | |
789ec7ce PB |
36 | #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) |
37 | #define SNAN_BIT_IS_ONE 1 | |
38 | #else | |
39 | #define SNAN_BIT_IS_ONE 0 | |
40 | #endif | |
41 | ||
213ff4e6 MF |
42 | #if defined(TARGET_XTENSA) |
43 | /* Define for architectures which deviate from IEEE in not supporting | |
44 | * signaling NaNs (so all NaNs are treated as quiet). | |
45 | */ | |
46 | #define NO_SIGNALING_NANS 1 | |
47 | #endif | |
48 | ||
789ec7ce PB |
49 | /*---------------------------------------------------------------------------- |
50 | | The pattern for a default generated half-precision NaN. | |
51 | *----------------------------------------------------------------------------*/ | |
52 | #if defined(TARGET_ARM) | |
53 | const float16 float16_default_nan = const_float16(0x7E00); | |
54 | #elif SNAN_BIT_IS_ONE | |
55 | const float16 float16_default_nan = const_float16(0x7DFF); | |
56 | #else | |
57 | const float16 float16_default_nan = const_float16(0xFE00); | |
58 | #endif | |
59 | ||
60 | /*---------------------------------------------------------------------------- | |
61 | | The pattern for a default generated single-precision NaN. | |
62 | *----------------------------------------------------------------------------*/ | |
63 | #if defined(TARGET_SPARC) | |
64 | const float32 float32_default_nan = const_float32(0x7FFFFFFF); | |
b81fe822 MF |
65 | #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \ |
66 | defined(TARGET_XTENSA) | |
789ec7ce PB |
67 | const float32 float32_default_nan = const_float32(0x7FC00000); |
68 | #elif SNAN_BIT_IS_ONE | |
69 | const float32 float32_default_nan = const_float32(0x7FBFFFFF); | |
70 | #else | |
71 | const float32 float32_default_nan = const_float32(0xFFC00000); | |
72 | #endif | |
73 | ||
74 | /*---------------------------------------------------------------------------- | |
75 | | The pattern for a default generated double-precision NaN. | |
76 | *----------------------------------------------------------------------------*/ | |
77 | #if defined(TARGET_SPARC) | |
78 | const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF )); | |
79 | #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) | |
80 | const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 )); | |
81 | #elif SNAN_BIT_IS_ONE | |
82 | const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF )); | |
83 | #else | |
84 | const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); | |
85 | #endif | |
86 | ||
87 | /*---------------------------------------------------------------------------- | |
88 | | The pattern for a default generated extended double-precision NaN. | |
89 | *----------------------------------------------------------------------------*/ | |
90 | #if SNAN_BIT_IS_ONE | |
91 | #define floatx80_default_nan_high 0x7FFF | |
92 | #define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) | |
93 | #else | |
94 | #define floatx80_default_nan_high 0xFFFF | |
95 | #define floatx80_default_nan_low LIT64( 0xC000000000000000 ) | |
96 | #endif | |
97 | ||
3bf7e40a AK |
98 | const floatx80 floatx80_default_nan |
99 | = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low); | |
789ec7ce PB |
100 | |
101 | /*---------------------------------------------------------------------------- | |
102 | | The pattern for a default generated quadruple-precision NaN. The `high' and | |
103 | | `low' values hold the most- and least-significant bits, respectively. | |
104 | *----------------------------------------------------------------------------*/ | |
105 | #if SNAN_BIT_IS_ONE | |
106 | #define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) | |
107 | #define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) | |
108 | #else | |
109 | #define float128_default_nan_high LIT64( 0xFFFF800000000000 ) | |
110 | #define float128_default_nan_low LIT64( 0x0000000000000000 ) | |
111 | #endif | |
112 | ||
3bf7e40a AK |
113 | const float128 float128_default_nan |
114 | = make_float128_init(float128_default_nan_high, float128_default_nan_low); | |
789ec7ce | 115 | |
158142c2 FB |
116 | /*---------------------------------------------------------------------------- |
117 | | Raises the exceptions specified by `flags'. Floating-point traps can be | |
118 | | defined here if desired. It is currently not possible for such a trap | |
119 | | to substitute a result value. If traps are not implemented, this routine | |
120 | | should be simply `float_exception_flags |= flags;'. | |
121 | *----------------------------------------------------------------------------*/ | |
122 | ||
123 | void float_raise( int8 flags STATUS_PARAM ) | |
124 | { | |
158142c2 | 125 | STATUS(float_exception_flags) |= flags; |
158142c2 FB |
126 | } |
127 | ||
128 | /*---------------------------------------------------------------------------- | |
129 | | Internal canonical NaN format. | |
130 | *----------------------------------------------------------------------------*/ | |
131 | typedef struct { | |
132 | flag sign; | |
bb98fe42 | 133 | uint64_t high, low; |
158142c2 FB |
134 | } commonNaNT; |
135 | ||
213ff4e6 MF |
136 | #ifdef NO_SIGNALING_NANS |
137 | int float16_is_quiet_nan(float16 a_) | |
138 | { | |
139 | return float16_is_any_nan(a_); | |
140 | } | |
141 | ||
142 | int float16_is_signaling_nan(float16 a_) | |
143 | { | |
144 | return 0; | |
145 | } | |
146 | #else | |
bb4d4bb3 PM |
147 | /*---------------------------------------------------------------------------- |
148 | | Returns 1 if the half-precision floating-point value `a' is a quiet | |
149 | | NaN; otherwise returns 0. | |
150 | *----------------------------------------------------------------------------*/ | |
151 | ||
152 | int float16_is_quiet_nan(float16 a_) | |
153 | { | |
154 | uint16_t a = float16_val(a_); | |
155 | #if SNAN_BIT_IS_ONE | |
156 | return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF); | |
157 | #else | |
158 | return ((a & ~0x8000) >= 0x7c80); | |
159 | #endif | |
160 | } | |
161 | ||
162 | /*---------------------------------------------------------------------------- | |
163 | | Returns 1 if the half-precision floating-point value `a' is a signaling | |
164 | | NaN; otherwise returns 0. | |
165 | *----------------------------------------------------------------------------*/ | |
166 | ||
167 | int float16_is_signaling_nan(float16 a_) | |
168 | { | |
169 | uint16_t a = float16_val(a_); | |
170 | #if SNAN_BIT_IS_ONE | |
171 | return ((a & ~0x8000) >= 0x7c80); | |
172 | #else | |
173 | return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF); | |
174 | #endif | |
175 | } | |
213ff4e6 | 176 | #endif |
bb4d4bb3 PM |
177 | |
178 | /*---------------------------------------------------------------------------- | |
179 | | Returns a quiet NaN if the half-precision floating point value `a' is a | |
180 | | signaling NaN; otherwise returns `a'. | |
181 | *----------------------------------------------------------------------------*/ | |
182 | float16 float16_maybe_silence_nan(float16 a_) | |
183 | { | |
184 | if (float16_is_signaling_nan(a_)) { | |
185 | #if SNAN_BIT_IS_ONE | |
d2fbca94 | 186 | # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) |
bb4d4bb3 PM |
187 | return float16_default_nan; |
188 | # else | |
189 | # error Rules for silencing a signaling NaN are target-specific | |
190 | # endif | |
191 | #else | |
192 | uint16_t a = float16_val(a_); | |
193 | a |= (1 << 9); | |
194 | return make_float16(a); | |
195 | #endif | |
196 | } | |
197 | return a_; | |
198 | } | |
199 | ||
f591e1be PM |
200 | /*---------------------------------------------------------------------------- |
201 | | Returns the result of converting the half-precision floating-point NaN | |
202 | | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid | |
203 | | exception is raised. | |
204 | *----------------------------------------------------------------------------*/ | |
205 | ||
206 | static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM ) | |
207 | { | |
208 | commonNaNT z; | |
209 | ||
210 | if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); | |
211 | z.sign = float16_val(a) >> 15; | |
212 | z.low = 0; | |
bb98fe42 | 213 | z.high = ((uint64_t) float16_val(a))<<54; |
f591e1be PM |
214 | return z; |
215 | } | |
216 | ||
600e30d2 PM |
217 | /*---------------------------------------------------------------------------- |
218 | | Returns the result of converting the canonical NaN `a' to the half- | |
219 | | precision floating-point format. | |
220 | *----------------------------------------------------------------------------*/ | |
221 | ||
222 | static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM) | |
223 | { | |
224 | uint16_t mantissa = a.high>>54; | |
225 | ||
226 | if (STATUS(default_nan_mode)) { | |
227 | return float16_default_nan; | |
228 | } | |
229 | ||
230 | if (mantissa) { | |
231 | return make_float16(((((uint16_t) a.sign) << 15) | |
232 | | (0x1F << 10) | mantissa)); | |
233 | } else { | |
234 | return float16_default_nan; | |
235 | } | |
236 | } | |
237 | ||
213ff4e6 MF |
238 | #ifdef NO_SIGNALING_NANS |
239 | int float32_is_quiet_nan(float32 a_) | |
240 | { | |
241 | return float32_is_any_nan(a_); | |
242 | } | |
243 | ||
244 | int float32_is_signaling_nan(float32 a_) | |
245 | { | |
246 | return 0; | |
247 | } | |
248 | #else | |
158142c2 | 249 | /*---------------------------------------------------------------------------- |
5a6932d5 TS |
250 | | Returns 1 if the single-precision floating-point value `a' is a quiet |
251 | | NaN; otherwise returns 0. | |
158142c2 FB |
252 | *----------------------------------------------------------------------------*/ |
253 | ||
18569871 | 254 | int float32_is_quiet_nan( float32 a_ ) |
158142c2 | 255 | { |
f090c9d4 | 256 | uint32_t a = float32_val(a_); |
5a6932d5 | 257 | #if SNAN_BIT_IS_ONE |
b645bb48 TS |
258 | return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
259 | #else | |
bb98fe42 | 260 | return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); |
b645bb48 | 261 | #endif |
158142c2 FB |
262 | } |
263 | ||
264 | /*---------------------------------------------------------------------------- | |
265 | | Returns 1 if the single-precision floating-point value `a' is a signaling | |
266 | | NaN; otherwise returns 0. | |
267 | *----------------------------------------------------------------------------*/ | |
268 | ||
f090c9d4 | 269 | int float32_is_signaling_nan( float32 a_ ) |
158142c2 | 270 | { |
f090c9d4 | 271 | uint32_t a = float32_val(a_); |
5a6932d5 | 272 | #if SNAN_BIT_IS_ONE |
bb98fe42 | 273 | return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); |
b645bb48 | 274 | #else |
158142c2 | 275 | return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); |
b645bb48 | 276 | #endif |
158142c2 | 277 | } |
213ff4e6 | 278 | #endif |
158142c2 | 279 | |
b408dbde PM |
280 | /*---------------------------------------------------------------------------- |
281 | | Returns a quiet NaN if the single-precision floating point value `a' is a | |
282 | | signaling NaN; otherwise returns `a'. | |
283 | *----------------------------------------------------------------------------*/ | |
284 | ||
285 | float32 float32_maybe_silence_nan( float32 a_ ) | |
286 | { | |
287 | if (float32_is_signaling_nan(a_)) { | |
b408dbde | 288 | #if SNAN_BIT_IS_ONE |
d2fbca94 | 289 | # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) |
93ae1c6f AJ |
290 | return float32_default_nan; |
291 | # else | |
292 | # error Rules for silencing a signaling NaN are target-specific | |
293 | # endif | |
b408dbde | 294 | #else |
bb98fe42 | 295 | uint32_t a = float32_val(a_); |
b408dbde | 296 | a |= (1 << 22); |
b408dbde | 297 | return make_float32(a); |
93ae1c6f | 298 | #endif |
b408dbde PM |
299 | } |
300 | return a_; | |
301 | } | |
302 | ||
158142c2 FB |
303 | /*---------------------------------------------------------------------------- |
304 | | Returns the result of converting the single-precision floating-point NaN | |
305 | | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid | |
306 | | exception is raised. | |
307 | *----------------------------------------------------------------------------*/ | |
308 | ||
309 | static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) | |
310 | { | |
311 | commonNaNT z; | |
312 | ||
313 | if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); | |
f090c9d4 | 314 | z.sign = float32_val(a)>>31; |
158142c2 | 315 | z.low = 0; |
bb98fe42 | 316 | z.high = ( (uint64_t) float32_val(a) )<<41; |
158142c2 | 317 | return z; |
158142c2 FB |
318 | } |
319 | ||
320 | /*---------------------------------------------------------------------------- | |
321 | | Returns the result of converting the canonical NaN `a' to the single- | |
322 | | precision floating-point format. | |
323 | *----------------------------------------------------------------------------*/ | |
324 | ||
bcd4d9af | 325 | static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM) |
158142c2 | 326 | { |
bb98fe42 | 327 | uint32_t mantissa = a.high>>41; |
bcd4d9af CL |
328 | |
329 | if ( STATUS(default_nan_mode) ) { | |
330 | return float32_default_nan; | |
331 | } | |
332 | ||
85016c98 TS |
333 | if ( mantissa ) |
334 | return make_float32( | |
bb98fe42 | 335 | ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); |
85016c98 TS |
336 | else |
337 | return float32_default_nan; | |
158142c2 FB |
338 | } |
339 | ||
354f211b PM |
340 | /*---------------------------------------------------------------------------- |
341 | | Select which NaN to propagate for a two-input operation. | |
342 | | IEEE754 doesn't specify all the details of this, so the | |
343 | | algorithm is target-specific. | |
344 | | The routine is passed various bits of information about the | |
345 | | two NaNs and should return 0 to select NaN a and 1 for NaN b. | |
346 | | Note that signalling NaNs are always squashed to quiet NaNs | |
1f398e08 AJ |
347 | | by the caller, by calling floatXX_maybe_silence_nan() before |
348 | | returning them. | |
354f211b PM |
349 | | |
350 | | aIsLargerSignificand is only valid if both a and b are NaNs | |
351 | | of some kind, and is true if a has the larger significand, | |
352 | | or if both a and b have the same significand but a is | |
353 | | positive but b is negative. It is only needed for the x87 | |
354 | | tie-break rule. | |
355 | *----------------------------------------------------------------------------*/ | |
356 | ||
011da610 PM |
357 | #if defined(TARGET_ARM) |
358 | static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, | |
359 | flag aIsLargerSignificand) | |
360 | { | |
361 | /* ARM mandated NaN propagation rules: take the first of: | |
362 | * 1. A if it is signaling | |
363 | * 2. B if it is signaling | |
364 | * 3. A (quiet) | |
365 | * 4. B (quiet) | |
366 | * A signaling NaN is always quietened before returning it. | |
367 | */ | |
368 | if (aIsSNaN) { | |
369 | return 0; | |
370 | } else if (bIsSNaN) { | |
371 | return 1; | |
372 | } else if (aIsQNaN) { | |
373 | return 0; | |
374 | } else { | |
375 | return 1; | |
376 | } | |
377 | } | |
084d19ba AJ |
378 | #elif defined(TARGET_MIPS) |
379 | static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, | |
380 | flag aIsLargerSignificand) | |
381 | { | |
382 | /* According to MIPS specifications, if one of the two operands is | |
383 | * a sNaN, a new qNaN has to be generated. This is done in | |
384 | * floatXX_maybe_silence_nan(). For qNaN inputs the specifications | |
385 | * says: "When possible, this QNaN result is one of the operand QNaN | |
386 | * values." In practice it seems that most implementations choose | |
387 | * the first operand if both operands are qNaN. In short this gives | |
388 | * the following rules: | |
389 | * 1. A if it is signaling | |
390 | * 2. B if it is signaling | |
391 | * 3. A (quiet) | |
392 | * 4. B (quiet) | |
393 | * A signaling NaN is always silenced before returning it. | |
394 | */ | |
395 | if (aIsSNaN) { | |
396 | return 0; | |
397 | } else if (bIsSNaN) { | |
398 | return 1; | |
399 | } else if (aIsQNaN) { | |
400 | return 0; | |
401 | } else { | |
402 | return 1; | |
403 | } | |
404 | } | |
b81fe822 | 405 | #elif defined(TARGET_PPC) || defined(TARGET_XTENSA) |
e024e881 AJ |
406 | static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, |
407 | flag aIsLargerSignificand) | |
408 | { | |
409 | /* PowerPC propagation rules: | |
410 | * 1. A if it sNaN or qNaN | |
411 | * 2. B if it sNaN or qNaN | |
412 | * A signaling NaN is always silenced before returning it. | |
413 | */ | |
414 | if (aIsSNaN || aIsQNaN) { | |
415 | return 0; | |
416 | } else { | |
417 | return 1; | |
418 | } | |
419 | } | |
011da610 | 420 | #else |
354f211b PM |
421 | static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, |
422 | flag aIsLargerSignificand) | |
423 | { | |
424 | /* This implements x87 NaN propagation rules: | |
425 | * SNaN + QNaN => return the QNaN | |
426 | * two SNaNs => return the one with the larger significand, silenced | |
427 | * two QNaNs => return the one with the larger significand | |
428 | * SNaN and a non-NaN => return the SNaN, silenced | |
429 | * QNaN and a non-NaN => return the QNaN | |
430 | * | |
431 | * If we get down to comparing significands and they are the same, | |
432 | * return the NaN with the positive sign bit (if any). | |
433 | */ | |
434 | if (aIsSNaN) { | |
435 | if (bIsSNaN) { | |
436 | return aIsLargerSignificand ? 0 : 1; | |
437 | } | |
438 | return bIsQNaN ? 1 : 0; | |
439 | } | |
440 | else if (aIsQNaN) { | |
441 | if (bIsSNaN || !bIsQNaN) | |
442 | return 0; | |
443 | else { | |
444 | return aIsLargerSignificand ? 0 : 1; | |
445 | } | |
446 | } else { | |
447 | return 1; | |
448 | } | |
449 | } | |
011da610 | 450 | #endif |
354f211b | 451 | |
369be8f6 PM |
452 | /*---------------------------------------------------------------------------- |
453 | | Select which NaN to propagate for a three-input operation. | |
454 | | For the moment we assume that no CPU needs the 'larger significand' | |
455 | | information. | |
456 | | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN | |
457 | *----------------------------------------------------------------------------*/ | |
458 | #if defined(TARGET_ARM) | |
459 | static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, | |
460 | flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM) | |
461 | { | |
462 | /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns | |
463 | * the default NaN | |
464 | */ | |
465 | if (infzero && cIsQNaN) { | |
466 | float_raise(float_flag_invalid STATUS_VAR); | |
467 | return 3; | |
468 | } | |
469 | ||
470 | /* This looks different from the ARM ARM pseudocode, because the ARM ARM | |
471 | * puts the operands to a fused mac operation (a*b)+c in the order c,a,b. | |
472 | */ | |
473 | if (cIsSNaN) { | |
474 | return 2; | |
475 | } else if (aIsSNaN) { | |
476 | return 0; | |
477 | } else if (bIsSNaN) { | |
478 | return 1; | |
479 | } else if (cIsQNaN) { | |
480 | return 2; | |
481 | } else if (aIsQNaN) { | |
482 | return 0; | |
483 | } else { | |
484 | return 1; | |
485 | } | |
486 | } | |
bbc1dede AJ |
487 | #elif defined(TARGET_MIPS) |
488 | static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, | |
489 | flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM) | |
490 | { | |
491 | /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns | |
492 | * the default NaN | |
493 | */ | |
494 | if (infzero) { | |
495 | float_raise(float_flag_invalid STATUS_VAR); | |
496 | return 3; | |
497 | } | |
498 | ||
499 | /* Prefer sNaN over qNaN, in the a, b, c order. */ | |
500 | if (aIsSNaN) { | |
501 | return 0; | |
502 | } else if (bIsSNaN) { | |
503 | return 1; | |
504 | } else if (cIsSNaN) { | |
505 | return 2; | |
506 | } else if (aIsQNaN) { | |
507 | return 0; | |
508 | } else if (bIsQNaN) { | |
509 | return 1; | |
510 | } else { | |
511 | return 2; | |
512 | } | |
513 | } | |
369be8f6 PM |
514 | #elif defined(TARGET_PPC) |
515 | static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, | |
516 | flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM) | |
517 | { | |
518 | /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer | |
519 | * to return an input NaN if we have one (ie c) rather than generating | |
520 | * a default NaN | |
521 | */ | |
522 | if (infzero) { | |
523 | float_raise(float_flag_invalid STATUS_VAR); | |
524 | return 2; | |
525 | } | |
526 | ||
527 | /* If fRA is a NaN return it; otherwise if fRB is a NaN return it; | |
528 | * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB | |
529 | */ | |
530 | if (aIsSNaN || aIsQNaN) { | |
531 | return 0; | |
532 | } else if (cIsSNaN || cIsQNaN) { | |
533 | return 2; | |
534 | } else { | |
535 | return 1; | |
536 | } | |
537 | } | |
538 | #else | |
539 | /* A default implementation: prefer a to b to c. | |
540 | * This is unlikely to actually match any real implementation. | |
541 | */ | |
542 | static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, | |
543 | flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM) | |
544 | { | |
545 | if (aIsSNaN || aIsQNaN) { | |
546 | return 0; | |
547 | } else if (bIsSNaN || bIsQNaN) { | |
548 | return 1; | |
549 | } else { | |
550 | return 2; | |
551 | } | |
552 | } | |
553 | #endif | |
554 | ||
158142c2 FB |
555 | /*---------------------------------------------------------------------------- |
556 | | Takes two single-precision floating-point values `a' and `b', one of which | |
557 | | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a | |
558 | | signaling NaN, the invalid exception is raised. | |
559 | *----------------------------------------------------------------------------*/ | |
560 | ||
561 | static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) | |
562 | { | |
d735d695 AJ |
563 | flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
564 | flag aIsLargerSignificand; | |
bb98fe42 | 565 | uint32_t av, bv; |
158142c2 | 566 | |
d735d695 | 567 | aIsQuietNaN = float32_is_quiet_nan( a ); |
158142c2 | 568 | aIsSignalingNaN = float32_is_signaling_nan( a ); |
d735d695 | 569 | bIsQuietNaN = float32_is_quiet_nan( b ); |
158142c2 | 570 | bIsSignalingNaN = float32_is_signaling_nan( b ); |
f090c9d4 PB |
571 | av = float32_val(a); |
572 | bv = float32_val(b); | |
1f398e08 | 573 | |
158142c2 | 574 | if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); |
354f211b | 575 | |
10201602 AJ |
576 | if ( STATUS(default_nan_mode) ) |
577 | return float32_default_nan; | |
578 | ||
bb98fe42 | 579 | if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) { |
354f211b | 580 | aIsLargerSignificand = 0; |
bb98fe42 | 581 | } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) { |
354f211b PM |
582 | aIsLargerSignificand = 1; |
583 | } else { | |
584 | aIsLargerSignificand = (av < bv) ? 1 : 0; | |
158142c2 | 585 | } |
354f211b | 586 | |
d735d695 | 587 | if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, |
354f211b | 588 | aIsLargerSignificand)) { |
1f398e08 | 589 | return float32_maybe_silence_nan(b); |
354f211b | 590 | } else { |
1f398e08 | 591 | return float32_maybe_silence_nan(a); |
158142c2 | 592 | } |
158142c2 FB |
593 | } |
594 | ||
369be8f6 PM |
595 | /*---------------------------------------------------------------------------- |
596 | | Takes three single-precision floating-point values `a', `b' and `c', one of | |
597 | | which is a NaN, and returns the appropriate NaN result. If any of `a', | |
598 | | `b' or `c' is a signaling NaN, the invalid exception is raised. | |
599 | | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case | |
600 | | obviously c is a NaN, and whether to propagate c or some other NaN is | |
601 | | implementation defined). | |
602 | *----------------------------------------------------------------------------*/ | |
603 | ||
604 | static float32 propagateFloat32MulAddNaN(float32 a, float32 b, | |
605 | float32 c, flag infzero STATUS_PARAM) | |
606 | { | |
607 | flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, | |
608 | cIsQuietNaN, cIsSignalingNaN; | |
609 | int which; | |
610 | ||
611 | aIsQuietNaN = float32_is_quiet_nan(a); | |
612 | aIsSignalingNaN = float32_is_signaling_nan(a); | |
613 | bIsQuietNaN = float32_is_quiet_nan(b); | |
614 | bIsSignalingNaN = float32_is_signaling_nan(b); | |
615 | cIsQuietNaN = float32_is_quiet_nan(c); | |
616 | cIsSignalingNaN = float32_is_signaling_nan(c); | |
617 | ||
618 | if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) { | |
619 | float_raise(float_flag_invalid STATUS_VAR); | |
620 | } | |
621 | ||
622 | which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN, | |
623 | bIsQuietNaN, bIsSignalingNaN, | |
624 | cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR); | |
625 | ||
626 | if (STATUS(default_nan_mode)) { | |
627 | /* Note that this check is after pickNaNMulAdd so that function | |
628 | * has an opportunity to set the Invalid flag. | |
629 | */ | |
630 | return float32_default_nan; | |
631 | } | |
632 | ||
633 | switch (which) { | |
634 | case 0: | |
635 | return float32_maybe_silence_nan(a); | |
636 | case 1: | |
637 | return float32_maybe_silence_nan(b); | |
638 | case 2: | |
639 | return float32_maybe_silence_nan(c); | |
640 | case 3: | |
641 | default: | |
642 | return float32_default_nan; | |
643 | } | |
644 | } | |
645 | ||
213ff4e6 MF |
646 | #ifdef NO_SIGNALING_NANS |
647 | int float64_is_quiet_nan(float64 a_) | |
648 | { | |
649 | return float64_is_any_nan(a_); | |
650 | } | |
651 | ||
652 | int float64_is_signaling_nan(float64 a_) | |
653 | { | |
654 | return 0; | |
655 | } | |
656 | #else | |
158142c2 | 657 | /*---------------------------------------------------------------------------- |
5a6932d5 TS |
658 | | Returns 1 if the double-precision floating-point value `a' is a quiet |
659 | | NaN; otherwise returns 0. | |
158142c2 FB |
660 | *----------------------------------------------------------------------------*/ |
661 | ||
18569871 | 662 | int float64_is_quiet_nan( float64 a_ ) |
158142c2 | 663 | { |
bb98fe42 | 664 | uint64_t a = float64_val(a_); |
5a6932d5 | 665 | #if SNAN_BIT_IS_ONE |
b645bb48 TS |
666 | return |
667 | ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) | |
668 | && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); | |
669 | #else | |
bb98fe42 | 670 | return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); |
b645bb48 | 671 | #endif |
158142c2 FB |
672 | } |
673 | ||
674 | /*---------------------------------------------------------------------------- | |
675 | | Returns 1 if the double-precision floating-point value `a' is a signaling | |
676 | | NaN; otherwise returns 0. | |
677 | *----------------------------------------------------------------------------*/ | |
678 | ||
f090c9d4 | 679 | int float64_is_signaling_nan( float64 a_ ) |
158142c2 | 680 | { |
bb98fe42 | 681 | uint64_t a = float64_val(a_); |
5a6932d5 | 682 | #if SNAN_BIT_IS_ONE |
bb98fe42 | 683 | return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); |
b645bb48 | 684 | #else |
158142c2 FB |
685 | return |
686 | ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) | |
687 | && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); | |
b645bb48 | 688 | #endif |
158142c2 | 689 | } |
213ff4e6 | 690 | #endif |
158142c2 | 691 | |
b408dbde PM |
692 | /*---------------------------------------------------------------------------- |
693 | | Returns a quiet NaN if the double-precision floating point value `a' is a | |
694 | | signaling NaN; otherwise returns `a'. | |
695 | *----------------------------------------------------------------------------*/ | |
696 | ||
697 | float64 float64_maybe_silence_nan( float64 a_ ) | |
698 | { | |
699 | if (float64_is_signaling_nan(a_)) { | |
b408dbde | 700 | #if SNAN_BIT_IS_ONE |
d2fbca94 | 701 | # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) |
93ae1c6f AJ |
702 | return float64_default_nan; |
703 | # else | |
704 | # error Rules for silencing a signaling NaN are target-specific | |
705 | # endif | |
b408dbde | 706 | #else |
bb98fe42 | 707 | uint64_t a = float64_val(a_); |
b408dbde | 708 | a |= LIT64( 0x0008000000000000 ); |
b408dbde | 709 | return make_float64(a); |
93ae1c6f | 710 | #endif |
b408dbde PM |
711 | } |
712 | return a_; | |
713 | } | |
714 | ||
158142c2 FB |
715 | /*---------------------------------------------------------------------------- |
716 | | Returns the result of converting the double-precision floating-point NaN | |
717 | | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid | |
718 | | exception is raised. | |
719 | *----------------------------------------------------------------------------*/ | |
720 | ||
721 | static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM) | |
722 | { | |
723 | commonNaNT z; | |
724 | ||
725 | if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR); | |
f090c9d4 | 726 | z.sign = float64_val(a)>>63; |
158142c2 | 727 | z.low = 0; |
f090c9d4 | 728 | z.high = float64_val(a)<<12; |
158142c2 | 729 | return z; |
158142c2 FB |
730 | } |
731 | ||
732 | /*---------------------------------------------------------------------------- | |
733 | | Returns the result of converting the canonical NaN `a' to the double- | |
734 | | precision floating-point format. | |
735 | *----------------------------------------------------------------------------*/ | |
736 | ||
bcd4d9af | 737 | static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM) |
158142c2 | 738 | { |
bb98fe42 | 739 | uint64_t mantissa = a.high>>12; |
85016c98 | 740 | |
bcd4d9af CL |
741 | if ( STATUS(default_nan_mode) ) { |
742 | return float64_default_nan; | |
743 | } | |
744 | ||
85016c98 TS |
745 | if ( mantissa ) |
746 | return make_float64( | |
bb98fe42 | 747 | ( ( (uint64_t) a.sign )<<63 ) |
85016c98 TS |
748 | | LIT64( 0x7FF0000000000000 ) |
749 | | ( a.high>>12 )); | |
750 | else | |
751 | return float64_default_nan; | |
158142c2 FB |
752 | } |
753 | ||
754 | /*---------------------------------------------------------------------------- | |
755 | | Takes two double-precision floating-point values `a' and `b', one of which | |
756 | | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a | |
757 | | signaling NaN, the invalid exception is raised. | |
758 | *----------------------------------------------------------------------------*/ | |
759 | ||
760 | static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) | |
761 | { | |
d735d695 AJ |
762 | flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
763 | flag aIsLargerSignificand; | |
bb98fe42 | 764 | uint64_t av, bv; |
158142c2 | 765 | |
d735d695 | 766 | aIsQuietNaN = float64_is_quiet_nan( a ); |
158142c2 | 767 | aIsSignalingNaN = float64_is_signaling_nan( a ); |
d735d695 | 768 | bIsQuietNaN = float64_is_quiet_nan( b ); |
158142c2 | 769 | bIsSignalingNaN = float64_is_signaling_nan( b ); |
f090c9d4 PB |
770 | av = float64_val(a); |
771 | bv = float64_val(b); | |
1f398e08 | 772 | |
158142c2 | 773 | if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); |
354f211b | 774 | |
10201602 AJ |
775 | if ( STATUS(default_nan_mode) ) |
776 | return float64_default_nan; | |
777 | ||
bb98fe42 | 778 | if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) { |
354f211b | 779 | aIsLargerSignificand = 0; |
bb98fe42 | 780 | } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) { |
354f211b PM |
781 | aIsLargerSignificand = 1; |
782 | } else { | |
783 | aIsLargerSignificand = (av < bv) ? 1 : 0; | |
158142c2 | 784 | } |
354f211b | 785 | |
d735d695 | 786 | if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, |
354f211b | 787 | aIsLargerSignificand)) { |
1f398e08 | 788 | return float64_maybe_silence_nan(b); |
354f211b | 789 | } else { |
1f398e08 | 790 | return float64_maybe_silence_nan(a); |
158142c2 | 791 | } |
158142c2 FB |
792 | } |
793 | ||
369be8f6 PM |
794 | /*---------------------------------------------------------------------------- |
795 | | Takes three double-precision floating-point values `a', `b' and `c', one of | |
796 | | which is a NaN, and returns the appropriate NaN result. If any of `a', | |
797 | | `b' or `c' is a signaling NaN, the invalid exception is raised. | |
798 | | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case | |
799 | | obviously c is a NaN, and whether to propagate c or some other NaN is | |
800 | | implementation defined). | |
801 | *----------------------------------------------------------------------------*/ | |
802 | ||
803 | static float64 propagateFloat64MulAddNaN(float64 a, float64 b, | |
804 | float64 c, flag infzero STATUS_PARAM) | |
805 | { | |
806 | flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, | |
807 | cIsQuietNaN, cIsSignalingNaN; | |
808 | int which; | |
809 | ||
810 | aIsQuietNaN = float64_is_quiet_nan(a); | |
811 | aIsSignalingNaN = float64_is_signaling_nan(a); | |
812 | bIsQuietNaN = float64_is_quiet_nan(b); | |
813 | bIsSignalingNaN = float64_is_signaling_nan(b); | |
814 | cIsQuietNaN = float64_is_quiet_nan(c); | |
815 | cIsSignalingNaN = float64_is_signaling_nan(c); | |
816 | ||
817 | if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) { | |
818 | float_raise(float_flag_invalid STATUS_VAR); | |
819 | } | |
820 | ||
821 | which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN, | |
822 | bIsQuietNaN, bIsSignalingNaN, | |
823 | cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR); | |
824 | ||
825 | if (STATUS(default_nan_mode)) { | |
826 | /* Note that this check is after pickNaNMulAdd so that function | |
827 | * has an opportunity to set the Invalid flag. | |
828 | */ | |
829 | return float64_default_nan; | |
830 | } | |
831 | ||
832 | switch (which) { | |
833 | case 0: | |
834 | return float64_maybe_silence_nan(a); | |
835 | case 1: | |
836 | return float64_maybe_silence_nan(b); | |
837 | case 2: | |
838 | return float64_maybe_silence_nan(c); | |
839 | case 3: | |
840 | default: | |
841 | return float64_default_nan; | |
842 | } | |
843 | } | |
844 | ||
213ff4e6 MF |
845 | #ifdef NO_SIGNALING_NANS |
846 | int floatx80_is_quiet_nan(floatx80 a_) | |
847 | { | |
848 | return floatx80_is_any_nan(a_); | |
849 | } | |
850 | ||
851 | int floatx80_is_signaling_nan(floatx80 a_) | |
852 | { | |
853 | return 0; | |
854 | } | |
855 | #else | |
158142c2 FB |
856 | /*---------------------------------------------------------------------------- |
857 | | Returns 1 if the extended double-precision floating-point value `a' is a | |
de4af5f7 AJ |
858 | | quiet NaN; otherwise returns 0. This slightly differs from the same |
859 | | function for other types as floatx80 has an explicit bit. | |
158142c2 FB |
860 | *----------------------------------------------------------------------------*/ |
861 | ||
18569871 | 862 | int floatx80_is_quiet_nan( floatx80 a ) |
158142c2 | 863 | { |
5a6932d5 | 864 | #if SNAN_BIT_IS_ONE |
bb98fe42 | 865 | uint64_t aLow; |
158142c2 | 866 | |
5a6932d5 TS |
867 | aLow = a.low & ~ LIT64( 0x4000000000000000 ); |
868 | return | |
869 | ( ( a.high & 0x7FFF ) == 0x7FFF ) | |
bb98fe42 | 870 | && (uint64_t) ( aLow<<1 ) |
5a6932d5 TS |
871 | && ( a.low == aLow ); |
872 | #else | |
de4af5f7 | 873 | return ( ( a.high & 0x7FFF ) == 0x7FFF ) |
bb98fe42 | 874 | && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); |
5a6932d5 | 875 | #endif |
158142c2 FB |
876 | } |
877 | ||
878 | /*---------------------------------------------------------------------------- | |
879 | | Returns 1 if the extended double-precision floating-point value `a' is a | |
de4af5f7 AJ |
880 | | signaling NaN; otherwise returns 0. This slightly differs from the same |
881 | | function for other types as floatx80 has an explicit bit. | |
158142c2 FB |
882 | *----------------------------------------------------------------------------*/ |
883 | ||
750afe93 | 884 | int floatx80_is_signaling_nan( floatx80 a ) |
158142c2 | 885 | { |
5a6932d5 | 886 | #if SNAN_BIT_IS_ONE |
de4af5f7 | 887 | return ( ( a.high & 0x7FFF ) == 0x7FFF ) |
bb98fe42 | 888 | && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); |
5a6932d5 | 889 | #else |
bb98fe42 | 890 | uint64_t aLow; |
158142c2 FB |
891 | |
892 | aLow = a.low & ~ LIT64( 0x4000000000000000 ); | |
893 | return | |
894 | ( ( a.high & 0x7FFF ) == 0x7FFF ) | |
bb98fe42 | 895 | && (uint64_t) ( aLow<<1 ) |
158142c2 | 896 | && ( a.low == aLow ); |
5a6932d5 | 897 | #endif |
158142c2 | 898 | } |
213ff4e6 | 899 | #endif |
158142c2 | 900 | |
f6a7d92a AJ |
901 | /*---------------------------------------------------------------------------- |
902 | | Returns a quiet NaN if the extended double-precision floating point value | |
903 | | `a' is a signaling NaN; otherwise returns `a'. | |
904 | *----------------------------------------------------------------------------*/ | |
905 | ||
906 | floatx80 floatx80_maybe_silence_nan( floatx80 a ) | |
907 | { | |
908 | if (floatx80_is_signaling_nan(a)) { | |
909 | #if SNAN_BIT_IS_ONE | |
d2fbca94 | 910 | # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) |
f6a7d92a AJ |
911 | a.low = floatx80_default_nan_low; |
912 | a.high = floatx80_default_nan_high; | |
913 | # else | |
914 | # error Rules for silencing a signaling NaN are target-specific | |
915 | # endif | |
916 | #else | |
917 | a.low |= LIT64( 0xC000000000000000 ); | |
918 | return a; | |
919 | #endif | |
920 | } | |
921 | return a; | |
922 | } | |
923 | ||
158142c2 FB |
924 | /*---------------------------------------------------------------------------- |
925 | | Returns the result of converting the extended double-precision floating- | |
926 | | point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the | |
927 | | invalid exception is raised. | |
928 | *----------------------------------------------------------------------------*/ | |
929 | ||
930 | static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM) | |
931 | { | |
932 | commonNaNT z; | |
933 | ||
934 | if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR); | |
e2f42204 AJ |
935 | if ( a.low >> 63 ) { |
936 | z.sign = a.high >> 15; | |
937 | z.low = 0; | |
938 | z.high = a.low << 1; | |
939 | } else { | |
940 | z.sign = floatx80_default_nan_high >> 15; | |
941 | z.low = 0; | |
942 | z.high = floatx80_default_nan_low << 1; | |
943 | } | |
158142c2 | 944 | return z; |
158142c2 FB |
945 | } |
946 | ||
947 | /*---------------------------------------------------------------------------- | |
948 | | Returns the result of converting the canonical NaN `a' to the extended | |
949 | | double-precision floating-point format. | |
950 | *----------------------------------------------------------------------------*/ | |
951 | ||
bcd4d9af | 952 | static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM) |
158142c2 FB |
953 | { |
954 | floatx80 z; | |
955 | ||
bcd4d9af CL |
956 | if ( STATUS(default_nan_mode) ) { |
957 | z.low = floatx80_default_nan_low; | |
958 | z.high = floatx80_default_nan_high; | |
959 | return z; | |
960 | } | |
961 | ||
e2f42204 AJ |
962 | if (a.high >> 1) { |
963 | z.low = LIT64( 0x8000000000000000 ) | a.high >> 1; | |
964 | z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF; | |
965 | } else { | |
85016c98 | 966 | z.low = floatx80_default_nan_low; |
e2f42204 AJ |
967 | z.high = floatx80_default_nan_high; |
968 | } | |
969 | ||
158142c2 | 970 | return z; |
158142c2 FB |
971 | } |
972 | ||
973 | /*---------------------------------------------------------------------------- | |
974 | | Takes two extended double-precision floating-point values `a' and `b', one | |
975 | | of which is a NaN, and returns the appropriate NaN result. If either `a' or | |
976 | | `b' is a signaling NaN, the invalid exception is raised. | |
977 | *----------------------------------------------------------------------------*/ | |
978 | ||
979 | static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM) | |
980 | { | |
d735d695 AJ |
981 | flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
982 | flag aIsLargerSignificand; | |
158142c2 | 983 | |
d735d695 | 984 | aIsQuietNaN = floatx80_is_quiet_nan( a ); |
158142c2 | 985 | aIsSignalingNaN = floatx80_is_signaling_nan( a ); |
d735d695 | 986 | bIsQuietNaN = floatx80_is_quiet_nan( b ); |
158142c2 | 987 | bIsSignalingNaN = floatx80_is_signaling_nan( b ); |
1f398e08 | 988 | |
158142c2 | 989 | if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); |
354f211b | 990 | |
10201602 AJ |
991 | if ( STATUS(default_nan_mode) ) { |
992 | a.low = floatx80_default_nan_low; | |
993 | a.high = floatx80_default_nan_high; | |
994 | return a; | |
995 | } | |
996 | ||
354f211b PM |
997 | if (a.low < b.low) { |
998 | aIsLargerSignificand = 0; | |
999 | } else if (b.low < a.low) { | |
1000 | aIsLargerSignificand = 1; | |
1001 | } else { | |
1002 | aIsLargerSignificand = (a.high < b.high) ? 1 : 0; | |
158142c2 | 1003 | } |
354f211b | 1004 | |
d735d695 | 1005 | if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, |
354f211b | 1006 | aIsLargerSignificand)) { |
1f398e08 | 1007 | return floatx80_maybe_silence_nan(b); |
354f211b | 1008 | } else { |
1f398e08 | 1009 | return floatx80_maybe_silence_nan(a); |
158142c2 | 1010 | } |
158142c2 FB |
1011 | } |
1012 | ||
213ff4e6 MF |
1013 | #ifdef NO_SIGNALING_NANS |
1014 | int float128_is_quiet_nan(float128 a_) | |
1015 | { | |
1016 | return float128_is_any_nan(a_); | |
1017 | } | |
1018 | ||
1019 | int float128_is_signaling_nan(float128 a_) | |
1020 | { | |
1021 | return 0; | |
1022 | } | |
1023 | #else | |
158142c2 | 1024 | /*---------------------------------------------------------------------------- |
5a6932d5 TS |
1025 | | Returns 1 if the quadruple-precision floating-point value `a' is a quiet |
1026 | | NaN; otherwise returns 0. | |
158142c2 FB |
1027 | *----------------------------------------------------------------------------*/ |
1028 | ||
18569871 | 1029 | int float128_is_quiet_nan( float128 a ) |
158142c2 | 1030 | { |
5a6932d5 TS |
1031 | #if SNAN_BIT_IS_ONE |
1032 | return | |
1033 | ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) | |
1034 | && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); | |
1035 | #else | |
158142c2 | 1036 | return |
bb98fe42 | 1037 | ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) |
158142c2 | 1038 | && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); |
5a6932d5 | 1039 | #endif |
158142c2 FB |
1040 | } |
1041 | ||
1042 | /*---------------------------------------------------------------------------- | |
1043 | | Returns 1 if the quadruple-precision floating-point value `a' is a | |
1044 | | signaling NaN; otherwise returns 0. | |
1045 | *----------------------------------------------------------------------------*/ | |
1046 | ||
750afe93 | 1047 | int float128_is_signaling_nan( float128 a ) |
158142c2 | 1048 | { |
5a6932d5 TS |
1049 | #if SNAN_BIT_IS_ONE |
1050 | return | |
bb98fe42 | 1051 | ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) |
5a6932d5 TS |
1052 | && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); |
1053 | #else | |
158142c2 FB |
1054 | return |
1055 | ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) | |
1056 | && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); | |
5a6932d5 | 1057 | #endif |
158142c2 | 1058 | } |
213ff4e6 | 1059 | #endif |
158142c2 | 1060 | |
f6a7d92a AJ |
1061 | /*---------------------------------------------------------------------------- |
1062 | | Returns a quiet NaN if the quadruple-precision floating point value `a' is | |
1063 | | a signaling NaN; otherwise returns `a'. | |
1064 | *----------------------------------------------------------------------------*/ | |
1065 | ||
1066 | float128 float128_maybe_silence_nan( float128 a ) | |
1067 | { | |
1068 | if (float128_is_signaling_nan(a)) { | |
1069 | #if SNAN_BIT_IS_ONE | |
d2fbca94 | 1070 | # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) |
f6a7d92a AJ |
1071 | a.low = float128_default_nan_low; |
1072 | a.high = float128_default_nan_high; | |
1073 | # else | |
1074 | # error Rules for silencing a signaling NaN are target-specific | |
1075 | # endif | |
1076 | #else | |
1077 | a.high |= LIT64( 0x0000800000000000 ); | |
1078 | return a; | |
1079 | #endif | |
1080 | } | |
1081 | return a; | |
1082 | } | |
1083 | ||
158142c2 FB |
1084 | /*---------------------------------------------------------------------------- |
1085 | | Returns the result of converting the quadruple-precision floating-point NaN | |
1086 | | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid | |
1087 | | exception is raised. | |
1088 | *----------------------------------------------------------------------------*/ | |
1089 | ||
1090 | static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM) | |
1091 | { | |
1092 | commonNaNT z; | |
1093 | ||
1094 | if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR); | |
1095 | z.sign = a.high>>63; | |
1096 | shortShift128Left( a.high, a.low, 16, &z.high, &z.low ); | |
1097 | return z; | |
158142c2 FB |
1098 | } |
1099 | ||
1100 | /*---------------------------------------------------------------------------- | |
1101 | | Returns the result of converting the canonical NaN `a' to the quadruple- | |
1102 | | precision floating-point format. | |
1103 | *----------------------------------------------------------------------------*/ | |
1104 | ||
bcd4d9af | 1105 | static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM) |
158142c2 FB |
1106 | { |
1107 | float128 z; | |
1108 | ||
bcd4d9af CL |
1109 | if ( STATUS(default_nan_mode) ) { |
1110 | z.low = float128_default_nan_low; | |
1111 | z.high = float128_default_nan_high; | |
1112 | return z; | |
1113 | } | |
1114 | ||
158142c2 | 1115 | shift128Right( a.high, a.low, 16, &z.high, &z.low ); |
bb98fe42 | 1116 | z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); |
158142c2 | 1117 | return z; |
158142c2 FB |
1118 | } |
1119 | ||
1120 | /*---------------------------------------------------------------------------- | |
1121 | | Takes two quadruple-precision floating-point values `a' and `b', one of | |
1122 | | which is a NaN, and returns the appropriate NaN result. If either `a' or | |
1123 | | `b' is a signaling NaN, the invalid exception is raised. | |
1124 | *----------------------------------------------------------------------------*/ | |
1125 | ||
1126 | static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM) | |
1127 | { | |
d735d695 AJ |
1128 | flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; |
1129 | flag aIsLargerSignificand; | |
158142c2 | 1130 | |
d735d695 | 1131 | aIsQuietNaN = float128_is_quiet_nan( a ); |
158142c2 | 1132 | aIsSignalingNaN = float128_is_signaling_nan( a ); |
d735d695 | 1133 | bIsQuietNaN = float128_is_quiet_nan( b ); |
158142c2 | 1134 | bIsSignalingNaN = float128_is_signaling_nan( b ); |
1f398e08 | 1135 | |
158142c2 | 1136 | if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); |
354f211b | 1137 | |
10201602 AJ |
1138 | if ( STATUS(default_nan_mode) ) { |
1139 | a.low = float128_default_nan_low; | |
1140 | a.high = float128_default_nan_high; | |
1141 | return a; | |
1142 | } | |
1143 | ||
354f211b PM |
1144 | if (lt128(a.high<<1, a.low, b.high<<1, b.low)) { |
1145 | aIsLargerSignificand = 0; | |
1146 | } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) { | |
1147 | aIsLargerSignificand = 1; | |
1148 | } else { | |
1149 | aIsLargerSignificand = (a.high < b.high) ? 1 : 0; | |
158142c2 | 1150 | } |
354f211b | 1151 | |
d735d695 | 1152 | if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, |
354f211b | 1153 | aIsLargerSignificand)) { |
1f398e08 | 1154 | return float128_maybe_silence_nan(b); |
354f211b | 1155 | } else { |
1f398e08 | 1156 | return float128_maybe_silence_nan(a); |
158142c2 | 1157 | } |
158142c2 FB |
1158 | } |
1159 |