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602cbe91 DS |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | ||
3 | #ifndef BTRFS_MISC_H | |
4 | #define BTRFS_MISC_H | |
5 | ||
6 | #include <linux/sched.h> | |
7 | #include <linux/wait.h> | |
784352fe | 8 | #include <asm/div64.h> |
602cbe91 DS |
9 | |
10 | #define in_range(b, first, len) ((b) >= (first) && (b) < (first) + (len)) | |
11 | ||
12 | static inline void cond_wake_up(struct wait_queue_head *wq) | |
13 | { | |
14 | /* | |
15 | * This implies a full smp_mb barrier, see comments for | |
16 | * waitqueue_active why. | |
17 | */ | |
18 | if (wq_has_sleeper(wq)) | |
19 | wake_up(wq); | |
20 | } | |
21 | ||
22 | static inline void cond_wake_up_nomb(struct wait_queue_head *wq) | |
23 | { | |
24 | /* | |
25 | * Special case for conditional wakeup where the barrier required for | |
26 | * waitqueue_active is implied by some of the preceding code. Eg. one | |
27 | * of such atomic operations (atomic_dec_and_return, ...), or a | |
28 | * unlock/lock sequence, etc. | |
29 | */ | |
30 | if (waitqueue_active(wq)) | |
31 | wake_up(wq); | |
32 | } | |
33 | ||
784352fe DS |
34 | static inline u64 div_factor(u64 num, int factor) |
35 | { | |
36 | if (factor == 10) | |
37 | return num; | |
38 | num *= factor; | |
39 | return div_u64(num, 10); | |
40 | } | |
41 | ||
42 | static inline u64 div_factor_fine(u64 num, int factor) | |
43 | { | |
44 | if (factor == 100) | |
45 | return num; | |
46 | num *= factor; | |
47 | return div_u64(num, 100); | |
48 | } | |
49 | ||
79c8264e DS |
50 | /* Copy of is_power_of_two that is 64bit safe */ |
51 | static inline bool is_power_of_two_u64(u64 n) | |
52 | { | |
53 | return n != 0 && (n & (n - 1)) == 0; | |
54 | } | |
55 | ||
56 | static inline bool has_single_bit_set(u64 n) | |
57 | { | |
58 | return is_power_of_two_u64(n); | |
59 | } | |
60 | ||
602cbe91 | 61 | #endif |