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b4608c04 FB |
1 | /* |
2 | * gdb server stub | |
3 | * | |
3475187d | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
b4608c04 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
978efd6a | 20 | #include "config.h" |
1fddef4b FB |
21 | #ifdef CONFIG_USER_ONLY |
22 | #include <stdlib.h> | |
23 | #include <stdio.h> | |
24 | #include <stdarg.h> | |
25 | #include <string.h> | |
26 | #include <errno.h> | |
27 | #include <unistd.h> | |
978efd6a | 28 | #include <fcntl.h> |
1fddef4b FB |
29 | |
30 | #include "qemu.h" | |
31 | #else | |
67b915a5 | 32 | #include "vl.h" |
1fddef4b | 33 | #endif |
67b915a5 | 34 | |
8f447cc7 FB |
35 | #include "qemu_socket.h" |
36 | #ifdef _WIN32 | |
37 | /* XXX: these constants may be independent of the host ones even for Unix */ | |
38 | #ifndef SIGTRAP | |
39 | #define SIGTRAP 5 | |
40 | #endif | |
41 | #ifndef SIGINT | |
42 | #define SIGINT 2 | |
43 | #endif | |
44 | #else | |
b4608c04 | 45 | #include <signal.h> |
8f447cc7 | 46 | #endif |
b4608c04 | 47 | |
4abe615b | 48 | //#define DEBUG_GDB |
b4608c04 | 49 | |
858693c6 FB |
50 | enum RSState { |
51 | RS_IDLE, | |
52 | RS_GETLINE, | |
53 | RS_CHKSUM1, | |
54 | RS_CHKSUM2, | |
55 | }; | |
1fddef4b FB |
56 | /* XXX: This is not thread safe. Do we care? */ |
57 | static int gdbserver_fd = -1; | |
b4608c04 | 58 | |
858693c6 | 59 | typedef struct GDBState { |
6a00d601 | 60 | CPUState *env; /* current CPU */ |
41625033 | 61 | enum RSState state; /* parsing state */ |
858693c6 FB |
62 | int fd; |
63 | char line_buf[4096]; | |
64 | int line_buf_index; | |
65 | int line_csum; | |
41625033 FB |
66 | #ifdef CONFIG_USER_ONLY |
67 | int running_state; | |
68 | #endif | |
858693c6 | 69 | } GDBState; |
b4608c04 | 70 | |
1fddef4b FB |
71 | #ifdef CONFIG_USER_ONLY |
72 | /* XXX: remove this hack. */ | |
73 | static GDBState gdbserver_state; | |
74 | #endif | |
75 | ||
858693c6 | 76 | static int get_char(GDBState *s) |
b4608c04 FB |
77 | { |
78 | uint8_t ch; | |
79 | int ret; | |
80 | ||
81 | for(;;) { | |
8f447cc7 | 82 | ret = recv(s->fd, &ch, 1, 0); |
b4608c04 FB |
83 | if (ret < 0) { |
84 | if (errno != EINTR && errno != EAGAIN) | |
85 | return -1; | |
86 | } else if (ret == 0) { | |
87 | return -1; | |
88 | } else { | |
89 | break; | |
90 | } | |
91 | } | |
92 | return ch; | |
93 | } | |
94 | ||
858693c6 | 95 | static void put_buffer(GDBState *s, const uint8_t *buf, int len) |
b4608c04 FB |
96 | { |
97 | int ret; | |
98 | ||
99 | while (len > 0) { | |
8f447cc7 | 100 | ret = send(s->fd, buf, len, 0); |
b4608c04 FB |
101 | if (ret < 0) { |
102 | if (errno != EINTR && errno != EAGAIN) | |
103 | return; | |
104 | } else { | |
105 | buf += ret; | |
106 | len -= ret; | |
107 | } | |
108 | } | |
109 | } | |
110 | ||
111 | static inline int fromhex(int v) | |
112 | { | |
113 | if (v >= '0' && v <= '9') | |
114 | return v - '0'; | |
115 | else if (v >= 'A' && v <= 'F') | |
116 | return v - 'A' + 10; | |
117 | else if (v >= 'a' && v <= 'f') | |
118 | return v - 'a' + 10; | |
119 | else | |
120 | return 0; | |
121 | } | |
122 | ||
123 | static inline int tohex(int v) | |
124 | { | |
125 | if (v < 10) | |
126 | return v + '0'; | |
127 | else | |
128 | return v - 10 + 'a'; | |
129 | } | |
130 | ||
131 | static void memtohex(char *buf, const uint8_t *mem, int len) | |
132 | { | |
133 | int i, c; | |
134 | char *q; | |
135 | q = buf; | |
136 | for(i = 0; i < len; i++) { | |
137 | c = mem[i]; | |
138 | *q++ = tohex(c >> 4); | |
139 | *q++ = tohex(c & 0xf); | |
140 | } | |
141 | *q = '\0'; | |
142 | } | |
143 | ||
144 | static void hextomem(uint8_t *mem, const char *buf, int len) | |
145 | { | |
146 | int i; | |
147 | ||
148 | for(i = 0; i < len; i++) { | |
149 | mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); | |
150 | buf += 2; | |
151 | } | |
152 | } | |
153 | ||
b4608c04 | 154 | /* return -1 if error, 0 if OK */ |
858693c6 | 155 | static int put_packet(GDBState *s, char *buf) |
b4608c04 FB |
156 | { |
157 | char buf1[3]; | |
158 | int len, csum, ch, i; | |
159 | ||
160 | #ifdef DEBUG_GDB | |
161 | printf("reply='%s'\n", buf); | |
162 | #endif | |
163 | ||
164 | for(;;) { | |
165 | buf1[0] = '$'; | |
858693c6 | 166 | put_buffer(s, buf1, 1); |
b4608c04 | 167 | len = strlen(buf); |
858693c6 | 168 | put_buffer(s, buf, len); |
b4608c04 FB |
169 | csum = 0; |
170 | for(i = 0; i < len; i++) { | |
171 | csum += buf[i]; | |
172 | } | |
173 | buf1[0] = '#'; | |
174 | buf1[1] = tohex((csum >> 4) & 0xf); | |
175 | buf1[2] = tohex((csum) & 0xf); | |
176 | ||
858693c6 | 177 | put_buffer(s, buf1, 3); |
b4608c04 | 178 | |
858693c6 | 179 | ch = get_char(s); |
b4608c04 FB |
180 | if (ch < 0) |
181 | return -1; | |
182 | if (ch == '+') | |
183 | break; | |
184 | } | |
185 | return 0; | |
186 | } | |
187 | ||
6da41eaf FB |
188 | #if defined(TARGET_I386) |
189 | ||
6da41eaf FB |
190 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
191 | { | |
e95c8d51 | 192 | uint32_t *registers = (uint32_t *)mem_buf; |
6da41eaf FB |
193 | int i, fpus; |
194 | ||
195 | for(i = 0; i < 8; i++) { | |
e95c8d51 | 196 | registers[i] = env->regs[i]; |
6da41eaf | 197 | } |
e95c8d51 FB |
198 | registers[8] = env->eip; |
199 | registers[9] = env->eflags; | |
200 | registers[10] = env->segs[R_CS].selector; | |
201 | registers[11] = env->segs[R_SS].selector; | |
202 | registers[12] = env->segs[R_DS].selector; | |
203 | registers[13] = env->segs[R_ES].selector; | |
204 | registers[14] = env->segs[R_FS].selector; | |
205 | registers[15] = env->segs[R_GS].selector; | |
6da41eaf FB |
206 | /* XXX: convert floats */ |
207 | for(i = 0; i < 8; i++) { | |
208 | memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10); | |
209 | } | |
e95c8d51 | 210 | registers[36] = env->fpuc; |
6da41eaf | 211 | fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
e95c8d51 FB |
212 | registers[37] = fpus; |
213 | registers[38] = 0; /* XXX: convert tags */ | |
214 | registers[39] = 0; /* fiseg */ | |
215 | registers[40] = 0; /* fioff */ | |
216 | registers[41] = 0; /* foseg */ | |
217 | registers[42] = 0; /* fooff */ | |
218 | registers[43] = 0; /* fop */ | |
219 | ||
220 | for(i = 0; i < 16; i++) | |
221 | tswapls(®isters[i]); | |
222 | for(i = 36; i < 44; i++) | |
223 | tswapls(®isters[i]); | |
6da41eaf FB |
224 | return 44 * 4; |
225 | } | |
226 | ||
227 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
228 | { | |
229 | uint32_t *registers = (uint32_t *)mem_buf; | |
230 | int i; | |
231 | ||
232 | for(i = 0; i < 8; i++) { | |
233 | env->regs[i] = tswapl(registers[i]); | |
234 | } | |
e95c8d51 FB |
235 | env->eip = tswapl(registers[8]); |
236 | env->eflags = tswapl(registers[9]); | |
6da41eaf FB |
237 | #if defined(CONFIG_USER_ONLY) |
238 | #define LOAD_SEG(index, sreg)\ | |
239 | if (tswapl(registers[index]) != env->segs[sreg].selector)\ | |
240 | cpu_x86_load_seg(env, sreg, tswapl(registers[index])); | |
241 | LOAD_SEG(10, R_CS); | |
242 | LOAD_SEG(11, R_SS); | |
243 | LOAD_SEG(12, R_DS); | |
244 | LOAD_SEG(13, R_ES); | |
245 | LOAD_SEG(14, R_FS); | |
246 | LOAD_SEG(15, R_GS); | |
247 | #endif | |
248 | } | |
249 | ||
9e62fd7f | 250 | #elif defined (TARGET_PPC) |
9e62fd7f FB |
251 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
252 | { | |
a541f297 | 253 | uint32_t *registers = (uint32_t *)mem_buf, tmp; |
9e62fd7f FB |
254 | int i; |
255 | ||
256 | /* fill in gprs */ | |
a541f297 | 257 | for(i = 0; i < 32; i++) { |
e95c8d51 | 258 | registers[i] = tswapl(env->gpr[i]); |
9e62fd7f FB |
259 | } |
260 | /* fill in fprs */ | |
261 | for (i = 0; i < 32; i++) { | |
e95c8d51 FB |
262 | registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i])); |
263 | registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1)); | |
9e62fd7f FB |
264 | } |
265 | /* nip, msr, ccr, lnk, ctr, xer, mq */ | |
e95c8d51 | 266 | registers[96] = tswapl(env->nip); |
3fc6c082 | 267 | registers[97] = tswapl(do_load_msr(env)); |
9e62fd7f FB |
268 | tmp = 0; |
269 | for (i = 0; i < 8; i++) | |
a541f297 | 270 | tmp |= env->crf[i] << (32 - ((i + 1) * 4)); |
e95c8d51 FB |
271 | registers[98] = tswapl(tmp); |
272 | registers[99] = tswapl(env->lr); | |
273 | registers[100] = tswapl(env->ctr); | |
3fc6c082 | 274 | registers[101] = tswapl(do_load_xer(env)); |
e95c8d51 | 275 | registers[102] = 0; |
a541f297 FB |
276 | |
277 | return 103 * 4; | |
9e62fd7f FB |
278 | } |
279 | ||
280 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
281 | { | |
282 | uint32_t *registers = (uint32_t *)mem_buf; | |
283 | int i; | |
284 | ||
285 | /* fill in gprs */ | |
286 | for (i = 0; i < 32; i++) { | |
e95c8d51 | 287 | env->gpr[i] = tswapl(registers[i]); |
9e62fd7f FB |
288 | } |
289 | /* fill in fprs */ | |
290 | for (i = 0; i < 32; i++) { | |
e95c8d51 FB |
291 | *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]); |
292 | *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]); | |
9e62fd7f FB |
293 | } |
294 | /* nip, msr, ccr, lnk, ctr, xer, mq */ | |
e95c8d51 | 295 | env->nip = tswapl(registers[96]); |
3fc6c082 | 296 | do_store_msr(env, tswapl(registers[97])); |
e95c8d51 | 297 | registers[98] = tswapl(registers[98]); |
9e62fd7f | 298 | for (i = 0; i < 8; i++) |
a541f297 | 299 | env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF; |
e95c8d51 FB |
300 | env->lr = tswapl(registers[99]); |
301 | env->ctr = tswapl(registers[100]); | |
3fc6c082 | 302 | do_store_xer(env, tswapl(registers[101])); |
e95c8d51 FB |
303 | } |
304 | #elif defined (TARGET_SPARC) | |
305 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
306 | { | |
3475187d | 307 | target_ulong *registers = (target_ulong *)mem_buf; |
e95c8d51 FB |
308 | int i; |
309 | ||
310 | /* fill in g0..g7 */ | |
48b2c193 | 311 | for(i = 0; i < 8; i++) { |
e95c8d51 FB |
312 | registers[i] = tswapl(env->gregs[i]); |
313 | } | |
314 | /* fill in register window */ | |
315 | for(i = 0; i < 24; i++) { | |
316 | registers[i + 8] = tswapl(env->regwptr[i]); | |
317 | } | |
9d9754a3 | 318 | #ifndef TARGET_SPARC64 |
e95c8d51 FB |
319 | /* fill in fprs */ |
320 | for (i = 0; i < 32; i++) { | |
321 | registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i])); | |
322 | } | |
323 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
324 | registers[64] = tswapl(env->y); | |
3475187d FB |
325 | { |
326 | target_ulong tmp; | |
327 | ||
328 | tmp = GET_PSR(env); | |
329 | registers[65] = tswapl(tmp); | |
330 | } | |
e95c8d51 FB |
331 | registers[66] = tswapl(env->wim); |
332 | registers[67] = tswapl(env->tbr); | |
333 | registers[68] = tswapl(env->pc); | |
334 | registers[69] = tswapl(env->npc); | |
335 | registers[70] = tswapl(env->fsr); | |
336 | registers[71] = 0; /* csr */ | |
337 | registers[72] = 0; | |
3475187d FB |
338 | return 73 * sizeof(target_ulong); |
339 | #else | |
9d9754a3 FB |
340 | /* fill in fprs */ |
341 | for (i = 0; i < 64; i += 2) { | |
342 | uint64_t tmp; | |
343 | ||
344 | tmp = (uint64_t)tswap32(*((uint32_t *)&env->fpr[i])) << 32; | |
345 | tmp |= tswap32(*((uint32_t *)&env->fpr[i + 1])); | |
346 | registers[i/2 + 32] = tmp; | |
3475187d | 347 | } |
9d9754a3 FB |
348 | registers[64] = tswapl(env->pc); |
349 | registers[65] = tswapl(env->npc); | |
350 | registers[66] = tswapl(env->tstate[env->tl]); | |
351 | registers[67] = tswapl(env->fsr); | |
352 | registers[68] = tswapl(env->fprs); | |
353 | registers[69] = tswapl(env->y); | |
354 | return 70 * sizeof(target_ulong); | |
3475187d | 355 | #endif |
e95c8d51 FB |
356 | } |
357 | ||
358 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
359 | { | |
3475187d | 360 | target_ulong *registers = (target_ulong *)mem_buf; |
e95c8d51 FB |
361 | int i; |
362 | ||
363 | /* fill in g0..g7 */ | |
364 | for(i = 0; i < 7; i++) { | |
365 | env->gregs[i] = tswapl(registers[i]); | |
366 | } | |
367 | /* fill in register window */ | |
368 | for(i = 0; i < 24; i++) { | |
3475187d | 369 | env->regwptr[i] = tswapl(registers[i + 8]); |
e95c8d51 | 370 | } |
9d9754a3 | 371 | #ifndef TARGET_SPARC64 |
e95c8d51 FB |
372 | /* fill in fprs */ |
373 | for (i = 0; i < 32; i++) { | |
374 | *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]); | |
375 | } | |
376 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
377 | env->y = tswapl(registers[64]); | |
e80cfcfc | 378 | PUT_PSR(env, tswapl(registers[65])); |
e95c8d51 FB |
379 | env->wim = tswapl(registers[66]); |
380 | env->tbr = tswapl(registers[67]); | |
381 | env->pc = tswapl(registers[68]); | |
382 | env->npc = tswapl(registers[69]); | |
383 | env->fsr = tswapl(registers[70]); | |
3475187d | 384 | #else |
9d9754a3 FB |
385 | for (i = 0; i < 64; i += 2) { |
386 | *((uint32_t *)&env->fpr[i]) = tswap32(registers[i/2 + 32] >> 32); | |
387 | *((uint32_t *)&env->fpr[i + 1]) = tswap32(registers[i/2 + 32] & 0xffffffff); | |
3475187d | 388 | } |
9d9754a3 FB |
389 | env->pc = tswapl(registers[64]); |
390 | env->npc = tswapl(registers[65]); | |
391 | env->tstate[env->tl] = tswapl(registers[66]); | |
392 | env->fsr = tswapl(registers[67]); | |
393 | env->fprs = tswapl(registers[68]); | |
394 | env->y = tswapl(registers[69]); | |
3475187d | 395 | #endif |
9e62fd7f | 396 | } |
1fddef4b FB |
397 | #elif defined (TARGET_ARM) |
398 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
399 | { | |
400 | int i; | |
401 | uint8_t *ptr; | |
402 | ||
403 | ptr = mem_buf; | |
404 | /* 16 core integer registers (4 bytes each). */ | |
405 | for (i = 0; i < 16; i++) | |
406 | { | |
407 | *(uint32_t *)ptr = tswapl(env->regs[i]); | |
408 | ptr += 4; | |
409 | } | |
410 | /* 8 FPA registers (12 bytes each), FPS (4 bytes). | |
411 | Not yet implemented. */ | |
412 | memset (ptr, 0, 8 * 12 + 4); | |
413 | ptr += 8 * 12 + 4; | |
414 | /* CPSR (4 bytes). */ | |
b5ff1b31 | 415 | *(uint32_t *)ptr = tswapl (cpsr_read(env)); |
1fddef4b FB |
416 | ptr += 4; |
417 | ||
418 | return ptr - mem_buf; | |
419 | } | |
6da41eaf | 420 | |
1fddef4b FB |
421 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
422 | { | |
423 | int i; | |
424 | uint8_t *ptr; | |
425 | ||
426 | ptr = mem_buf; | |
427 | /* Core integer registers. */ | |
428 | for (i = 0; i < 16; i++) | |
429 | { | |
430 | env->regs[i] = tswapl(*(uint32_t *)ptr); | |
431 | ptr += 4; | |
432 | } | |
433 | /* Ignore FPA regs and scr. */ | |
434 | ptr += 8 * 12 + 4; | |
b5ff1b31 | 435 | cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff); |
1fddef4b | 436 | } |
e6e5906b PB |
437 | #elif defined (TARGET_M68K) |
438 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
439 | { | |
440 | int i; | |
441 | uint8_t *ptr; | |
442 | CPU_DoubleU u; | |
443 | ||
444 | ptr = mem_buf; | |
445 | /* D0-D7 */ | |
446 | for (i = 0; i < 8; i++) { | |
447 | *(uint32_t *)ptr = tswapl(env->dregs[i]); | |
448 | ptr += 4; | |
449 | } | |
450 | /* A0-A7 */ | |
451 | for (i = 0; i < 8; i++) { | |
452 | *(uint32_t *)ptr = tswapl(env->aregs[i]); | |
453 | ptr += 4; | |
454 | } | |
455 | *(uint32_t *)ptr = tswapl(env->sr); | |
456 | ptr += 4; | |
457 | *(uint32_t *)ptr = tswapl(env->pc); | |
458 | ptr += 4; | |
459 | /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
460 | ColdFire has 8-bit double precision registers. */ | |
461 | for (i = 0; i < 8; i++) { | |
462 | u.d = env->fregs[i]; | |
463 | *(uint32_t *)ptr = tswap32(u.l.upper); | |
464 | *(uint32_t *)ptr = tswap32(u.l.lower); | |
465 | } | |
466 | /* FP control regs (not implemented). */ | |
467 | memset (ptr, 0, 3 * 4); | |
468 | ptr += 3 * 4; | |
469 | ||
470 | return ptr - mem_buf; | |
471 | } | |
472 | ||
473 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
474 | { | |
475 | int i; | |
476 | uint8_t *ptr; | |
477 | CPU_DoubleU u; | |
478 | ||
479 | ptr = mem_buf; | |
480 | /* D0-D7 */ | |
481 | for (i = 0; i < 8; i++) { | |
482 | env->dregs[i] = tswapl(*(uint32_t *)ptr); | |
483 | ptr += 4; | |
484 | } | |
485 | /* A0-A7 */ | |
486 | for (i = 0; i < 8; i++) { | |
487 | env->aregs[i] = tswapl(*(uint32_t *)ptr); | |
488 | ptr += 4; | |
489 | } | |
490 | env->sr = tswapl(*(uint32_t *)ptr); | |
491 | ptr += 4; | |
492 | env->pc = tswapl(*(uint32_t *)ptr); | |
493 | ptr += 4; | |
494 | /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
495 | ColdFire has 8-bit double precision registers. */ | |
496 | for (i = 0; i < 8; i++) { | |
497 | u.l.upper = tswap32(*(uint32_t *)ptr); | |
498 | u.l.lower = tswap32(*(uint32_t *)ptr); | |
499 | env->fregs[i] = u.d; | |
500 | } | |
501 | /* FP control regs (not implemented). */ | |
502 | ptr += 3 * 4; | |
503 | } | |
6f970bd9 FB |
504 | #elif defined (TARGET_MIPS) |
505 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
506 | { | |
507 | int i; | |
508 | uint8_t *ptr; | |
509 | ||
510 | ptr = mem_buf; | |
511 | for (i = 0; i < 32; i++) | |
512 | { | |
513 | *(uint32_t *)ptr = tswapl(env->gpr[i]); | |
514 | ptr += 4; | |
515 | } | |
516 | ||
517 | *(uint32_t *)ptr = tswapl(env->CP0_Status); | |
518 | ptr += 4; | |
519 | ||
520 | *(uint32_t *)ptr = tswapl(env->LO); | |
521 | ptr += 4; | |
522 | ||
523 | *(uint32_t *)ptr = tswapl(env->HI); | |
524 | ptr += 4; | |
525 | ||
526 | *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr); | |
527 | ptr += 4; | |
528 | ||
529 | *(uint32_t *)ptr = tswapl(env->CP0_Cause); | |
530 | ptr += 4; | |
531 | ||
532 | *(uint32_t *)ptr = tswapl(env->PC); | |
533 | ptr += 4; | |
534 | ||
8e33c08c TS |
535 | #ifdef MIPS_USES_FPU |
536 | for (i = 0; i < 32; i++) | |
537 | { | |
538 | *(uint32_t *)ptr = tswapl(FPR_W (env, i)); | |
539 | ptr += 4; | |
540 | } | |
541 | ||
542 | *(uint32_t *)ptr = tswapl(env->fcr31); | |
543 | ptr += 4; | |
544 | ||
545 | *(uint32_t *)ptr = tswapl(env->fcr0); | |
546 | ptr += 4; | |
547 | #endif | |
548 | ||
6f970bd9 | 549 | /* 32 FP registers, fsr, fir, fp. Not yet implemented. */ |
8e33c08c | 550 | /* what's 'fp' mean here? */ |
6f970bd9 FB |
551 | |
552 | return ptr - mem_buf; | |
553 | } | |
554 | ||
8e33c08c TS |
555 | /* convert MIPS rounding mode in FCR31 to IEEE library */ |
556 | static unsigned int ieee_rm[] = | |
557 | { | |
558 | float_round_nearest_even, | |
559 | float_round_to_zero, | |
560 | float_round_up, | |
561 | float_round_down | |
562 | }; | |
563 | #define RESTORE_ROUNDING_MODE \ | |
564 | set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status) | |
565 | ||
6f970bd9 FB |
566 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
567 | { | |
568 | int i; | |
569 | uint8_t *ptr; | |
570 | ||
571 | ptr = mem_buf; | |
572 | for (i = 0; i < 32; i++) | |
573 | { | |
574 | env->gpr[i] = tswapl(*(uint32_t *)ptr); | |
575 | ptr += 4; | |
576 | } | |
577 | ||
578 | env->CP0_Status = tswapl(*(uint32_t *)ptr); | |
579 | ptr += 4; | |
580 | ||
581 | env->LO = tswapl(*(uint32_t *)ptr); | |
582 | ptr += 4; | |
583 | ||
584 | env->HI = tswapl(*(uint32_t *)ptr); | |
585 | ptr += 4; | |
586 | ||
587 | env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr); | |
588 | ptr += 4; | |
589 | ||
590 | env->CP0_Cause = tswapl(*(uint32_t *)ptr); | |
591 | ptr += 4; | |
592 | ||
593 | env->PC = tswapl(*(uint32_t *)ptr); | |
594 | ptr += 4; | |
8e33c08c TS |
595 | |
596 | #ifdef MIPS_USES_FPU | |
597 | for (i = 0; i < 32; i++) | |
598 | { | |
599 | FPR_W (env, i) = tswapl(*(uint32_t *)ptr); | |
600 | ptr += 4; | |
601 | } | |
602 | ||
603 | env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF; | |
604 | ptr += 4; | |
605 | ||
606 | env->fcr0 = tswapl(*(uint32_t *)ptr); | |
607 | ptr += 4; | |
608 | ||
609 | /* set rounding mode */ | |
610 | RESTORE_ROUNDING_MODE; | |
611 | ||
612 | #ifndef CONFIG_SOFTFLOAT | |
613 | /* no floating point exception for native float */ | |
614 | SET_FP_ENABLE(env->fcr31, 0); | |
615 | #endif | |
616 | #endif | |
6f970bd9 | 617 | } |
fdf9b3e8 FB |
618 | #elif defined (TARGET_SH4) |
619 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
620 | { | |
621 | uint32_t *ptr = (uint32_t *)mem_buf; | |
622 | int i; | |
623 | ||
624 | #define SAVE(x) *ptr++=tswapl(x) | |
9c2a9ea1 PB |
625 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
626 | for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]); | |
627 | } else { | |
628 | for (i = 0; i < 8; i++) SAVE(env->gregs[i]); | |
629 | } | |
630 | for (i = 8; i < 16; i++) SAVE(env->gregs[i]); | |
fdf9b3e8 FB |
631 | SAVE (env->pc); |
632 | SAVE (env->pr); | |
633 | SAVE (env->gbr); | |
634 | SAVE (env->vbr); | |
635 | SAVE (env->mach); | |
636 | SAVE (env->macl); | |
637 | SAVE (env->sr); | |
638 | SAVE (0); /* TICKS */ | |
639 | SAVE (0); /* STALLS */ | |
640 | SAVE (0); /* CYCLES */ | |
641 | SAVE (0); /* INSTS */ | |
642 | SAVE (0); /* PLR */ | |
643 | ||
644 | return ((uint8_t *)ptr - mem_buf); | |
645 | } | |
646 | ||
647 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
648 | { | |
649 | uint32_t *ptr = (uint32_t *)mem_buf; | |
650 | int i; | |
651 | ||
652 | #define LOAD(x) (x)=*ptr++; | |
9c2a9ea1 PB |
653 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { |
654 | for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); | |
655 | } else { | |
656 | for (i = 0; i < 8; i++) LOAD(env->gregs[i]); | |
657 | } | |
658 | for (i = 8; i < 16; i++) LOAD(env->gregs[i]); | |
fdf9b3e8 FB |
659 | LOAD (env->pc); |
660 | LOAD (env->pr); | |
661 | LOAD (env->gbr); | |
662 | LOAD (env->vbr); | |
663 | LOAD (env->mach); | |
664 | LOAD (env->macl); | |
665 | LOAD (env->sr); | |
666 | } | |
1fddef4b | 667 | #else |
6da41eaf FB |
668 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
669 | { | |
670 | return 0; | |
671 | } | |
672 | ||
673 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
674 | { | |
675 | } | |
676 | ||
677 | #endif | |
b4608c04 | 678 | |
1fddef4b | 679 | static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) |
b4608c04 | 680 | { |
b4608c04 | 681 | const char *p; |
858693c6 | 682 | int ch, reg_size, type; |
b4608c04 FB |
683 | char buf[4096]; |
684 | uint8_t mem_buf[2000]; | |
685 | uint32_t *registers; | |
9d9754a3 | 686 | target_ulong addr, len; |
b4608c04 | 687 | |
858693c6 FB |
688 | #ifdef DEBUG_GDB |
689 | printf("command='%s'\n", line_buf); | |
690 | #endif | |
691 | p = line_buf; | |
692 | ch = *p++; | |
693 | switch(ch) { | |
694 | case '?': | |
1fddef4b | 695 | /* TODO: Make this return the correct value for user-mode. */ |
858693c6 FB |
696 | snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); |
697 | put_packet(s, buf); | |
698 | break; | |
699 | case 'c': | |
700 | if (*p != '\0') { | |
9d9754a3 | 701 | addr = strtoull(p, (char **)&p, 16); |
4c3a88a2 | 702 | #if defined(TARGET_I386) |
858693c6 | 703 | env->eip = addr; |
5be1a8e0 | 704 | #elif defined (TARGET_PPC) |
858693c6 | 705 | env->nip = addr; |
8d5f07fa FB |
706 | #elif defined (TARGET_SPARC) |
707 | env->pc = addr; | |
708 | env->npc = addr + 4; | |
b5ff1b31 FB |
709 | #elif defined (TARGET_ARM) |
710 | env->regs[15] = addr; | |
fdf9b3e8 FB |
711 | #elif defined (TARGET_SH4) |
712 | env->pc = addr; | |
4c3a88a2 | 713 | #endif |
858693c6 | 714 | } |
41625033 FB |
715 | #ifdef CONFIG_USER_ONLY |
716 | s->running_state = 1; | |
717 | #else | |
718 | vm_start(); | |
719 | #endif | |
720 | return RS_IDLE; | |
858693c6 FB |
721 | case 's': |
722 | if (*p != '\0') { | |
723 | addr = strtoul(p, (char **)&p, 16); | |
c33a346e | 724 | #if defined(TARGET_I386) |
858693c6 | 725 | env->eip = addr; |
5be1a8e0 | 726 | #elif defined (TARGET_PPC) |
858693c6 | 727 | env->nip = addr; |
8d5f07fa FB |
728 | #elif defined (TARGET_SPARC) |
729 | env->pc = addr; | |
730 | env->npc = addr + 4; | |
b5ff1b31 FB |
731 | #elif defined (TARGET_ARM) |
732 | env->regs[15] = addr; | |
fdf9b3e8 FB |
733 | #elif defined (TARGET_SH4) |
734 | env->pc = addr; | |
c33a346e | 735 | #endif |
858693c6 FB |
736 | } |
737 | cpu_single_step(env, 1); | |
41625033 FB |
738 | #ifdef CONFIG_USER_ONLY |
739 | s->running_state = 1; | |
740 | #else | |
741 | vm_start(); | |
742 | #endif | |
743 | return RS_IDLE; | |
858693c6 FB |
744 | case 'g': |
745 | reg_size = cpu_gdb_read_registers(env, mem_buf); | |
746 | memtohex(buf, mem_buf, reg_size); | |
747 | put_packet(s, buf); | |
748 | break; | |
749 | case 'G': | |
750 | registers = (void *)mem_buf; | |
751 | len = strlen(p) / 2; | |
752 | hextomem((uint8_t *)registers, p, len); | |
753 | cpu_gdb_write_registers(env, mem_buf, len); | |
754 | put_packet(s, "OK"); | |
755 | break; | |
756 | case 'm': | |
9d9754a3 | 757 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
758 | if (*p == ',') |
759 | p++; | |
9d9754a3 | 760 | len = strtoull(p, NULL, 16); |
6f970bd9 FB |
761 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { |
762 | put_packet (s, "E14"); | |
763 | } else { | |
764 | memtohex(buf, mem_buf, len); | |
765 | put_packet(s, buf); | |
766 | } | |
858693c6 FB |
767 | break; |
768 | case 'M': | |
9d9754a3 | 769 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
770 | if (*p == ',') |
771 | p++; | |
9d9754a3 | 772 | len = strtoull(p, (char **)&p, 16); |
b328f873 | 773 | if (*p == ':') |
858693c6 FB |
774 | p++; |
775 | hextomem(mem_buf, p, len); | |
776 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) | |
905f20b1 | 777 | put_packet(s, "E14"); |
858693c6 FB |
778 | else |
779 | put_packet(s, "OK"); | |
780 | break; | |
781 | case 'Z': | |
782 | type = strtoul(p, (char **)&p, 16); | |
783 | if (*p == ',') | |
784 | p++; | |
9d9754a3 | 785 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
786 | if (*p == ',') |
787 | p++; | |
9d9754a3 | 788 | len = strtoull(p, (char **)&p, 16); |
858693c6 FB |
789 | if (type == 0 || type == 1) { |
790 | if (cpu_breakpoint_insert(env, addr) < 0) | |
791 | goto breakpoint_error; | |
792 | put_packet(s, "OK"); | |
793 | } else { | |
794 | breakpoint_error: | |
905f20b1 | 795 | put_packet(s, "E22"); |
858693c6 FB |
796 | } |
797 | break; | |
798 | case 'z': | |
799 | type = strtoul(p, (char **)&p, 16); | |
800 | if (*p == ',') | |
801 | p++; | |
9d9754a3 | 802 | addr = strtoull(p, (char **)&p, 16); |
858693c6 FB |
803 | if (*p == ',') |
804 | p++; | |
9d9754a3 | 805 | len = strtoull(p, (char **)&p, 16); |
858693c6 FB |
806 | if (type == 0 || type == 1) { |
807 | cpu_breakpoint_remove(env, addr); | |
808 | put_packet(s, "OK"); | |
809 | } else { | |
810 | goto breakpoint_error; | |
811 | } | |
812 | break; | |
978efd6a PB |
813 | #ifdef CONFIG_USER_ONLY |
814 | case 'q': | |
815 | if (strncmp(p, "Offsets", 7) == 0) { | |
816 | TaskState *ts = env->opaque; | |
817 | ||
818 | sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset, | |
819 | ts->info->data_offset, ts->info->data_offset); | |
820 | put_packet(s, buf); | |
821 | break; | |
822 | } | |
823 | /* Fall through. */ | |
824 | #endif | |
858693c6 FB |
825 | default: |
826 | // unknown_command: | |
827 | /* put empty packet */ | |
828 | buf[0] = '\0'; | |
829 | put_packet(s, buf); | |
830 | break; | |
831 | } | |
832 | return RS_IDLE; | |
833 | } | |
834 | ||
612458f5 FB |
835 | extern void tb_flush(CPUState *env); |
836 | ||
1fddef4b | 837 | #ifndef CONFIG_USER_ONLY |
858693c6 FB |
838 | static void gdb_vm_stopped(void *opaque, int reason) |
839 | { | |
840 | GDBState *s = opaque; | |
841 | char buf[256]; | |
842 | int ret; | |
843 | ||
844 | /* disable single step if it was enable */ | |
6a00d601 | 845 | cpu_single_step(s->env, 0); |
858693c6 | 846 | |
e80cfcfc | 847 | if (reason == EXCP_DEBUG) { |
6a00d601 | 848 | tb_flush(s->env); |
858693c6 | 849 | ret = SIGTRAP; |
bbeb7b5c FB |
850 | } else if (reason == EXCP_INTERRUPT) { |
851 | ret = SIGINT; | |
852 | } else { | |
858693c6 | 853 | ret = 0; |
bbeb7b5c | 854 | } |
858693c6 FB |
855 | snprintf(buf, sizeof(buf), "S%02x", ret); |
856 | put_packet(s, buf); | |
857 | } | |
1fddef4b | 858 | #endif |
858693c6 | 859 | |
6a00d601 | 860 | static void gdb_read_byte(GDBState *s, int ch) |
858693c6 | 861 | { |
6a00d601 | 862 | CPUState *env = s->env; |
858693c6 FB |
863 | int i, csum; |
864 | char reply[1]; | |
865 | ||
1fddef4b | 866 | #ifndef CONFIG_USER_ONLY |
858693c6 FB |
867 | if (vm_running) { |
868 | /* when the CPU is running, we cannot do anything except stop | |
869 | it when receiving a char */ | |
870 | vm_stop(EXCP_INTERRUPT); | |
41625033 | 871 | } else |
1fddef4b | 872 | #endif |
41625033 | 873 | { |
858693c6 FB |
874 | switch(s->state) { |
875 | case RS_IDLE: | |
876 | if (ch == '$') { | |
877 | s->line_buf_index = 0; | |
878 | s->state = RS_GETLINE; | |
c33a346e | 879 | } |
b4608c04 | 880 | break; |
858693c6 FB |
881 | case RS_GETLINE: |
882 | if (ch == '#') { | |
883 | s->state = RS_CHKSUM1; | |
884 | } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { | |
885 | s->state = RS_IDLE; | |
4c3a88a2 | 886 | } else { |
858693c6 | 887 | s->line_buf[s->line_buf_index++] = ch; |
4c3a88a2 FB |
888 | } |
889 | break; | |
858693c6 FB |
890 | case RS_CHKSUM1: |
891 | s->line_buf[s->line_buf_index] = '\0'; | |
892 | s->line_csum = fromhex(ch) << 4; | |
893 | s->state = RS_CHKSUM2; | |
894 | break; | |
895 | case RS_CHKSUM2: | |
896 | s->line_csum |= fromhex(ch); | |
897 | csum = 0; | |
898 | for(i = 0; i < s->line_buf_index; i++) { | |
899 | csum += s->line_buf[i]; | |
900 | } | |
901 | if (s->line_csum != (csum & 0xff)) { | |
902 | reply[0] = '-'; | |
903 | put_buffer(s, reply, 1); | |
904 | s->state = RS_IDLE; | |
4c3a88a2 | 905 | } else { |
858693c6 FB |
906 | reply[0] = '+'; |
907 | put_buffer(s, reply, 1); | |
1fddef4b | 908 | s->state = gdb_handle_packet(s, env, s->line_buf); |
4c3a88a2 FB |
909 | } |
910 | break; | |
858693c6 FB |
911 | } |
912 | } | |
913 | } | |
914 | ||
1fddef4b FB |
915 | #ifdef CONFIG_USER_ONLY |
916 | int | |
917 | gdb_handlesig (CPUState *env, int sig) | |
918 | { | |
919 | GDBState *s; | |
920 | char buf[256]; | |
921 | int n; | |
922 | ||
923 | if (gdbserver_fd < 0) | |
924 | return sig; | |
925 | ||
926 | s = &gdbserver_state; | |
927 | ||
928 | /* disable single step if it was enabled */ | |
929 | cpu_single_step(env, 0); | |
930 | tb_flush(env); | |
931 | ||
932 | if (sig != 0) | |
933 | { | |
934 | snprintf(buf, sizeof(buf), "S%02x", sig); | |
935 | put_packet(s, buf); | |
936 | } | |
937 | ||
1fddef4b FB |
938 | sig = 0; |
939 | s->state = RS_IDLE; | |
41625033 FB |
940 | s->running_state = 0; |
941 | while (s->running_state == 0) { | |
1fddef4b FB |
942 | n = read (s->fd, buf, 256); |
943 | if (n > 0) | |
944 | { | |
945 | int i; | |
946 | ||
947 | for (i = 0; i < n; i++) | |
6a00d601 | 948 | gdb_read_byte (s, buf[i]); |
1fddef4b FB |
949 | } |
950 | else if (n == 0 || errno != EAGAIN) | |
951 | { | |
952 | /* XXX: Connection closed. Should probably wait for annother | |
953 | connection before continuing. */ | |
954 | return sig; | |
955 | } | |
41625033 | 956 | } |
1fddef4b FB |
957 | return sig; |
958 | } | |
e9009676 FB |
959 | |
960 | /* Tell the remote gdb that the process has exited. */ | |
961 | void gdb_exit(CPUState *env, int code) | |
962 | { | |
963 | GDBState *s; | |
964 | char buf[4]; | |
965 | ||
966 | if (gdbserver_fd < 0) | |
967 | return; | |
968 | ||
969 | s = &gdbserver_state; | |
970 | ||
971 | snprintf(buf, sizeof(buf), "W%02x", code); | |
972 | put_packet(s, buf); | |
973 | } | |
974 | ||
1fddef4b | 975 | #else |
7c9d8e07 | 976 | static void gdb_read(void *opaque) |
858693c6 FB |
977 | { |
978 | GDBState *s = opaque; | |
7c9d8e07 FB |
979 | int i, size; |
980 | uint8_t buf[4096]; | |
981 | ||
8f447cc7 | 982 | size = recv(s->fd, buf, sizeof(buf), 0); |
7c9d8e07 FB |
983 | if (size < 0) |
984 | return; | |
858693c6 FB |
985 | if (size == 0) { |
986 | /* end of connection */ | |
987 | qemu_del_vm_stop_handler(gdb_vm_stopped, s); | |
7c9d8e07 | 988 | qemu_set_fd_handler(s->fd, NULL, NULL, NULL); |
858693c6 FB |
989 | qemu_free(s); |
990 | vm_start(); | |
991 | } else { | |
992 | for(i = 0; i < size; i++) | |
6a00d601 | 993 | gdb_read_byte(s, buf[i]); |
858693c6 FB |
994 | } |
995 | } | |
996 | ||
1fddef4b FB |
997 | #endif |
998 | ||
7c9d8e07 | 999 | static void gdb_accept(void *opaque) |
858693c6 FB |
1000 | { |
1001 | GDBState *s; | |
1002 | struct sockaddr_in sockaddr; | |
1003 | socklen_t len; | |
1004 | int val, fd; | |
1005 | ||
1006 | for(;;) { | |
1007 | len = sizeof(sockaddr); | |
1008 | fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len); | |
1009 | if (fd < 0 && errno != EINTR) { | |
1010 | perror("accept"); | |
1011 | return; | |
1012 | } else if (fd >= 0) { | |
b4608c04 FB |
1013 | break; |
1014 | } | |
1015 | } | |
858693c6 FB |
1016 | |
1017 | /* set short latency */ | |
1018 | val = 1; | |
8f447cc7 | 1019 | setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); |
858693c6 | 1020 | |
1fddef4b FB |
1021 | #ifdef CONFIG_USER_ONLY |
1022 | s = &gdbserver_state; | |
1023 | memset (s, 0, sizeof (GDBState)); | |
1024 | #else | |
858693c6 FB |
1025 | s = qemu_mallocz(sizeof(GDBState)); |
1026 | if (!s) { | |
1027 | close(fd); | |
1028 | return; | |
1029 | } | |
1fddef4b | 1030 | #endif |
6a00d601 | 1031 | s->env = first_cpu; /* XXX: allow to change CPU */ |
858693c6 FB |
1032 | s->fd = fd; |
1033 | ||
8f447cc7 | 1034 | #ifdef CONFIG_USER_ONLY |
858693c6 | 1035 | fcntl(fd, F_SETFL, O_NONBLOCK); |
8f447cc7 FB |
1036 | #else |
1037 | socket_set_nonblock(fd); | |
858693c6 FB |
1038 | |
1039 | /* stop the VM */ | |
1040 | vm_stop(EXCP_INTERRUPT); | |
1041 | ||
1042 | /* start handling I/O */ | |
7c9d8e07 | 1043 | qemu_set_fd_handler(s->fd, gdb_read, NULL, s); |
858693c6 FB |
1044 | /* when the VM is stopped, the following callback is called */ |
1045 | qemu_add_vm_stop_handler(gdb_vm_stopped, s); | |
1fddef4b | 1046 | #endif |
858693c6 FB |
1047 | } |
1048 | ||
1049 | static int gdbserver_open(int port) | |
1050 | { | |
1051 | struct sockaddr_in sockaddr; | |
1052 | int fd, val, ret; | |
1053 | ||
1054 | fd = socket(PF_INET, SOCK_STREAM, 0); | |
1055 | if (fd < 0) { | |
1056 | perror("socket"); | |
1057 | return -1; | |
1058 | } | |
1059 | ||
1060 | /* allow fast reuse */ | |
1061 | val = 1; | |
8f447cc7 | 1062 | setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); |
858693c6 FB |
1063 | |
1064 | sockaddr.sin_family = AF_INET; | |
1065 | sockaddr.sin_port = htons(port); | |
1066 | sockaddr.sin_addr.s_addr = 0; | |
1067 | ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); | |
1068 | if (ret < 0) { | |
1069 | perror("bind"); | |
1070 | return -1; | |
1071 | } | |
1072 | ret = listen(fd, 0); | |
1073 | if (ret < 0) { | |
1074 | perror("listen"); | |
1075 | return -1; | |
1076 | } | |
1fddef4b | 1077 | #ifndef CONFIG_USER_ONLY |
8f447cc7 | 1078 | socket_set_nonblock(fd); |
1fddef4b | 1079 | #endif |
858693c6 FB |
1080 | return fd; |
1081 | } | |
1082 | ||
1083 | int gdbserver_start(int port) | |
1084 | { | |
1085 | gdbserver_fd = gdbserver_open(port); | |
1086 | if (gdbserver_fd < 0) | |
1087 | return -1; | |
1088 | /* accept connections */ | |
1fddef4b | 1089 | #ifdef CONFIG_USER_ONLY |
7c9d8e07 | 1090 | gdb_accept (NULL); |
1fddef4b | 1091 | #else |
7c9d8e07 | 1092 | qemu_set_fd_handler(gdbserver_fd, gdb_accept, NULL, NULL); |
1fddef4b | 1093 | #endif |
b4608c04 FB |
1094 | return 0; |
1095 | } |