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acpi: cpuhp: implement hot-remove parts of CPU hotplug interface
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CommitLineData
e516572f
JB
1/*
2 * ACPI implementation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
6f918e40
JB
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
8 *
9 * This is based on acpi.c.
e516572f
JB
10 *
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
e516572f 22 *
6f918e40
JB
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
e516572f 25 */
b6a0aa05 26#include "qemu/osdep.h"
83c9f4ca 27#include "hw/hw.h"
da34e65c 28#include "qapi/error.h"
6f1426ab 29#include "qapi/visitor.h"
0d09e41a 30#include "hw/i386/pc.h"
83c9f4ca 31#include "hw/pci/pci.h"
1de7afc9 32#include "qemu/timer.h"
9c17d615 33#include "sysemu/sysemu.h"
0d09e41a 34#include "hw/acpi/acpi.h"
92055797 35#include "hw/acpi/tco.h"
9c17d615 36#include "sysemu/kvm.h"
022c62cb 37#include "exec/address-spaces.h"
e516572f 38
0d09e41a 39#include "hw/i386/ich9.h"
1f862184 40#include "hw/mem/pc-dimm.h"
e516572f
JB
41
42//#define DEBUG
43
44#ifdef DEBUG
45#define ICH9_DEBUG(fmt, ...) \
46do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
47#else
48#define ICH9_DEBUG(fmt, ...) do { } while (0)
49#endif
50
e516572f
JB
51static void ich9_pm_update_sci_fn(ACPIREGS *regs)
52{
53 ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
06313503 54 acpi_update_sci(&pm->acpi_regs, pm->irq);
e516572f
JB
55}
56
76a7daf9
GH
57static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
58{
59 ICH9LPCPMRegs *pm = opaque;
60 return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
61}
62
63static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
64 unsigned width)
65{
66 ICH9LPCPMRegs *pm = opaque;
67 acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
2c047956 68 acpi_update_sci(&pm->acpi_regs, pm->irq);
76a7daf9
GH
69}
70
71static const MemoryRegionOps ich9_gpe_ops = {
72 .read = ich9_gpe_readb,
73 .write = ich9_gpe_writeb,
74 .valid.min_access_size = 1,
75 .valid.max_access_size = 4,
76 .impl.min_access_size = 1,
77 .impl.max_access_size = 1,
78 .endianness = DEVICE_LITTLE_ENDIAN,
79};
80
10cc69b0
GH
81static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
82{
83 ICH9LPCPMRegs *pm = opaque;
84 switch (addr) {
85 case 0:
86 return pm->smi_en;
87 case 4:
88 return pm->smi_sts;
89 default:
90 return 0;
91 }
92}
93
94static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
95 unsigned width)
96{
97 ICH9LPCPMRegs *pm = opaque;
92055797
PA
98 TCOIORegs *tr = &pm->tco_regs;
99 uint64_t tco_en;
100
10cc69b0
GH
101 switch (addr) {
102 case 0:
92055797
PA
103 tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
104 /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
105 if (tr->tco.cnt1 & TCO_LOCK) {
106 val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
107 }
11e66a15
GH
108 pm->smi_en &= ~pm->smi_en_wmask;
109 pm->smi_en |= (val & pm->smi_en_wmask);
10cc69b0
GH
110 break;
111 }
112}
113
114static const MemoryRegionOps ich9_smi_ops = {
115 .read = ich9_smi_readl,
116 .write = ich9_smi_writel,
117 .valid.min_access_size = 4,
118 .valid.max_access_size = 4,
119 .endianness = DEVICE_LITTLE_ENDIAN,
120};
121
e516572f
JB
122void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
123{
124 ICH9_DEBUG("to 0x%x\n", pm_io_base);
125
126 assert((pm_io_base & ICH9_PMIO_MASK) == 0);
127
e516572f 128 pm->pm_io_base = pm_io_base;
cacaab8b
GH
129 memory_region_transaction_begin();
130 memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
131 memory_region_set_address(&pm->io, pm->pm_io_base);
132 memory_region_transaction_commit();
e516572f
JB
133}
134
135static int ich9_pm_post_load(void *opaque, int version_id)
136{
137 ICH9LPCPMRegs *pm = opaque;
138 uint32_t pm_io_base = pm->pm_io_base;
139 pm->pm_io_base = 0;
140 ich9_pm_iospace_update(pm, pm_io_base);
141 return 0;
142}
143
144#define VMSTATE_GPE_ARRAY(_field, _state) \
145 { \
146 .name = (stringify(_field)), \
147 .version_id = 0, \
148 .num = ICH9_PMIO_GPE0_LEN, \
149 .info = &vmstate_info_uint8, \
150 .size = sizeof(uint8_t), \
151 .flags = VMS_ARRAY | VMS_POINTER, \
152 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
153 }
154
f816a62d
IM
155static bool vmstate_test_use_memhp(void *opaque)
156{
157 ICH9LPCPMRegs *s = opaque;
158 return s->acpi_memory_hotplug.is_enabled;
159}
160
161static const VMStateDescription vmstate_memhp_state = {
162 .name = "ich9_pm/memhp",
163 .version_id = 1,
164 .minimum_version_id = 1,
165 .minimum_version_id_old = 1,
5cd8cada 166 .needed = vmstate_test_use_memhp,
f816a62d
IM
167 .fields = (VMStateField[]) {
168 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
169 VMSTATE_END_OF_LIST()
170 }
171};
172
92055797
PA
173static bool vmstate_test_use_tco(void *opaque)
174{
175 ICH9LPCPMRegs *s = opaque;
176 return s->enable_tco;
177}
178
179static const VMStateDescription vmstate_tco_io_state = {
180 .name = "ich9_pm/tco",
181 .version_id = 1,
182 .minimum_version_id = 1,
183 .minimum_version_id_old = 1,
184 .needed = vmstate_test_use_tco,
185 .fields = (VMStateField[]) {
186 VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
187 TCOIORegs),
188 VMSTATE_END_OF_LIST()
189 }
190};
191
e516572f
JB
192const VMStateDescription vmstate_ich9_pm = {
193 .name = "ich9_pm",
194 .version_id = 1,
195 .minimum_version_id = 1,
e516572f
JB
196 .post_load = ich9_pm_post_load,
197 .fields = (VMStateField[]) {
198 VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
199 VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
200 VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
e720677e 201 VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
e516572f
JB
202 VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
203 VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
204 VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
205 VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
206 VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
207 VMSTATE_END_OF_LIST()
f816a62d 208 },
5cd8cada
JQ
209 .subsections = (const VMStateDescription*[]) {
210 &vmstate_memhp_state,
92055797
PA
211 &vmstate_tco_io_state,
212 NULL
e516572f
JB
213 }
214};
215
216static void pm_reset(void *opaque)
217{
218 ICH9LPCPMRegs *pm = opaque;
219 ich9_pm_iospace_update(pm, 0);
220
221 acpi_pm1_evt_reset(&pm->acpi_regs);
222 acpi_pm1_cnt_reset(&pm->acpi_regs);
223 acpi_pm_tmr_reset(&pm->acpi_regs);
224 acpi_gpe_reset(&pm->acpi_regs);
225
be66680e 226 pm->smi_en = 0;
fba72476 227 if (!pm->smm_enabled) {
f3c30aea 228 /* Mark SMM as already inited to prevent SMM from running. */
21bcfdd9
JK
229 pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
230 }
11e66a15 231 pm->smi_en_wmask = ~0;
21bcfdd9 232
06313503 233 acpi_update_sci(&pm->acpi_regs, pm->irq);
e516572f
JB
234}
235
236static void pm_powerdown_req(Notifier *n, void *opaque)
237{
238 ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
239
240 acpi_pm1_evt_power_down(&pm->acpi_regs);
241}
242
92055797 243void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
18d6abae 244 bool smm_enabled,
a3ac6b53 245 qemu_irq sci_irq)
e516572f 246{
64bde0f3 247 memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
cacaab8b 248 memory_region_set_enabled(&pm->io, false);
503b19fc
GH
249 memory_region_add_subregion(pci_address_space_io(lpc_pci),
250 0, &pm->io);
cacaab8b 251
77d58b1e 252 acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
b5a7c024 253 acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
9a10bbb4
LE
254 acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
255 pm->s4_val);
76a7daf9 256
e516572f 257 acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
64bde0f3 258 memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
75902802 259 "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
76a7daf9 260 memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
e516572f 261
64bde0f3 262 memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
75902802 263 "acpi-smi", 8);
10cc69b0
GH
264 memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
265
fba72476 266 pm->smm_enabled = smm_enabled;
92055797 267
18d6abae
EH
268 pm->enable_tco = true;
269 acpi_pm_tco_init(&pm->tco_regs, &pm->io);
92055797 270
e516572f
JB
271 pm->irq = sci_irq;
272 qemu_register_reset(pm_reset, pm);
273 pm->powerdown_notifier.notify = pm_powerdown_req;
274 qemu_register_powerdown_notifier(&pm->powerdown_notifier);
d6610bc2 275
96e3e12b
IM
276 legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci),
277 OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
1f862184
IM
278
279 if (pm->acpi_memory_hotplug.is_enabled) {
280 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
281 &pm->acpi_memory_hotplug);
282 }
e516572f 283}
6f1426ab 284
d7bce999
EB
285static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
286 void *opaque, Error **errp)
6f1426ab
MT
287{
288 ICH9LPCPMRegs *pm = opaque;
289 uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
290
51e72bc1 291 visit_type_uint32(v, name, &value, errp);
6f1426ab
MT
292}
293
1f862184
IM
294static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp)
295{
296 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
297
298 return s->pm.acpi_memory_hotplug.is_enabled;
299}
300
301static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
302 Error **errp)
303{
304 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
305
306 s->pm.acpi_memory_hotplug.is_enabled = value;
307}
308
16bcab97
IM
309static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp)
310{
311 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
312
313 return s->pm.cpu_hotplug_legacy;
314}
315
316static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
317 Error **errp)
318{
319 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
320
321 s->pm.cpu_hotplug_legacy = value;
322}
323
d7bce999
EB
324static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, const char *name,
325 void *opaque, Error **errp)
6ac0d8d4
AS
326{
327 ICH9LPCPMRegs *pm = opaque;
328 uint8_t value = pm->disable_s3;
329
51e72bc1 330 visit_type_uint8(v, name, &value, errp);
6ac0d8d4
AS
331}
332
d7bce999
EB
333static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, const char *name,
334 void *opaque, Error **errp)
6ac0d8d4
AS
335{
336 ICH9LPCPMRegs *pm = opaque;
337 Error *local_err = NULL;
338 uint8_t value;
339
51e72bc1 340 visit_type_uint8(v, name, &value, &local_err);
6ac0d8d4
AS
341 if (local_err) {
342 goto out;
343 }
344 pm->disable_s3 = value;
345out:
346 error_propagate(errp, local_err);
347}
348
d7bce999
EB
349static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, const char *name,
350 void *opaque, Error **errp)
6ac0d8d4
AS
351{
352 ICH9LPCPMRegs *pm = opaque;
353 uint8_t value = pm->disable_s4;
354
51e72bc1 355 visit_type_uint8(v, name, &value, errp);
6ac0d8d4
AS
356}
357
d7bce999
EB
358static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, const char *name,
359 void *opaque, Error **errp)
6ac0d8d4
AS
360{
361 ICH9LPCPMRegs *pm = opaque;
362 Error *local_err = NULL;
363 uint8_t value;
364
51e72bc1 365 visit_type_uint8(v, name, &value, &local_err);
6ac0d8d4
AS
366 if (local_err) {
367 goto out;
368 }
369 pm->disable_s4 = value;
370out:
371 error_propagate(errp, local_err);
372}
373
d7bce999
EB
374static void ich9_pm_get_s4_val(Object *obj, Visitor *v, const char *name,
375 void *opaque, Error **errp)
6ac0d8d4
AS
376{
377 ICH9LPCPMRegs *pm = opaque;
378 uint8_t value = pm->s4_val;
379
51e72bc1 380 visit_type_uint8(v, name, &value, errp);
6ac0d8d4
AS
381}
382
d7bce999
EB
383static void ich9_pm_set_s4_val(Object *obj, Visitor *v, const char *name,
384 void *opaque, Error **errp)
6ac0d8d4
AS
385{
386 ICH9LPCPMRegs *pm = opaque;
387 Error *local_err = NULL;
388 uint8_t value;
389
51e72bc1 390 visit_type_uint8(v, name, &value, &local_err);
6ac0d8d4
AS
391 if (local_err) {
392 goto out;
393 }
394 pm->s4_val = value;
395out:
396 error_propagate(errp, local_err);
397}
398
92055797
PA
399static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
400{
401 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
402 return s->pm.enable_tco;
403}
404
405static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
406{
407 ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
408 s->pm.enable_tco = value;
409}
410
6f1426ab
MT
411void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
412{
413 static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
1f862184 414 pm->acpi_memory_hotplug.is_enabled = true;
16bcab97 415 pm->cpu_hotplug_legacy = true;
6ac0d8d4
AS
416 pm->disable_s3 = 0;
417 pm->disable_s4 = 0;
418 pm->s4_val = 2;
6f1426ab
MT
419
420 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
421 &pm->pm_io_base, errp);
422 object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
423 ich9_pm_get_gpe0_blk,
424 NULL, NULL, pm, NULL);
425 object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
426 &gpe0_len, errp);
1f862184
IM
427 object_property_add_bool(obj, "memory-hotplug-support",
428 ich9_pm_get_memory_hotplug_support,
429 ich9_pm_set_memory_hotplug_support,
430 NULL);
16bcab97
IM
431 object_property_add_bool(obj, "cpu-hotplug-legacy",
432 ich9_pm_get_cpu_hotplug_legacy,
433 ich9_pm_set_cpu_hotplug_legacy,
434 NULL);
6ac0d8d4
AS
435 object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8",
436 ich9_pm_get_disable_s3,
437 ich9_pm_set_disable_s3,
438 NULL, pm, NULL);
439 object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8",
440 ich9_pm_get_disable_s4,
441 ich9_pm_set_disable_s4,
442 NULL, pm, NULL);
443 object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8",
444 ich9_pm_get_s4_val,
445 ich9_pm_set_s4_val,
446 NULL, pm, NULL);
92055797
PA
447 object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
448 ich9_pm_get_enable_tco,
449 ich9_pm_set_enable_tco,
450 NULL);
1f862184
IM
451}
452
0058c082
IM
453void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
454 Error **errp)
1f862184 455{
0058c082
IM
456 ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
457
458 if (lpc->pm.acpi_memory_hotplug.is_enabled &&
1f862184 459 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
0058c082 460 acpi_memory_plug_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug,
1f862184 461 dev, errp);
5e1b5d93
IM
462 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
463 if (lpc->pm.cpu_hotplug_legacy) {
464 legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, errp);
465 } else {
466 acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp);
467 }
1f862184
IM
468 } else {
469 error_setg(errp, "acpi: device plug request for not supported device"
470 " type: %s", object_get_typename(OBJECT(dev)));
471 }
6f1426ab 472}
43f50410 473
0058c082
IM
474void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
475 DeviceState *dev, Error **errp)
469b8ad2 476{
0058c082
IM
477 ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
478
479 if (lpc->pm.acpi_memory_hotplug.is_enabled &&
64fec58e 480 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
0058c082
IM
481 acpi_memory_unplug_request_cb(hotplug_dev,
482 &lpc->pm.acpi_memory_hotplug, dev,
483 errp);
8872c25a
IM
484 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
485 !lpc->pm.cpu_hotplug_legacy) {
486 acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
487 dev, errp);
64fec58e
TC
488 } else {
489 error_setg(errp, "acpi: device unplug request for not supported device"
490 " type: %s", object_get_typename(OBJECT(dev)));
491 }
469b8ad2
TC
492}
493
0058c082 494void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
91a734a6
TC
495 Error **errp)
496{
0058c082
IM
497 ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
498
499 if (lpc->pm.acpi_memory_hotplug.is_enabled &&
f7d3e29d 500 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
0058c082 501 acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp);
8872c25a
IM
502 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
503 !lpc->pm.cpu_hotplug_legacy) {
504 acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp);
f7d3e29d
TC
505 } else {
506 error_setg(errp, "acpi: device unplug for not supported device"
507 " type: %s", object_get_typename(OBJECT(dev)));
508 }
91a734a6
TC
509}
510
43f50410
IM
511void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
512{
513 ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
514
515 acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
516}