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db4728e6 MT |
1 | /* |
2 | * QEMU<->ACPI BIOS PCI hotplug interface | |
3 | * | |
4 | * QEMU supports PCI hotplug via ACPI. This module | |
5 | * implements the interface between QEMU and the ACPI BIOS. | |
6 | * Interface specification - see docs/specs/acpi_pci_hotplug.txt | |
7 | * | |
8 | * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com) | |
9 | * Copyright (c) 2006 Fabrice Bellard | |
10 | * | |
11 | * This library is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU Lesser General Public | |
13 | * License version 2 as published by the Free Software Foundation. | |
14 | * | |
15 | * This library is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * Lesser General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU Lesser General Public | |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/> | |
22 | * | |
23 | * Contributions after 2012-01-13 are licensed under the terms of the | |
24 | * GNU GPL, version 2 or (at your option) any later version. | |
25 | */ | |
26 | ||
27 | #include "hw/acpi/pcihp.h" | |
28 | ||
29 | #include "hw/hw.h" | |
30 | #include "hw/i386/pc.h" | |
31 | #include "hw/pci/pci.h" | |
32 | #include "hw/acpi/acpi.h" | |
33 | #include "sysemu/sysemu.h" | |
34 | #include "qemu/range.h" | |
35 | #include "exec/ioport.h" | |
36 | #include "exec/address-spaces.h" | |
37 | #include "hw/pci/pci_bus.h" | |
38 | #include "qom/qom-qobject.h" | |
39 | #include "qapi/qmp/qint.h" | |
40 | ||
41 | //#define DEBUG | |
42 | ||
43 | #ifdef DEBUG | |
44 | # define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__) | |
45 | #else | |
46 | # define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0) | |
47 | #endif | |
48 | ||
e358edc8 IM |
49 | #define ACPI_PCIHP_ADDR 0xae00 |
50 | #define ACPI_PCIHP_SIZE 0x0014 | |
51 | #define ACPI_PCIHP_LEGACY_SIZE 0x000f | |
a7b613cf IM |
52 | #define PCI_UP_BASE 0x0000 |
53 | #define PCI_DOWN_BASE 0x0004 | |
54 | #define PCI_EJ_BASE 0x0008 | |
55 | #define PCI_RMV_BASE 0x000c | |
56 | #define PCI_SEL_BASE 0x0010 | |
db4728e6 MT |
57 | |
58 | typedef struct AcpiPciHpFind { | |
59 | int bsel; | |
60 | PCIBus *bus; | |
61 | } AcpiPciHpFind; | |
62 | ||
63 | static int acpi_pcihp_get_bsel(PCIBus *bus) | |
64 | { | |
65 | QObject *o = object_property_get_qobject(OBJECT(bus), | |
66 | ACPI_PCIHP_PROP_BSEL, NULL); | |
67 | int64_t bsel = -1; | |
68 | if (o) { | |
69 | bsel = qint_get_int(qobject_to_qint(o)); | |
70 | } | |
71 | if (bsel < 0) { | |
72 | return -1; | |
73 | } | |
74 | return bsel; | |
75 | } | |
76 | ||
77 | static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque) | |
78 | { | |
79 | AcpiPciHpFind *find = opaque; | |
80 | if (find->bsel == acpi_pcihp_get_bsel(bus)) { | |
81 | find->bus = bus; | |
82 | } | |
83 | } | |
84 | ||
85 | static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel) | |
86 | { | |
87 | AcpiPciHpFind find = { .bsel = bsel, .bus = NULL }; | |
88 | ||
89 | if (bsel < 0) { | |
90 | return NULL; | |
91 | } | |
92 | ||
93 | pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find); | |
94 | ||
95 | /* Make bsel 0 eject root bus if bsel property is not set, | |
96 | * for compatibility with non acpi setups. | |
97 | * TODO: really needed? | |
98 | */ | |
99 | if (!bsel && !find.bus) { | |
100 | find.bus = s->root; | |
101 | } | |
102 | return find.bus; | |
103 | } | |
104 | ||
105 | static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev) | |
106 | { | |
107 | PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); | |
2897ae02 | 108 | DeviceClass *dc = DEVICE_GET_CLASS(dev); |
db4728e6 MT |
109 | /* |
110 | * ACPI doesn't allow hotplug of bridge devices. Don't allow | |
111 | * hot-unplug of bridge devices unless they were added by hotplug | |
112 | * (and so, not described by acpi). | |
113 | */ | |
2897ae02 | 114 | return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable; |
db4728e6 MT |
115 | } |
116 | ||
117 | static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots) | |
118 | { | |
119 | BusChild *kid, *next; | |
120 | int slot = ffs(slots) - 1; | |
db4728e6 MT |
121 | PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel); |
122 | ||
123 | if (!bus) { | |
124 | return; | |
125 | } | |
126 | ||
127 | /* Mark request as complete */ | |
128 | s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot); | |
5a2223ca | 129 | s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot); |
db4728e6 MT |
130 | |
131 | QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) { | |
132 | DeviceState *qdev = kid->child; | |
133 | PCIDevice *dev = PCI_DEVICE(qdev); | |
134 | if (PCI_SLOT(dev->devfn) == slot) { | |
5a2223ca | 135 | if (!acpi_pcihp_pc_no_hotplug(s, dev)) { |
db4728e6 MT |
136 | object_unparent(OBJECT(qdev)); |
137 | } | |
138 | } | |
139 | } | |
db4728e6 MT |
140 | } |
141 | ||
142 | static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel) | |
143 | { | |
144 | BusChild *kid, *next; | |
145 | PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel); | |
146 | ||
147 | /* Execute any pending removes during reset */ | |
148 | while (s->acpi_pcihp_pci_status[bsel].down) { | |
149 | acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down); | |
150 | } | |
151 | ||
152 | s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0; | |
db4728e6 MT |
153 | |
154 | if (!bus) { | |
155 | return; | |
156 | } | |
157 | QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) { | |
158 | DeviceState *qdev = kid->child; | |
159 | PCIDevice *pdev = PCI_DEVICE(qdev); | |
160 | int slot = PCI_SLOT(pdev->devfn); | |
161 | ||
162 | if (acpi_pcihp_pc_no_hotplug(s, pdev)) { | |
163 | s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot); | |
164 | } | |
db4728e6 MT |
165 | } |
166 | } | |
167 | ||
168 | static void acpi_pcihp_update(AcpiPciHpState *s) | |
169 | { | |
170 | int i; | |
171 | ||
172 | for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) { | |
173 | acpi_pcihp_update_hotplug_bus(s, i); | |
174 | } | |
175 | } | |
176 | ||
177 | void acpi_pcihp_reset(AcpiPciHpState *s) | |
178 | { | |
179 | acpi_pcihp_update(s); | |
180 | } | |
181 | ||
db4728e6 MT |
182 | int acpi_pcihp_device_hotplug(AcpiPciHpState *s, PCIDevice *dev, |
183 | PCIHotplugState state) | |
184 | { | |
185 | int slot = PCI_SLOT(dev->devfn); | |
186 | int bsel = acpi_pcihp_get_bsel(dev->bus); | |
187 | if (bsel < 0) { | |
188 | return -1; | |
189 | } | |
190 | ||
191 | /* Don't send event when device is enabled during qemu machine creation: | |
192 | * it is present on boot, no hotplug event is necessary. We do send an | |
193 | * event when the device is disabled later. */ | |
194 | if (state == PCI_COLDPLUG_ENABLED) { | |
db4728e6 MT |
195 | return 0; |
196 | } | |
197 | ||
198 | if (state == PCI_HOTPLUG_ENABLED) { | |
8f5001f9 | 199 | s->acpi_pcihp_pci_status[bsel].up |= (1U << slot); |
db4728e6 | 200 | } else { |
8f5001f9 | 201 | s->acpi_pcihp_pci_status[bsel].down |= (1U << slot); |
db4728e6 MT |
202 | } |
203 | ||
204 | return 0; | |
205 | } | |
206 | ||
207 | static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size) | |
208 | { | |
209 | AcpiPciHpState *s = opaque; | |
210 | uint32_t val = 0; | |
211 | int bsel = s->hotplug_select; | |
212 | ||
213 | if (bsel < 0 || bsel > ACPI_PCIHP_MAX_HOTPLUG_BUS) { | |
214 | return 0; | |
215 | } | |
216 | ||
217 | switch (addr) { | |
a7b613cf | 218 | case PCI_UP_BASE: |
5a2223ca | 219 | val = s->acpi_pcihp_pci_status[bsel].up; |
99d09dd3 IM |
220 | if (!s->legacy_piix) { |
221 | s->acpi_pcihp_pci_status[bsel].up = 0; | |
222 | } | |
db4728e6 MT |
223 | ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val); |
224 | break; | |
a7b613cf | 225 | case PCI_DOWN_BASE: |
db4728e6 MT |
226 | val = s->acpi_pcihp_pci_status[bsel].down; |
227 | ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val); | |
228 | break; | |
a7b613cf | 229 | case PCI_EJ_BASE: |
db4728e6 MT |
230 | /* No feature defined yet */ |
231 | ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val); | |
232 | break; | |
a7b613cf | 233 | case PCI_RMV_BASE: |
db4728e6 MT |
234 | val = s->acpi_pcihp_pci_status[bsel].hotplug_enable; |
235 | ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val); | |
236 | break; | |
a7b613cf | 237 | case PCI_SEL_BASE: |
db4728e6 MT |
238 | val = s->hotplug_select; |
239 | ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val); | |
240 | default: | |
241 | break; | |
242 | } | |
243 | ||
244 | return val; | |
245 | } | |
246 | ||
247 | static void pci_write(void *opaque, hwaddr addr, uint64_t data, | |
248 | unsigned int size) | |
249 | { | |
250 | AcpiPciHpState *s = opaque; | |
251 | switch (addr) { | |
a7b613cf | 252 | case PCI_EJ_BASE: |
db4728e6 MT |
253 | if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { |
254 | break; | |
255 | } | |
256 | acpi_pcihp_eject_slot(s, s->hotplug_select, data); | |
257 | ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n", | |
258 | addr, data); | |
259 | break; | |
a7b613cf | 260 | case PCI_SEL_BASE: |
db4728e6 MT |
261 | s->hotplug_select = data; |
262 | ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n", | |
263 | addr, data); | |
264 | default: | |
265 | break; | |
266 | } | |
267 | } | |
268 | ||
269 | static const MemoryRegionOps acpi_pcihp_io_ops = { | |
270 | .read = pci_read, | |
271 | .write = pci_write, | |
272 | .endianness = DEVICE_LITTLE_ENDIAN, | |
273 | .valid = { | |
274 | .min_access_size = 4, | |
275 | .max_access_size = 4, | |
276 | }, | |
277 | }; | |
278 | ||
279 | void acpi_pcihp_init(AcpiPciHpState *s, PCIBus *root_bus, | |
99d09dd3 | 280 | MemoryRegion *address_space_io, bool bridges_enabled) |
db4728e6 | 281 | { |
e358edc8 IM |
282 | uint16_t io_size = ACPI_PCIHP_SIZE; |
283 | ||
db4728e6 | 284 | s->root= root_bus; |
99d09dd3 | 285 | s->legacy_piix = !bridges_enabled; |
e358edc8 IM |
286 | |
287 | if (s->legacy_piix) { | |
288 | unsigned *bus_bsel = g_malloc(sizeof *bus_bsel); | |
289 | ||
290 | io_size = ACPI_PCIHP_LEGACY_SIZE; | |
291 | ||
292 | *bus_bsel = ACPI_PCIHP_BSEL_DEFAULT; | |
293 | object_property_add_uint32_ptr(OBJECT(root_bus), ACPI_PCIHP_PROP_BSEL, | |
294 | bus_bsel, NULL); | |
295 | } | |
296 | ||
db4728e6 | 297 | memory_region_init_io(&s->io, NULL, &acpi_pcihp_io_ops, s, |
e358edc8 IM |
298 | "acpi-pci-hotplug", io_size); |
299 | memory_region_add_subregion(address_space_io, ACPI_PCIHP_ADDR, &s->io); | |
db4728e6 MT |
300 | } |
301 | ||
302 | const VMStateDescription vmstate_acpi_pcihp_pci_status = { | |
303 | .name = "acpi_pcihp_pci_status", | |
304 | .version_id = 1, | |
305 | .minimum_version_id = 1, | |
306 | .minimum_version_id_old = 1, | |
307 | .fields = (VMStateField []) { | |
308 | VMSTATE_UINT32(up, AcpiPciHpPciStatus), | |
309 | VMSTATE_UINT32(down, AcpiPciHpPciStatus), | |
310 | VMSTATE_END_OF_LIST() | |
311 | } | |
312 | }; |