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1/*
2 * QEMU<->ACPI BIOS PCI hotplug interface
3 *
4 * QEMU supports PCI hotplug via ACPI. This module
5 * implements the interface between QEMU and the ACPI BIOS.
6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt
7 *
8 * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
9 * Copyright (c) 2006 Fabrice Bellard
10 *
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
22 *
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
25 */
26
27#include "hw/acpi/pcihp.h"
28
29#include "hw/hw.h"
30#include "hw/i386/pc.h"
31#include "hw/pci/pci.h"
32#include "hw/acpi/acpi.h"
33#include "sysemu/sysemu.h"
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34#include "exec/ioport.h"
35#include "exec/address-spaces.h"
36#include "hw/pci/pci_bus.h"
37#include "qom/qom-qobject.h"
38#include "qapi/qmp/qint.h"
39
40//#define DEBUG
41
42#ifdef DEBUG
43# define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
44#else
45# define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0)
46#endif
47
c24d5e0b 48#define ACPI_PCI_HOTPLUG_STATUS 2
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49#define ACPI_PCIHP_ADDR 0xae00
50#define ACPI_PCIHP_SIZE 0x0014
51#define ACPI_PCIHP_LEGACY_SIZE 0x000f
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52#define PCI_UP_BASE 0x0000
53#define PCI_DOWN_BASE 0x0004
54#define PCI_EJ_BASE 0x0008
55#define PCI_RMV_BASE 0x000c
56#define PCI_SEL_BASE 0x0010
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57
58typedef struct AcpiPciHpFind {
59 int bsel;
60 PCIBus *bus;
61} AcpiPciHpFind;
62
63static int acpi_pcihp_get_bsel(PCIBus *bus)
64{
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65 Error *local_err = NULL;
66 int64_t bsel = object_property_get_int(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
67 &local_err);
68
69 if (local_err || bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
70 if (local_err) {
71 error_free(local_err);
72 }
db4728e6 73 return -1;
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74 } else {
75 return bsel;
db4728e6 76 }
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77}
78
79static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
80{
81 AcpiPciHpFind *find = opaque;
82 if (find->bsel == acpi_pcihp_get_bsel(bus)) {
83 find->bus = bus;
84 }
85}
86
87static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
88{
89 AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
90
91 if (bsel < 0) {
92 return NULL;
93 }
94
95 pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
96
97 /* Make bsel 0 eject root bus if bsel property is not set,
98 * for compatibility with non acpi setups.
99 * TODO: really needed?
100 */
101 if (!bsel && !find.bus) {
102 find.bus = s->root;
103 }
104 return find.bus;
105}
106
107static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
108{
109 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
2897ae02 110 DeviceClass *dc = DEVICE_GET_CLASS(dev);
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111 /*
112 * ACPI doesn't allow hotplug of bridge devices. Don't allow
113 * hot-unplug of bridge devices unless they were added by hotplug
114 * (and so, not described by acpi).
115 */
2897ae02 116 return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
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117}
118
119static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
120{
121 BusChild *kid, *next;
786a4ea8 122 int slot = ctz32(slots);
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123 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
124
125 if (!bus) {
126 return;
127 }
128
129 /* Mark request as complete */
130 s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
5a2223ca 131 s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
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132
133 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
134 DeviceState *qdev = kid->child;
135 PCIDevice *dev = PCI_DEVICE(qdev);
136 if (PCI_SLOT(dev->devfn) == slot) {
5a2223ca 137 if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
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138 object_unparent(OBJECT(qdev));
139 }
140 }
141 }
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142}
143
144static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
145{
146 BusChild *kid, *next;
147 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
148
149 /* Execute any pending removes during reset */
150 while (s->acpi_pcihp_pci_status[bsel].down) {
151 acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
152 }
153
154 s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
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155
156 if (!bus) {
157 return;
158 }
159 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
160 DeviceState *qdev = kid->child;
161 PCIDevice *pdev = PCI_DEVICE(qdev);
162 int slot = PCI_SLOT(pdev->devfn);
163
164 if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
165 s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
166 }
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167 }
168}
169
170static void acpi_pcihp_update(AcpiPciHpState *s)
171{
172 int i;
173
174 for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
175 acpi_pcihp_update_hotplug_bus(s, i);
176 }
177}
178
179void acpi_pcihp_reset(AcpiPciHpState *s)
180{
181 acpi_pcihp_update(s);
182}
183
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184void acpi_pcihp_device_plug_cb(ACPIREGS *ar, qemu_irq irq, AcpiPciHpState *s,
185 DeviceState *dev, Error **errp)
db4728e6 186{
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187 PCIDevice *pdev = PCI_DEVICE(dev);
188 int slot = PCI_SLOT(pdev->devfn);
189 int bsel = acpi_pcihp_get_bsel(pdev->bus);
db4728e6 190 if (bsel < 0) {
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191 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
192 ACPI_PCIHP_PROP_BSEL "' set");
193 return;
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194 }
195
196 /* Don't send event when device is enabled during qemu machine creation:
197 * it is present on boot, no hotplug event is necessary. We do send an
198 * event when the device is disabled later. */
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199 if (!dev->hotplugged) {
200 return;
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201 }
202
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203 s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
204
205 ar->gpe.sts[0] |= ACPI_PCI_HOTPLUG_STATUS;
206 acpi_update_sci(ar, irq);
207}
208
209void acpi_pcihp_device_unplug_cb(ACPIREGS *ar, qemu_irq irq, AcpiPciHpState *s,
210 DeviceState *dev, Error **errp)
211{
212 PCIDevice *pdev = PCI_DEVICE(dev);
213 int slot = PCI_SLOT(pdev->devfn);
214 int bsel = acpi_pcihp_get_bsel(pdev->bus);
215 if (bsel < 0) {
216 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
217 ACPI_PCIHP_PROP_BSEL "' set");
218 return;
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219 }
220
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221 s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
222
223 ar->gpe.sts[0] |= ACPI_PCI_HOTPLUG_STATUS;
224 acpi_update_sci(ar, irq);
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225}
226
227static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
228{
229 AcpiPciHpState *s = opaque;
230 uint32_t val = 0;
231 int bsel = s->hotplug_select;
232
fa365d7c 233 if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
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234 return 0;
235 }
236
237 switch (addr) {
a7b613cf 238 case PCI_UP_BASE:
5a2223ca 239 val = s->acpi_pcihp_pci_status[bsel].up;
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240 if (!s->legacy_piix) {
241 s->acpi_pcihp_pci_status[bsel].up = 0;
242 }
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243 ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
244 break;
a7b613cf 245 case PCI_DOWN_BASE:
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246 val = s->acpi_pcihp_pci_status[bsel].down;
247 ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
248 break;
a7b613cf 249 case PCI_EJ_BASE:
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250 /* No feature defined yet */
251 ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
252 break;
a7b613cf 253 case PCI_RMV_BASE:
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254 val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
255 ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
256 break;
a7b613cf 257 case PCI_SEL_BASE:
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258 val = s->hotplug_select;
259 ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
260 default:
261 break;
262 }
263
264 return val;
265}
266
267static void pci_write(void *opaque, hwaddr addr, uint64_t data,
268 unsigned int size)
269{
270 AcpiPciHpState *s = opaque;
271 switch (addr) {
a7b613cf 272 case PCI_EJ_BASE:
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273 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
274 break;
275 }
276 acpi_pcihp_eject_slot(s, s->hotplug_select, data);
277 ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
278 addr, data);
279 break;
a7b613cf 280 case PCI_SEL_BASE:
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281 s->hotplug_select = data;
282 ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n",
283 addr, data);
284 default:
285 break;
286 }
287}
288
289static const MemoryRegionOps acpi_pcihp_io_ops = {
290 .read = pci_read,
291 .write = pci_write,
292 .endianness = DEVICE_LITTLE_ENDIAN,
293 .valid = {
294 .min_access_size = 4,
295 .max_access_size = 4,
296 },
297};
298
78c2d872 299void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
99d09dd3 300 MemoryRegion *address_space_io, bool bridges_enabled)
db4728e6 301{
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302 s->io_len = ACPI_PCIHP_SIZE;
303 s->io_base = ACPI_PCIHP_ADDR;
e358edc8 304
db4728e6 305 s->root= root_bus;
99d09dd3 306 s->legacy_piix = !bridges_enabled;
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307
308 if (s->legacy_piix) {
309 unsigned *bus_bsel = g_malloc(sizeof *bus_bsel);
310
78c2d872 311 s->io_len = ACPI_PCIHP_LEGACY_SIZE;
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312
313 *bus_bsel = ACPI_PCIHP_BSEL_DEFAULT;
314 object_property_add_uint32_ptr(OBJECT(root_bus), ACPI_PCIHP_PROP_BSEL,
315 bus_bsel, NULL);
316 }
317
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318 memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
319 "acpi-pci-hotplug", s->io_len);
320 memory_region_add_subregion(address_space_io, s->io_base, &s->io);
321
322 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
323 &error_abort);
324 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
325 &error_abort);
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326}
327
328const VMStateDescription vmstate_acpi_pcihp_pci_status = {
329 .name = "acpi_pcihp_pci_status",
330 .version_id = 1,
331 .minimum_version_id = 1,
d49805ae 332 .fields = (VMStateField[]) {
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333 VMSTATE_UINT32(up, AcpiPciHpPciStatus),
334 VMSTATE_UINT32(down, AcpiPciHpPciStatus),
335 VMSTATE_END_OF_LIST()
336 }
337};