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Commit | Line | Data |
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93d89f63 IY |
1 | /* |
2 | * ACPI implementation | |
3 | * | |
4 | * Copyright (c) 2006 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
61f3c91a | 8 | * License version 2.1 as published by the Free Software Foundation. |
93d89f63 IY |
9 | * |
10 | * This library is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * Lesser General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU Lesser General Public | |
16 | * License along with this library; if not, see <http://www.gnu.org/licenses/> | |
6b620ca3 PB |
17 | * |
18 | * Contributions after 2012-01-13 are licensed under the terms of the | |
19 | * GNU GPL, version 2 or (at your option) any later version. | |
93d89f63 | 20 | */ |
71e8a915 | 21 | |
b6a0aa05 | 22 | #include "qemu/osdep.h" |
0d09e41a | 23 | #include "hw/i386/pc.h" |
fff123b8 | 24 | #include "hw/southbridge/piix.h" |
64552b6b | 25 | #include "hw/irq.h" |
0d09e41a PB |
26 | #include "hw/isa/apm.h" |
27 | #include "hw/i2c/pm_smbus.h" | |
83c9f4ca | 28 | #include "hw/pci/pci.h" |
a27bd6c7 | 29 | #include "hw/qdev-properties.h" |
0d09e41a | 30 | #include "hw/acpi/acpi.h" |
2bfd0845 MCA |
31 | #include "hw/acpi/pcihp.h" |
32 | #include "hw/acpi/piix4.h" | |
54d31236 | 33 | #include "sysemu/runstate.h" |
9c17d615 | 34 | #include "sysemu/sysemu.h" |
da278d58 | 35 | #include "sysemu/xen.h" |
da34e65c | 36 | #include "qapi/error.h" |
1de7afc9 | 37 | #include "qemu/range.h" |
9e047b98 | 38 | #include "hw/acpi/pcihp.h" |
81cea5e7 | 39 | #include "hw/acpi/cpu_hotplug.h" |
5e1b5d93 | 40 | #include "hw/acpi/cpu.h" |
c24d5e0b | 41 | #include "hw/hotplug.h" |
34774320 | 42 | #include "hw/mem/pc-dimm.h" |
132a908b | 43 | #include "hw/mem/nvdimm.h" |
34774320 | 44 | #include "hw/acpi/memory_hotplug.h" |
43f50410 | 45 | #include "hw/acpi/acpi_dev_interface.h" |
d6454270 | 46 | #include "migration/vmstate.h" |
2e5b09fd | 47 | #include "hw/core/cpu.h" |
b37d56ec | 48 | #include "trace.h" |
db1015e9 | 49 | #include "qom/object.h" |
50d8ff8b | 50 | |
ac404095 | 51 | #define GPE_BASE 0xafe0 |
23910d3f | 52 | #define GPE_LEN 4 |
c177684c | 53 | |
caf108bc JS |
54 | #define ACPI_PCIHP_ADDR_PIIX4 0xae00 |
55 | ||
ac404095 | 56 | struct pci_status { |
7faa8075 | 57 | uint32_t up; /* deprecated, maintained for migration compatibility */ |
ac404095 IY |
58 | uint32_t down; |
59 | }; | |
60 | ||
56e5b2a1 GH |
61 | static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, |
62 | PCIBus *bus, PIIX4PMState *s); | |
ac404095 | 63 | |
93d89f63 IY |
64 | #define ACPI_ENABLE 0xf1 |
65 | #define ACPI_DISABLE 0xf0 | |
66 | ||
355bf2e5 | 67 | static void pm_tmr_timer(ACPIREGS *ar) |
93d89f63 | 68 | { |
355bf2e5 | 69 | PIIX4PMState *s = container_of(ar, PIIX4PMState, ar); |
06313503 | 70 | acpi_update_sci(&s->ar, s->irq); |
93d89f63 IY |
71 | } |
72 | ||
93d89f63 IY |
73 | static void apm_ctrl_changed(uint32_t val, void *arg) |
74 | { | |
75 | PIIX4PMState *s = arg; | |
6a6b5580 | 76 | PCIDevice *d = PCI_DEVICE(s); |
93d89f63 IY |
77 | |
78 | /* ACPI specs 3.0, 4.7.2.5 */ | |
355bf2e5 | 79 | acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE); |
afd6895b PB |
80 | if (val == ACPI_ENABLE || val == ACPI_DISABLE) { |
81 | return; | |
82 | } | |
93d89f63 | 83 | |
6a6b5580 | 84 | if (d->config[0x5b] & (1 << 1)) { |
93d89f63 IY |
85 | if (s->smi_irq) { |
86 | qemu_irq_raise(s->smi_irq); | |
87 | } | |
88 | } | |
89 | } | |
90 | ||
93d89f63 IY |
91 | static void pm_io_space_update(PIIX4PMState *s) |
92 | { | |
6a6b5580 | 93 | PCIDevice *d = PCI_DEVICE(s); |
93d89f63 | 94 | |
277e9340 MT |
95 | s->io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40)); |
96 | s->io_base &= 0xffc0; | |
93d89f63 | 97 | |
af11110b | 98 | memory_region_transaction_begin(); |
6a6b5580 | 99 | memory_region_set_enabled(&s->io, d->config[0x80] & 1); |
277e9340 | 100 | memory_region_set_address(&s->io, s->io_base); |
af11110b | 101 | memory_region_transaction_commit(); |
93d89f63 IY |
102 | } |
103 | ||
24fe083d GH |
104 | static void smbus_io_space_update(PIIX4PMState *s) |
105 | { | |
6a6b5580 AF |
106 | PCIDevice *d = PCI_DEVICE(s); |
107 | ||
108 | s->smb_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x90)); | |
24fe083d GH |
109 | s->smb_io_base &= 0xffc0; |
110 | ||
111 | memory_region_transaction_begin(); | |
6a6b5580 | 112 | memory_region_set_enabled(&s->smb.io, d->config[0xd2] & 1); |
24fe083d GH |
113 | memory_region_set_address(&s->smb.io, s->smb_io_base); |
114 | memory_region_transaction_commit(); | |
93d89f63 IY |
115 | } |
116 | ||
117 | static void pm_write_config(PCIDevice *d, | |
118 | uint32_t address, uint32_t val, int len) | |
119 | { | |
120 | pci_default_write_config(d, address, val, len); | |
24fe083d GH |
121 | if (range_covers_byte(address, len, 0x80) || |
122 | ranges_overlap(address, len, 0x40, 4)) { | |
93d89f63 | 123 | pm_io_space_update((PIIX4PMState *)d); |
24fe083d GH |
124 | } |
125 | if (range_covers_byte(address, len, 0xd2) || | |
126 | ranges_overlap(address, len, 0x90, 4)) { | |
127 | smbus_io_space_update((PIIX4PMState *)d); | |
128 | } | |
93d89f63 IY |
129 | } |
130 | ||
131 | static int vmstate_acpi_post_load(void *opaque, int version_id) | |
132 | { | |
133 | PIIX4PMState *s = opaque; | |
134 | ||
135 | pm_io_space_update(s); | |
2b4e573c | 136 | smbus_io_space_update(s); |
93d89f63 IY |
137 | return 0; |
138 | } | |
139 | ||
23910d3f IY |
140 | #define VMSTATE_GPE_ARRAY(_field, _state) \ |
141 | { \ | |
142 | .name = (stringify(_field)), \ | |
143 | .version_id = 0, \ | |
23910d3f IY |
144 | .info = &vmstate_info_uint16, \ |
145 | .size = sizeof(uint16_t), \ | |
b0b873a0 | 146 | .flags = VMS_SINGLE | VMS_POINTER, \ |
23910d3f IY |
147 | .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ |
148 | } | |
149 | ||
4cf3e6f3 AW |
150 | static const VMStateDescription vmstate_gpe = { |
151 | .name = "gpe", | |
152 | .version_id = 1, | |
153 | .minimum_version_id = 1, | |
d49805ae | 154 | .fields = (VMStateField[]) { |
23910d3f IY |
155 | VMSTATE_GPE_ARRAY(sts, ACPIGPE), |
156 | VMSTATE_GPE_ARRAY(en, ACPIGPE), | |
4cf3e6f3 AW |
157 | VMSTATE_END_OF_LIST() |
158 | } | |
159 | }; | |
160 | ||
161 | static const VMStateDescription vmstate_pci_status = { | |
162 | .name = "pci_status", | |
163 | .version_id = 1, | |
164 | .minimum_version_id = 1, | |
d49805ae | 165 | .fields = (VMStateField[]) { |
e358edc8 IM |
166 | VMSTATE_UINT32(up, struct AcpiPciHpPciStatus), |
167 | VMSTATE_UINT32(down, struct AcpiPciHpPciStatus), | |
4cf3e6f3 AW |
168 | VMSTATE_END_OF_LIST() |
169 | } | |
170 | }; | |
171 | ||
0affda04 | 172 | static bool vmstate_test_use_acpi_hotplug_bridge(void *opaque, int version_id) |
9e047b98 MT |
173 | { |
174 | PIIX4PMState *s = opaque; | |
0affda04 | 175 | return s->use_acpi_hotplug_bridge; |
9e047b98 MT |
176 | } |
177 | ||
0affda04 AS |
178 | static bool vmstate_test_no_use_acpi_hotplug_bridge(void *opaque, |
179 | int version_id) | |
9e047b98 MT |
180 | { |
181 | PIIX4PMState *s = opaque; | |
0affda04 | 182 | return !s->use_acpi_hotplug_bridge; |
9e047b98 MT |
183 | } |
184 | ||
f816a62d IM |
185 | static bool vmstate_test_use_memhp(void *opaque) |
186 | { | |
187 | PIIX4PMState *s = opaque; | |
188 | return s->acpi_memory_hotplug.is_enabled; | |
189 | } | |
190 | ||
191 | static const VMStateDescription vmstate_memhp_state = { | |
192 | .name = "piix4_pm/memhp", | |
193 | .version_id = 1, | |
194 | .minimum_version_id = 1, | |
5cd8cada | 195 | .needed = vmstate_test_use_memhp, |
f816a62d IM |
196 | .fields = (VMStateField[]) { |
197 | VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, PIIX4PMState), | |
198 | VMSTATE_END_OF_LIST() | |
199 | } | |
200 | }; | |
201 | ||
679dd1a9 IM |
202 | static bool vmstate_test_use_cpuhp(void *opaque) |
203 | { | |
204 | PIIX4PMState *s = opaque; | |
205 | return !s->cpu_hotplug_legacy; | |
206 | } | |
207 | ||
208 | static int vmstate_cpuhp_pre_load(void *opaque) | |
209 | { | |
210 | Object *obj = OBJECT(opaque); | |
5325cc34 | 211 | object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort); |
679dd1a9 IM |
212 | return 0; |
213 | } | |
214 | ||
215 | static const VMStateDescription vmstate_cpuhp_state = { | |
216 | .name = "piix4_pm/cpuhp", | |
217 | .version_id = 1, | |
218 | .minimum_version_id = 1, | |
679dd1a9 IM |
219 | .needed = vmstate_test_use_cpuhp, |
220 | .pre_load = vmstate_cpuhp_pre_load, | |
221 | .fields = (VMStateField[]) { | |
222 | VMSTATE_CPU_HOTPLUG(cpuhp_state, PIIX4PMState), | |
223 | VMSTATE_END_OF_LIST() | |
224 | } | |
225 | }; | |
226 | ||
4ab2f2a8 CM |
227 | static bool piix4_vmstate_need_smbus(void *opaque, int version_id) |
228 | { | |
229 | return pm_smbus_vmstate_needed(); | |
230 | } | |
231 | ||
a83c2844 DDAG |
232 | /* |
233 | * This is a fudge to turn off the acpi_index field, | |
234 | * whose test was always broken on piix4 with 6.2 and older machine types. | |
235 | */ | |
236 | static bool vmstate_test_migrate_acpi_index(void *opaque, int version_id) | |
237 | { | |
238 | PIIX4PMState *s = PIIX4_PM(opaque); | |
239 | return s->use_acpi_hotplug_bridge && !s->not_migrate_acpi_index; | |
240 | } | |
241 | ||
b0b873a0 MT |
242 | /* qemu-kvm 1.2 uses version 3 but advertised as 2 |
243 | * To support incoming qemu-kvm 1.2 migration, change version_id | |
244 | * and minimum_version_id to 2 below (which breaks migration from | |
245 | * qemu 1.2). | |
246 | * | |
247 | */ | |
93d89f63 IY |
248 | static const VMStateDescription vmstate_acpi = { |
249 | .name = "piix4_pm", | |
b0b873a0 MT |
250 | .version_id = 3, |
251 | .minimum_version_id = 3, | |
93d89f63 | 252 | .post_load = vmstate_acpi_post_load, |
d49805ae | 253 | .fields = (VMStateField[]) { |
6a6b5580 | 254 | VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState), |
355bf2e5 GH |
255 | VMSTATE_UINT16(ar.pm1.evt.sts, PIIX4PMState), |
256 | VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState), | |
257 | VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState), | |
93d89f63 | 258 | VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState), |
4ab2f2a8 CM |
259 | VMSTATE_STRUCT_TEST(smb, PIIX4PMState, piix4_vmstate_need_smbus, 3, |
260 | pmsmb_vmstate, PMSMBus), | |
e720677e | 261 | VMSTATE_TIMER_PTR(ar.tmr.timer, PIIX4PMState), |
355bf2e5 GH |
262 | VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState), |
263 | VMSTATE_STRUCT(ar.gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE), | |
e358edc8 IM |
264 | VMSTATE_STRUCT_TEST( |
265 | acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT], | |
266 | PIIX4PMState, | |
0affda04 | 267 | vmstate_test_no_use_acpi_hotplug_bridge, |
e358edc8 IM |
268 | 2, vmstate_pci_status, |
269 | struct AcpiPciHpPciStatus), | |
9e047b98 | 270 | VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug, PIIX4PMState, |
b32bd763 | 271 | vmstate_test_use_acpi_hotplug_bridge, |
a83c2844 | 272 | vmstate_test_migrate_acpi_index), |
93d89f63 | 273 | VMSTATE_END_OF_LIST() |
f816a62d | 274 | }, |
5cd8cada JQ |
275 | .subsections = (const VMStateDescription*[]) { |
276 | &vmstate_memhp_state, | |
679dd1a9 | 277 | &vmstate_cpuhp_state, |
5cd8cada | 278 | NULL |
93d89f63 IY |
279 | } |
280 | }; | |
281 | ||
217e8ef9 | 282 | static void piix4_pm_reset(DeviceState *dev) |
93d89f63 | 283 | { |
217e8ef9 | 284 | PIIX4PMState *s = PIIX4_PM(dev); |
6a6b5580 AF |
285 | PCIDevice *d = PCI_DEVICE(s); |
286 | uint8_t *pci_conf = d->config; | |
93d89f63 IY |
287 | |
288 | pci_conf[0x58] = 0; | |
289 | pci_conf[0x59] = 0; | |
290 | pci_conf[0x5a] = 0; | |
291 | pci_conf[0x5b] = 0; | |
292 | ||
4d09d37c GN |
293 | pci_conf[0x40] = 0x01; /* PM io base read only bit */ |
294 | pci_conf[0x80] = 0; | |
295 | ||
61e66c62 | 296 | if (!s->smm_enabled) { |
93d89f63 IY |
297 | /* Mark SMM as already inited (until KVM supports SMM). */ |
298 | pci_conf[0x5B] = 0x02; | |
299 | } | |
0fd74325 IY |
300 | |
301 | acpi_pm1_evt_reset(&s->ar); | |
302 | acpi_pm1_cnt_reset(&s->ar); | |
303 | acpi_pm_tmr_reset(&s->ar); | |
304 | acpi_gpe_reset(&s->ar); | |
305 | acpi_update_sci(&s->ar, s->irq); | |
306 | ||
c046e8c4 | 307 | pm_io_space_update(s); |
3d7e78aa | 308 | acpi_pcihp_reset(&s->acpi_pci_hotplug, !s->use_acpi_root_pci_hotplug); |
93d89f63 IY |
309 | } |
310 | ||
d010f91c | 311 | static void piix4_pm_powerdown_req(Notifier *n, void *opaque) |
93d89f63 | 312 | { |
d010f91c | 313 | PIIX4PMState *s = container_of(n, PIIX4PMState, powerdown_notifier); |
93d89f63 | 314 | |
355bf2e5 GH |
315 | assert(s != NULL); |
316 | acpi_pm1_evt_power_down(&s->ar); | |
93d89f63 IY |
317 | } |
318 | ||
ec266f40 DH |
319 | static void piix4_device_pre_plug_cb(HotplugHandler *hotplug_dev, |
320 | DeviceState *dev, Error **errp) | |
321 | { | |
9040e6df WY |
322 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); |
323 | ||
ec266f40 DH |
324 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
325 | acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp); | |
9040e6df WY |
326 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
327 | if (!s->acpi_memory_hotplug.is_enabled) { | |
328 | error_setg(errp, | |
329 | "memory hotplug is not enabled: %s.memory-hotplug-support " | |
330 | "is not set", object_get_typename(OBJECT(s))); | |
331 | } | |
332 | } else if ( | |
ec266f40 DH |
333 | !object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
334 | error_setg(errp, "acpi: device pre plug request for not supported" | |
335 | " device type: %s", object_get_typename(OBJECT(dev))); | |
336 | } | |
337 | } | |
338 | ||
f1adc360 IM |
339 | static void piix4_device_plug_cb(HotplugHandler *hotplug_dev, |
340 | DeviceState *dev, Error **errp) | |
9e047b98 | 341 | { |
c24d5e0b | 342 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); |
f1adc360 | 343 | |
9040e6df | 344 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
75f27498 XG |
345 | if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { |
346 | nvdimm_acpi_plug_cb(hotplug_dev, dev); | |
347 | } else { | |
348 | acpi_memory_plug_cb(hotplug_dev, &s->acpi_memory_hotplug, | |
349 | dev, errp); | |
350 | } | |
34774320 | 351 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
2bed1ba7 | 352 | acpi_pcihp_device_plug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, errp); |
5e1b5d93 IM |
353 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
354 | if (s->cpu_hotplug_legacy) { | |
355 | legacy_acpi_cpu_plug_cb(hotplug_dev, &s->gpe_cpu, dev, errp); | |
356 | } else { | |
357 | acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp); | |
358 | } | |
f1adc360 | 359 | } else { |
ec266f40 | 360 | g_assert_not_reached(); |
f1adc360 | 361 | } |
c24d5e0b | 362 | } |
9e047b98 | 363 | |
14d5a28f IM |
364 | static void piix4_device_unplug_request_cb(HotplugHandler *hotplug_dev, |
365 | DeviceState *dev, Error **errp) | |
c24d5e0b IM |
366 | { |
367 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); | |
f1adc360 | 368 | |
64fec58e TC |
369 | if (s->acpi_memory_hotplug.is_enabled && |
370 | object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { | |
0058c082 | 371 | acpi_memory_unplug_request_cb(hotplug_dev, &s->acpi_memory_hotplug, |
64fec58e TC |
372 | dev, errp); |
373 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
c97adf3c DH |
374 | acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->acpi_pci_hotplug, |
375 | dev, errp); | |
8872c25a IM |
376 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && |
377 | !s->cpu_hotplug_legacy) { | |
378 | acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp); | |
f1adc360 IM |
379 | } else { |
380 | error_setg(errp, "acpi: device unplug request for not supported device" | |
381 | " type: %s", object_get_typename(OBJECT(dev))); | |
382 | } | |
9e047b98 MT |
383 | } |
384 | ||
c0e57a60 TC |
385 | static void piix4_device_unplug_cb(HotplugHandler *hotplug_dev, |
386 | DeviceState *dev, Error **errp) | |
387 | { | |
f7d3e29d TC |
388 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); |
389 | ||
390 | if (s->acpi_memory_hotplug.is_enabled && | |
391 | object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { | |
392 | acpi_memory_unplug_cb(&s->acpi_memory_hotplug, dev, errp); | |
c97adf3c DH |
393 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
394 | acpi_pcihp_device_unplug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, | |
395 | errp); | |
8872c25a IM |
396 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && |
397 | !s->cpu_hotplug_legacy) { | |
398 | acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp); | |
f7d3e29d TC |
399 | } else { |
400 | error_setg(errp, "acpi: device unplug for not supported device" | |
401 | " type: %s", object_get_typename(OBJECT(dev))); | |
402 | } | |
c0e57a60 TC |
403 | } |
404 | ||
9e8dd451 | 405 | static void piix4_pm_machine_ready(Notifier *n, void *opaque) |
6141dbfe PB |
406 | { |
407 | PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready); | |
6a6b5580 AF |
408 | PCIDevice *d = PCI_DEVICE(s); |
409 | MemoryRegion *io_as = pci_address_space_io(d); | |
6141dbfe PB |
410 | uint8_t *pci_conf; |
411 | ||
6a6b5580 | 412 | pci_conf = d->config; |
b6f32962 | 413 | pci_conf[0x5f] = 0x10 | |
3ce10901 | 414 | (memory_region_present(io_as, 0x378) ? 0x80 : 0); |
6141dbfe | 415 | pci_conf[0x63] = 0x60; |
3ce10901 PB |
416 | pci_conf[0x67] = (memory_region_present(io_as, 0x3f8) ? 0x08 : 0) | |
417 | (memory_region_present(io_as, 0x2f8) ? 0x90 : 0); | |
6141dbfe PB |
418 | } |
419 | ||
5ad1037c | 420 | static void piix4_pm_add_properties(PIIX4PMState *s) |
277e9340 MT |
421 | { |
422 | static const uint8_t acpi_enable_cmd = ACPI_ENABLE; | |
423 | static const uint8_t acpi_disable_cmd = ACPI_DISABLE; | |
424 | static const uint32_t gpe0_blk = GPE_BASE; | |
425 | static const uint32_t gpe0_blk_len = GPE_LEN; | |
426 | static const uint16_t sci_int = 9; | |
427 | ||
428 | object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_ENABLE_CMD, | |
d2623129 | 429 | &acpi_enable_cmd, OBJ_PROP_FLAG_READ); |
277e9340 | 430 | object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_DISABLE_CMD, |
d2623129 | 431 | &acpi_disable_cmd, OBJ_PROP_FLAG_READ); |
277e9340 | 432 | object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK, |
d2623129 | 433 | &gpe0_blk, OBJ_PROP_FLAG_READ); |
277e9340 | 434 | object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK_LEN, |
d2623129 | 435 | &gpe0_blk_len, OBJ_PROP_FLAG_READ); |
277e9340 | 436 | object_property_add_uint16_ptr(OBJECT(s), ACPI_PM_PROP_SCI_INT, |
d2623129 | 437 | &sci_int, OBJ_PROP_FLAG_READ); |
277e9340 | 438 | object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE, |
d2623129 | 439 | &s->io_base, OBJ_PROP_FLAG_READ); |
277e9340 MT |
440 | } |
441 | ||
9af21dbe | 442 | static void piix4_pm_realize(PCIDevice *dev, Error **errp) |
93d89f63 | 443 | { |
74e445f6 | 444 | PIIX4PMState *s = PIIX4_PM(dev); |
93d89f63 IY |
445 | uint8_t *pci_conf; |
446 | ||
6a6b5580 | 447 | pci_conf = dev->config; |
93d89f63 IY |
448 | pci_conf[0x06] = 0x80; |
449 | pci_conf[0x07] = 0x02; | |
93d89f63 | 450 | pci_conf[0x09] = 0x00; |
93d89f63 IY |
451 | pci_conf[0x3d] = 0x01; // interrupt pin 1 |
452 | ||
93d89f63 | 453 | /* APM */ |
42d8a3cf | 454 | apm_init(dev, &s->apm, apm_ctrl_changed, s); |
93d89f63 | 455 | |
61e66c62 | 456 | if (!s->smm_enabled) { |
93d89f63 IY |
457 | /* Mark SMM as already inited to prevent SMM from running. KVM does not |
458 | * support SMM mode. */ | |
459 | pci_conf[0x5B] = 0x02; | |
460 | } | |
461 | ||
462 | /* XXX: which specification is used ? The i82731AB has different | |
463 | mappings */ | |
e8ec0571 IY |
464 | pci_conf[0x90] = s->smb_io_base | 1; |
465 | pci_conf[0x91] = s->smb_io_base >> 8; | |
93d89f63 | 466 | pci_conf[0xd2] = 0x09; |
45726b6e | 467 | pm_smbus_init(DEVICE(dev), &s->smb, true); |
24fe083d | 468 | memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1); |
56e5b2a1 GH |
469 | memory_region_add_subregion(pci_address_space_io(dev), |
470 | s->smb_io_base, &s->smb.io); | |
93d89f63 | 471 | |
64bde0f3 | 472 | memory_region_init(&s->io, OBJECT(s), "piix4-pm", 64); |
af11110b | 473 | memory_region_set_enabled(&s->io, false); |
56e5b2a1 GH |
474 | memory_region_add_subregion(pci_address_space_io(dev), |
475 | 0, &s->io); | |
93d89f63 | 476 | |
77d58b1e | 477 | acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); |
b5a7c024 | 478 | acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); |
6be8cf56 IY |
479 | acpi_pm1_cnt_init(&s->ar, &s->io, s->disable_s3, s->disable_s4, s->s4_val, |
480 | !s->smm_compat && !s->smm_enabled); | |
355bf2e5 | 481 | acpi_gpe_init(&s->ar, GPE_LEN); |
93d89f63 | 482 | |
d010f91c IM |
483 | s->powerdown_notifier.notify = piix4_pm_powerdown_req; |
484 | qemu_register_powerdown_notifier(&s->powerdown_notifier); | |
93d89f63 | 485 | |
6141dbfe PB |
486 | s->machine_ready.notify = piix4_pm_machine_ready; |
487 | qemu_add_machine_init_done_notifier(&s->machine_ready); | |
56e5b2a1 | 488 | |
3f0efcac MCA |
489 | if (xen_enabled()) { |
490 | s->use_acpi_hotplug_bridge = false; | |
491 | } | |
492 | ||
fd56e061 DG |
493 | piix4_acpi_system_hot_add_init(pci_address_space_io(dev), |
494 | pci_get_bus(dev), s); | |
9bc6bfdf | 495 | qbus_set_hotplug_handler(BUS(pci_get_bus(dev)), OBJECT(s)); |
e8ec0571 | 496 | |
5ad1037c | 497 | piix4_pm_add_properties(s); |
e8ec0571 IY |
498 | } |
499 | ||
29786d42 MCA |
500 | static void piix4_pm_init(Object *obj) |
501 | { | |
502 | PIIX4PMState *s = PIIX4_PM(obj); | |
503 | ||
504 | qdev_init_gpio_out(DEVICE(obj), &s->irq, 1); | |
b49e9442 | 505 | qdev_init_gpio_out_named(DEVICE(obj), &s->smi_irq, "smi-irq", 1); |
29786d42 MCA |
506 | } |
507 | ||
b65b93f2 | 508 | static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width) |
93d89f63 | 509 | { |
633aa0ac | 510 | PIIX4PMState *s = opaque; |
355bf2e5 | 511 | uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); |
93d89f63 | 512 | |
b37d56ec | 513 | trace_piix4_gpe_readb(addr, width, val); |
93d89f63 IY |
514 | return val; |
515 | } | |
516 | ||
b65b93f2 GH |
517 | static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val, |
518 | unsigned width) | |
93d89f63 | 519 | { |
633aa0ac | 520 | PIIX4PMState *s = opaque; |
633aa0ac | 521 | |
b37d56ec | 522 | trace_piix4_gpe_writeb(addr, width, val); |
355bf2e5 | 523 | acpi_gpe_ioport_writeb(&s->ar, addr, val); |
06313503 | 524 | acpi_update_sci(&s->ar, s->irq); |
93d89f63 IY |
525 | } |
526 | ||
b65b93f2 GH |
527 | static const MemoryRegionOps piix4_gpe_ops = { |
528 | .read = gpe_readb, | |
529 | .write = gpe_writeb, | |
530 | .valid.min_access_size = 1, | |
531 | .valid.max_access_size = 4, | |
532 | .impl.min_access_size = 1, | |
533 | .impl.max_access_size = 1, | |
534 | .endianness = DEVICE_LITTLE_ENDIAN, | |
535 | }; | |
536 | ||
16bcab97 IM |
537 | |
538 | static bool piix4_get_cpu_hotplug_legacy(Object *obj, Error **errp) | |
539 | { | |
540 | PIIX4PMState *s = PIIX4_PM(obj); | |
541 | ||
542 | return s->cpu_hotplug_legacy; | |
543 | } | |
544 | ||
545 | static void piix4_set_cpu_hotplug_legacy(Object *obj, bool value, Error **errp) | |
546 | { | |
547 | PIIX4PMState *s = PIIX4_PM(obj); | |
548 | ||
679dd1a9 IM |
549 | assert(!value); |
550 | if (s->cpu_hotplug_legacy && value == false) { | |
551 | acpi_switch_to_modern_cphp(&s->gpe_cpu, &s->cpuhp_state, | |
552 | PIIX4_CPU_HOTPLUG_IO_BASE); | |
553 | } | |
16bcab97 IM |
554 | s->cpu_hotplug_legacy = value; |
555 | } | |
556 | ||
56e5b2a1 GH |
557 | static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, |
558 | PCIBus *bus, PIIX4PMState *s) | |
93d89f63 | 559 | { |
64bde0f3 PB |
560 | memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s, |
561 | "acpi-gpe0", GPE_LEN); | |
56e5b2a1 | 562 | memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe); |
ac404095 | 563 | |
df4008c9 AS |
564 | if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) { |
565 | acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent, | |
caf108bc | 566 | s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4); |
df4008c9 | 567 | } |
b8622725 | 568 | |
16bcab97 IM |
569 | s->cpu_hotplug_legacy = true; |
570 | object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy", | |
571 | piix4_get_cpu_hotplug_legacy, | |
d2623129 | 572 | piix4_set_cpu_hotplug_legacy); |
96e3e12b IM |
573 | legacy_acpi_cpu_hotplug_init(parent, OBJECT(s), &s->gpe_cpu, |
574 | PIIX4_CPU_HOTPLUG_IO_BASE); | |
34774320 IM |
575 | |
576 | if (s->acpi_memory_hotplug.is_enabled) { | |
80db0e78 IM |
577 | acpi_memory_hotplug_init(parent, OBJECT(s), &s->acpi_memory_hotplug, |
578 | ACPI_MEMORY_HOTPLUG_BASE); | |
34774320 | 579 | } |
93d89f63 | 580 | } |
5fdae20c | 581 | |
43f50410 IM |
582 | static void piix4_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) |
583 | { | |
584 | PIIX4PMState *s = PIIX4_PM(adev); | |
585 | ||
586 | acpi_memory_ospm_status(&s->acpi_memory_hotplug, list); | |
76623d00 IM |
587 | if (!s->cpu_hotplug_legacy) { |
588 | acpi_cpu_ospm_status(&s->cpuhp_state, list); | |
589 | } | |
43f50410 IM |
590 | } |
591 | ||
eaf23bf7 IM |
592 | static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev) |
593 | { | |
594 | PIIX4PMState *s = PIIX4_PM(adev); | |
595 | ||
596 | acpi_send_gpe_event(&s->ar, s->irq, ev); | |
597 | } | |
598 | ||
5fdae20c IM |
599 | static Property piix4_pm_properties[] = { |
600 | DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0), | |
601 | DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED, PIIX4PMState, disable_s3, 0), | |
602 | DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0), | |
603 | DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2), | |
aa29466b | 604 | DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, PIIX4PMState, |
0affda04 | 605 | use_acpi_hotplug_bridge, true), |
aa29466b | 606 | DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCI_ROOTHP, PIIX4PMState, |
3d7e78aa | 607 | use_acpi_root_pci_hotplug, true), |
34774320 IM |
608 | DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState, |
609 | acpi_memory_hotplug.is_enabled, true), | |
24cd04fc | 610 | DEFINE_PROP_BOOL("smm-compat", PIIX4PMState, smm_compat, false), |
7ace6b4f | 611 | DEFINE_PROP_BOOL("smm-enabled", PIIX4PMState, smm_enabled, false), |
a83c2844 DDAG |
612 | DEFINE_PROP_BOOL("x-not-migrate-acpi-index", PIIX4PMState, |
613 | not_migrate_acpi_index, false), | |
5fdae20c IM |
614 | DEFINE_PROP_END_OF_LIST(), |
615 | }; | |
616 | ||
617 | static void piix4_pm_class_init(ObjectClass *klass, void *data) | |
618 | { | |
619 | DeviceClass *dc = DEVICE_CLASS(klass); | |
620 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
c24d5e0b | 621 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); |
43f50410 | 622 | AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass); |
5fdae20c | 623 | |
9af21dbe | 624 | k->realize = piix4_pm_realize; |
5fdae20c IM |
625 | k->config_write = pm_write_config; |
626 | k->vendor_id = PCI_VENDOR_ID_INTEL; | |
627 | k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3; | |
628 | k->revision = 0x03; | |
629 | k->class_id = PCI_CLASS_BRIDGE_OTHER; | |
217e8ef9 | 630 | dc->reset = piix4_pm_reset; |
5fdae20c IM |
631 | dc->desc = "PM"; |
632 | dc->vmsd = &vmstate_acpi; | |
4f67d30b | 633 | device_class_set_props(dc, piix4_pm_properties); |
5fdae20c IM |
634 | /* |
635 | * Reason: part of PIIX4 southbridge, needs to be wired up, | |
636 | * e.g. by mips_malta_init() | |
637 | */ | |
e90f2a8c | 638 | dc->user_creatable = false; |
2897ae02 | 639 | dc->hotpluggable = false; |
ec266f40 | 640 | hc->pre_plug = piix4_device_pre_plug_cb; |
f1adc360 | 641 | hc->plug = piix4_device_plug_cb; |
14d5a28f | 642 | hc->unplug_request = piix4_device_unplug_request_cb; |
c0e57a60 | 643 | hc->unplug = piix4_device_unplug_cb; |
43f50410 | 644 | adevc->ospm_status = piix4_ospm_status; |
eaf23bf7 | 645 | adevc->send_event = piix4_send_gpe; |
ac35f13b | 646 | adevc->madt_cpu = pc_madt_cpu_entry; |
5fdae20c IM |
647 | } |
648 | ||
649 | static const TypeInfo piix4_pm_info = { | |
650 | .name = TYPE_PIIX4_PM, | |
651 | .parent = TYPE_PCI_DEVICE, | |
29786d42 | 652 | .instance_init = piix4_pm_init, |
5fdae20c IM |
653 | .instance_size = sizeof(PIIX4PMState), |
654 | .class_init = piix4_pm_class_init, | |
c24d5e0b IM |
655 | .interfaces = (InterfaceInfo[]) { |
656 | { TYPE_HOTPLUG_HANDLER }, | |
43f50410 | 657 | { TYPE_ACPI_DEVICE_IF }, |
fd3b02c8 | 658 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, |
c24d5e0b IM |
659 | { } |
660 | } | |
5fdae20c IM |
661 | }; |
662 | ||
663 | static void piix4_pm_register_types(void) | |
664 | { | |
665 | type_register_static(&piix4_pm_info); | |
666 | } | |
667 | ||
668 | type_init(piix4_pm_register_types) |