[mirror_qemu.git] / hw / arm / allwinner-a10.c

/*
 * Allwinner A10 SoC emulation
 *
 * Copyright (C) 2013 Li Guang
 * Written by Li Guang <lig.fnst@cn.fujitsu.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
 * for more details.
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/sysbus.h"
#include "hw/arm/allwinner-a10.h"
#include "hw/misc/unimp.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "hw/usb/hcd-ohci.h"

#define AW_A10_MMC0_BASE        0x01c0f000
#define AW_A10_PIC_REG_BASE     0x01c20400
#define AW_A10_PIT_REG_BASE     0x01c20c00
#define AW_A10_UART0_REG_BASE   0x01c28000
#define AW_A10_EMAC_BASE        0x01c0b000
#define AW_A10_EHCI_BASE        0x01c14000
#define AW_A10_OHCI_BASE        0x01c14400
#define AW_A10_SATA_BASE        0x01c18000
#define AW_A10_RTC_BASE         0x01c20d00

static void aw_a10_init(Object *obj)
{
    AwA10State *s = AW_A10(obj);

    object_initialize_child(obj, "cpu", &s->cpu,
                            ARM_CPU_TYPE_NAME("cortex-a8"));

    object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC);

    object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT);

    object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC);

    object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI);

    if (machine_usb(current_machine)) {
        int i;

        for (i = 0; i < AW_A10_NUM_USB; i++) {
            object_initialize_child(obj, "ehci[*]", &s->ehci[i],
                                    TYPE_PLATFORM_EHCI);
            object_initialize_child(obj, "ohci[*]", &s->ohci[i],
                                    TYPE_SYSBUS_OHCI);
        }
    }

    object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I);

    object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I);
}

static void aw_a10_realize(DeviceState *dev, Error **errp)
{
    AwA10State *s = AW_A10(dev);
    SysBusDevice *sysbusdev;

    if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) {
        return;
    }

    if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) {
        return;
    }
    sysbusdev = SYS_BUS_DEVICE(&s->intc);
    sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
    sysbus_connect_irq(sysbusdev, 0,
                       qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
    sysbus_connect_irq(sysbusdev, 1,
                       qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
    qdev_pass_gpios(DEVICE(&s->intc), dev, NULL);

    if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) {
        return;
    }
    sysbusdev = SYS_BUS_DEVICE(&s->timer);
    sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE);
    sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22));
    sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23));
    sysbus_connect_irq(sysbusdev, 2, qdev_get_gpio_in(dev, 24));
    sysbus_connect_irq(sysbusdev, 3, qdev_get_gpio_in(dev, 25));
    sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67));
    sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68));

    memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
                           &error_fatal);
    memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
    create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);

    /* FIXME use qdev NIC properties instead of nd_table[] */
    if (nd_table[0].used) {
        qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
        qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
    }
    if (!sysbus_realize(SYS_BUS_DEVICE(&s->emac), errp)) {
        return;
    }
    sysbusdev = SYS_BUS_DEVICE(&s->emac);
    sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE);
    sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55));

    if (!sysbus_realize(SYS_BUS_DEVICE(&s->sata), errp)) {
        return;
    }
    sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE);
    sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56));

    /* FIXME use a qdev chardev prop instead of serial_hd() */
    serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2,
                   qdev_get_gpio_in(dev, 1),
                   115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);

    if (machine_usb(current_machine)) {
        int i;

        for (i = 0; i < AW_A10_NUM_USB; i++) {
            g_autofree char *bus = g_strdup_printf("usb-bus.%d", i);

            object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable",
                                     true, &error_fatal);
            sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal);
            sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
                            AW_A10_EHCI_BASE + i * 0x8000);
            sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
                               qdev_get_gpio_in(dev, 39 + i));

            object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus,
                                    &error_fatal);
            sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal);
            sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
                            AW_A10_OHCI_BASE + i * 0x8000);
            sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0,
                               qdev_get_gpio_in(dev, 64 + i));
        }
    }

    /* SD/MMC */
    object_property_set_link(OBJECT(&s->mmc0), "dma-memory",
                             OBJECT(get_system_memory()), &error_fatal);
    sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal);
    sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE);
    sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32));
    object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0),
                              "sd-bus");

    /* RTC */
    sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal);
    sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10);
}

static void aw_a10_class_init(ObjectClass *oc, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(oc);

    dc->realize = aw_a10_realize;
    /* Reason: Uses serial_hds and nd_table in realize function */
    dc->user_creatable = false;
}

static const TypeInfo aw_a10_type_info = {
    .name = TYPE_AW_A10,
    .parent = TYPE_DEVICE,
    .instance_size = sizeof(AwA10State),
    .instance_init = aw_a10_init,
    .class_init = aw_a10_class_init,
};

static void aw_a10_register_types(void)
{
    type_register_static(&aw_a10_type_info);
}

type_init(aw_a10_register_types)
Commit	Line	Data
9158fa54 LG	1	/*
	2	* Allwinner A10 SoC emulation
	3	*
	4	* Copyright (C) 2013 Li Guang
	5	* Written by Li Guang <lig.fnst@cn.fujitsu.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License as published by the
	9	* Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful, but WITHOUT
	13	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	14	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	15	* for more details.
	16	*/
	17
12b16722	18	#include "qemu/osdep.h"
da34e65c	19	#include "qapi/error.h"
0b8fa32f	20	#include "qemu/module.h"
9158fa54	21	#include "hw/sysbus.h"
9158fa54	22	#include "hw/arm/allwinner-a10.h"
ead07aa4	23	#include "hw/misc/unimp.h"
46517dd4	24	#include "sysemu/sysemu.h"
7abc8cab GR	25	#include "hw/boards.h"
7abc8cab GR	26	#include "hw/usb/hcd-ohci.h"
9158fa54	27
82e48382	28	#define AW_A10_MMC0_BASE 0x01c0f000
7f0ec989 PMD	29	#define AW_A10_PIC_REG_BASE 0x01c20400
	30	#define AW_A10_PIT_REG_BASE 0x01c20c00
	31	#define AW_A10_UART0_REG_BASE 0x01c28000
	32	#define AW_A10_EMAC_BASE 0x01c0b000
7abc8cab GR	33	#define AW_A10_EHCI_BASE 0x01c14000
7abc8cab GR	34	#define AW_A10_OHCI_BASE 0x01c14400
7f0ec989	35	#define AW_A10_SATA_BASE 0x01c18000
a9ad9e73	36	#define AW_A10_RTC_BASE 0x01c20d00
7f0ec989	37
9158fa54 LG	38	static void aw_a10_init(Object *obj)
	39	{
	40	AwA10State *s = AW_A10(obj);
	41
9fc7fc4d MA	42	object_initialize_child(obj, "cpu", &s->cpu,
9fc7fc4d MA	43	ARM_CPU_TYPE_NAME("cortex-a8"));
9158fa54	44
db873cc5	45	object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC);
9158fa54	46
db873cc5	47	object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT);
db7dfd4c	48
db873cc5	49	object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC);
dca62576	50
db873cc5	51	object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI);
7abc8cab GR	52
	53	if (machine_usb(current_machine)) {
	54	int i;
	55
	56	for (i = 0; i < AW_A10_NUM_USB; i++) {
db873cc5 MA	57	object_initialize_child(obj, "ehci[*]", &s->ehci[i],
	58	TYPE_PLATFORM_EHCI);
	59	object_initialize_child(obj, "ohci[*]", &s->ohci[i],
	60	TYPE_SYSBUS_OHCI);
7abc8cab GR	61	}
7abc8cab GR	62	}
82e48382	63
db873cc5	64	object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I);
a9ad9e73	65
db873cc5	66	object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I);
9158fa54 LG	67	}
	68
	69	static void aw_a10_realize(DeviceState dev, Error *errp)
	70	{
	71	AwA10State *s = AW_A10(dev);
	72	SysBusDevice *sysbusdev;
9158fa54	73
668f62ec	74	if (!qdev_realize(DEVICE(&s->cpu), NULL, errp)) {
9158fa54 LG	75	return;
9158fa54 LG	76	}
9158fa54	77
668f62ec	78	if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) {
9158fa54 LG	79	return;
	80	}
	81	sysbusdev = SYS_BUS_DEVICE(&s->intc);
	82	sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
af4ba4ed PMD	83	sysbus_connect_irq(sysbusdev, 0,
	84	qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
	85	sysbus_connect_irq(sysbusdev, 1,
	86	qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
f8a865d3	87	qdev_pass_gpios(DEVICE(&s->intc), dev, NULL);
9158fa54	88
668f62ec	89	if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer), errp)) {
9158fa54 LG	90	return;
	91	}
	92	sysbusdev = SYS_BUS_DEVICE(&s->timer);
	93	sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE);
f8a865d3 PMD	94	sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22));
	95	sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23));
	96	sysbus_connect_irq(sysbusdev, 2, qdev_get_gpio_in(dev, 24));
	97	sysbus_connect_irq(sysbusdev, 3, qdev_get_gpio_in(dev, 25));
	98	sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67));
	99	sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68));
9158fa54	100
ead07aa4 PMD	101	memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB,
	102	&error_fatal);
	103	memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
	104	create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
	105
8aabc543 TH	106	/* FIXME use qdev NIC properties instead of nd_table[] */
	107	if (nd_table[0].used) {
	108	qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
	109	qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
	110	}
668f62ec	111	if (!sysbus_realize(SYS_BUS_DEVICE(&s->emac), errp)) {
db7dfd4c BG	112	return;
	113	}
	114	sysbusdev = SYS_BUS_DEVICE(&s->emac);
	115	sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE);
f8a865d3	116	sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55));
db7dfd4c	117
668f62ec	118	if (!sysbus_realize(SYS_BUS_DEVICE(&s->sata), errp)) {
dca62576 PC	119	return;
	120	}
	121	sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE);
f8a865d3	122	sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56));
dca62576	123
9bca0edb	124	/* FIXME use a qdev chardev prop instead of serial_hd() */
f8a865d3 PMD	125	serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2,
f8a865d3 PMD	126	qdev_get_gpio_in(dev, 1),
9bca0edb	127	115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
7abc8cab GR	128
	129	if (machine_usb(current_machine)) {
	130	int i;
	131
	132	for (i = 0; i < AW_A10_NUM_USB; i++) {
aaea18d5	133	g_autofree char *bus = g_strdup_printf("usb-bus.%d", i);
7abc8cab	134
5325cc34 MA	135	object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable",
5325cc34 MA	136	true, &error_fatal);
db873cc5	137	sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal);
7abc8cab GR	138	sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
	139	AW_A10_EHCI_BASE + i * 0x8000);
	140	sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
	141	qdev_get_gpio_in(dev, 39 + i));
	142
5325cc34	143	object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus,
7abc8cab	144	&error_fatal);
db873cc5	145	sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal);
7abc8cab GR	146	sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
	147	AW_A10_OHCI_BASE + i * 0x8000);
	148	sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0,
	149	qdev_get_gpio_in(dev, 64 + i));
	150	}
	151	}
82e48382 NL	152
82e48382 NL	153	/* SD/MMC */
b3aec952 PMD	154	object_property_set_link(OBJECT(&s->mmc0), "dma-memory",
b3aec952 PMD	155	OBJECT(get_system_memory()), &error_fatal);
db873cc5	156	sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal);
82e48382 NL	157	sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE);
	158	sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32));
	159	object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0),
d2623129	160	"sd-bus");
a9ad9e73 NL	161
a9ad9e73 NL	162	/* RTC */
db873cc5	163	sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal);
a9ad9e73	164	sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10);
9158fa54 LG	165	}
	166
	167	static void aw_a10_class_init(ObjectClass oc, void data)
	168	{
	169	DeviceClass *dc = DEVICE_CLASS(oc);
	170
	171	dc->realize = aw_a10_realize;
8aabc543	172	/* Reason: Uses serial_hds and nd_table in realize function */
dc89a180	173	dc->user_creatable = false;
9158fa54 LG	174	}
	175
	176	static const TypeInfo aw_a10_type_info = {
	177	.name = TYPE_AW_A10,
	178	.parent = TYPE_DEVICE,
	179	.instance_size = sizeof(AwA10State),
	180	.instance_init = aw_a10_init,
	181	.class_init = aw_a10_class_init,
	182	};
	183
	184	static void aw_a10_register_types(void)
	185	{
	186	type_register_static(&aw_a10_type_info);
	187	}
	188
	189	type_init(aw_a10_register_types)