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0550e3bf JCD |
1 | /* |
2 | * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net> | |
3 | * | |
4 | * MCIMX6UL_EVK Board System emulation. | |
5 | * | |
6 | * This code is licensed under the GPL, version 2 or later. | |
7 | * See the file `COPYING' in the top level directory. | |
8 | * | |
9 | * It (partially) emulates a mcimx6ul_evk board, with a Freescale | |
10 | * i.MX6ul SoC | |
11 | */ | |
12 | ||
13 | #include "qemu/osdep.h" | |
14 | #include "qapi/error.h" | |
0550e3bf JCD |
15 | #include "hw/arm/fsl-imx6ul.h" |
16 | #include "hw/boards.h" | |
a27bd6c7 | 17 | #include "hw/qdev-properties.h" |
0550e3bf JCD |
18 | #include "qemu/error-report.h" |
19 | #include "sysemu/qtest.h" | |
20 | ||
0550e3bf JCD |
21 | static void mcimx6ul_evk_init(MachineState *machine) |
22 | { | |
23 | static struct arm_boot_info boot_info; | |
14dbfa55 | 24 | FslIMX6ULState *s; |
0550e3bf JCD |
25 | int i; |
26 | ||
27 | if (machine->ram_size > FSL_IMX6UL_MMDC_SIZE) { | |
28 | error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)", | |
29 | machine->ram_size, FSL_IMX6UL_MMDC_SIZE); | |
30 | exit(1); | |
31 | } | |
32 | ||
33 | boot_info = (struct arm_boot_info) { | |
34 | .loader_start = FSL_IMX6UL_MMDC_ADDR, | |
35 | .board_id = -1, | |
36 | .ram_size = machine->ram_size, | |
ae2474f1 | 37 | .psci_conduit = QEMU_PSCI_CONDUIT_SMC, |
0550e3bf JCD |
38 | }; |
39 | ||
14dbfa55 | 40 | s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL)); |
d2623129 | 41 | object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); |
5325cc34 MA |
42 | object_property_set_uint(OBJECT(s), "fec1-phy-num", 2, &error_fatal); |
43 | object_property_set_uint(OBJECT(s), "fec2-phy-num", 1, &error_fatal); | |
bebcddbb GR |
44 | object_property_set_bool(OBJECT(s), "fec1-phy-connected", false, |
45 | &error_fatal); | |
ce189ab2 | 46 | qdev_realize(DEVICE(s), NULL, &error_fatal); |
0550e3bf | 47 | |
14dbfa55 IM |
48 | memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR, |
49 | machine->ram); | |
0550e3bf JCD |
50 | |
51 | for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) { | |
52 | BusState *bus; | |
53 | DeviceState *carddev; | |
54 | DriveInfo *di; | |
55 | BlockBackend *blk; | |
56 | ||
8acf052f | 57 | di = drive_get(IF_SD, 0, i); |
0550e3bf | 58 | blk = di ? blk_by_legacy_dinfo(di) : NULL; |
14dbfa55 | 59 | bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus"); |
3e80f690 | 60 | carddev = qdev_new(TYPE_SD_CARD); |
934df912 | 61 | qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); |
3e80f690 | 62 | qdev_realize_and_unref(carddev, bus, &error_fatal); |
0550e3bf JCD |
63 | } |
64 | ||
65 | if (!qtest_enabled()) { | |
14dbfa55 | 66 | arm_load_kernel(&s->cpu, machine, &boot_info); |
0550e3bf JCD |
67 | } |
68 | } | |
69 | ||
70 | static void mcimx6ul_evk_machine_init(MachineClass *mc) | |
71 | { | |
f548f201 | 72 | mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex-A7)"; |
0550e3bf JCD |
73 | mc->init = mcimx6ul_evk_init; |
74 | mc->max_cpus = FSL_IMX6UL_NUM_CPUS; | |
14dbfa55 | 75 | mc->default_ram_id = "mcimx6ul-evk.ram"; |
0550e3bf JCD |
76 | } |
77 | DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init) |