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Commit | Line | Data |
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1df7d1f9 AB |
1 | /* |
2 | * Raspberry Pi emulation (c) 2012 Gregory Estrade | |
3 | * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous | |
4 | * | |
5 | * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft | |
6 | * Written by Andrew Baumann | |
7 | * | |
bade5816 PE |
8 | * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti |
9 | * Upstream code cleanup (c) 2018 Pekka Enberg | |
10 | * | |
6111a0c0 PMD |
11 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
12 | * See the COPYING file in the top-level directory. | |
1df7d1f9 AB |
13 | */ |
14 | ||
c964b660 | 15 | #include "qemu/osdep.h" |
ff3dcf28 | 16 | #include "qemu/units.h" |
f5bb124e | 17 | #include "qemu/cutils.h" |
da34e65c | 18 | #include "qapi/error.h" |
1df7d1f9 | 19 | #include "hw/arm/bcm2836.h" |
cd6c9977 | 20 | #include "hw/registerfields.h" |
1df7d1f9 AB |
21 | #include "qemu/error-report.h" |
22 | #include "hw/boards.h" | |
23 | #include "hw/loader.h" | |
12ec8bd5 | 24 | #include "hw/arm/boot.h" |
db1015e9 | 25 | #include "qom/object.h" |
1df7d1f9 AB |
26 | |
27 | #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ | |
28 | #define MVBAR_ADDR 0x400 /* secure vectors */ | |
29 | #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */ | |
bade5816 PE |
30 | #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */ |
31 | #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */ | |
ff72cb6b | 32 | #define SPINTABLE_ADDR 0xd8 /* Pi 3 bootloader spintable */ |
1df7d1f9 | 33 | |
918c81a5 PMD |
34 | /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */ |
35 | #define MACH_TYPE_BCM2708 3138 | |
1df7d1f9 | 36 | |
db1015e9 | 37 | struct RaspiMachineState { |
cb57df6f PMD |
38 | /*< private >*/ |
39 | MachineState parent_obj; | |
40 | /*< public >*/ | |
926dcdf0 | 41 | BCM283XState soc; |
0f15c6e3 | 42 | struct arm_boot_info binfo; |
db1015e9 EH |
43 | }; |
44 | typedef struct RaspiMachineState RaspiMachineState; | |
cb57df6f | 45 | |
db1015e9 | 46 | struct RaspiMachineClass { |
cb57df6f PMD |
47 | /*< private >*/ |
48 | MachineClass parent_obj; | |
49 | /*< public >*/ | |
c318c66c | 50 | uint32_t board_rev; |
db1015e9 EH |
51 | }; |
52 | typedef struct RaspiMachineClass RaspiMachineClass; | |
cb57df6f PMD |
53 | |
54 | #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common") | |
8110fa1d EH |
55 | DECLARE_OBJ_CHECKERS(RaspiMachineState, RaspiMachineClass, |
56 | RASPI_MACHINE, TYPE_RASPI_MACHINE) | |
cb57df6f | 57 | |
1df7d1f9 | 58 | |
cd6c9977 PMD |
59 | /* |
60 | * Board revision codes: | |
61 | * www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/ | |
62 | */ | |
63 | FIELD(REV_CODE, REVISION, 0, 4); | |
64 | FIELD(REV_CODE, TYPE, 4, 8); | |
65 | FIELD(REV_CODE, PROCESSOR, 12, 4); | |
66 | FIELD(REV_CODE, MANUFACTURER, 16, 4); | |
67 | FIELD(REV_CODE, MEMORY_SIZE, 20, 3); | |
68 | FIELD(REV_CODE, STYLE, 23, 1); | |
69 | ||
696788d6 | 70 | typedef enum RaspiProcessorId { |
df6cf08d | 71 | PROCESSOR_ID_BCM2835 = 0, |
696788d6 PMD |
72 | PROCESSOR_ID_BCM2836 = 1, |
73 | PROCESSOR_ID_BCM2837 = 2, | |
74 | } RaspiProcessorId; | |
75 | ||
76 | static const struct { | |
77 | const char *type; | |
78 | int cores_count; | |
79 | } soc_property[] = { | |
df6cf08d | 80 | [PROCESSOR_ID_BCM2835] = {TYPE_BCM2835, 1}, |
696788d6 PMD |
81 | [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS}, |
82 | [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS}, | |
83 | }; | |
84 | ||
f5bb124e PMD |
85 | static uint64_t board_ram_size(uint32_t board_rev) |
86 | { | |
87 | assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ | |
88 | return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE); | |
89 | } | |
90 | ||
696788d6 | 91 | static RaspiProcessorId board_processor_id(uint32_t board_rev) |
cd6c9977 | 92 | { |
696788d6 PMD |
93 | int proc_id = FIELD_EX32(board_rev, REV_CODE, PROCESSOR); |
94 | ||
cd6c9977 | 95 | assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ |
696788d6 PMD |
96 | assert(proc_id < ARRAY_SIZE(soc_property) && soc_property[proc_id].type); |
97 | ||
98 | return proc_id; | |
cd6c9977 PMD |
99 | } |
100 | ||
2e664b45 PMD |
101 | static const char *board_soc_type(uint32_t board_rev) |
102 | { | |
696788d6 | 103 | return soc_property[board_processor_id(board_rev)].type; |
2e664b45 PMD |
104 | } |
105 | ||
759f0f87 PMD |
106 | static int cores_count(uint32_t board_rev) |
107 | { | |
696788d6 | 108 | return soc_property[board_processor_id(board_rev)].cores_count; |
759f0f87 PMD |
109 | } |
110 | ||
98b541e1 PMD |
111 | static const char *board_type(uint32_t board_rev) |
112 | { | |
113 | static const char *types[] = { | |
114 | "A", "B", "A+", "B+", "2B", "Alpha", "CM1", NULL, "3B", "Zero", | |
115 | "CM3", NULL, "Zero W", "3B+", "3A+", NULL, "CM3+", "4B", | |
116 | }; | |
117 | assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */ | |
118 | int bt = FIELD_EX32(board_rev, REV_CODE, TYPE); | |
119 | if (bt >= ARRAY_SIZE(types) || !types[bt]) { | |
120 | return "Unknown"; | |
121 | } | |
122 | return types[bt]; | |
123 | } | |
124 | ||
1df7d1f9 AB |
125 | static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) |
126 | { | |
127 | static const uint32_t smpboot[] = { | |
128 | 0xe1a0e00f, /* mov lr, pc */ | |
129 | 0xe3a0fe00 + (BOARDSETUP_ADDR >> 4), /* mov pc, BOARDSETUP_ADDR */ | |
130 | 0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5;get core ID */ | |
131 | 0xe7e10050, /* ubfx r0, r0, #0, #2 ;extract LSB */ | |
132 | 0xe59f5014, /* ldr r5, =0x400000CC ;load mbox base */ | |
133 | 0xe320f001, /* 1: yield */ | |
134 | 0xe7953200, /* ldr r3, [r5, r0, lsl #4] ;read mbox for our core*/ | |
135 | 0xe3530000, /* cmp r3, #0 ;spin while zero */ | |
136 | 0x0afffffb, /* beq 1b */ | |
137 | 0xe7853200, /* str r3, [r5, r0, lsl #4] ;clear mbox */ | |
138 | 0xe12fff13, /* bx r3 ;jump to target */ | |
139 | 0x400000cc, /* (constant: mailbox 3 read/clear base) */ | |
140 | }; | |
141 | ||
142 | /* check that we don't overrun board setup vectors */ | |
143 | QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); | |
144 | /* check that board setup address is correctly relocated */ | |
145 | QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR & 0xf) != 0 | |
146 | || (BOARDSETUP_ADDR >> 4) >= 0x100); | |
147 | ||
0f073693 PMD |
148 | rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot), |
149 | info->smp_loader_start, | |
150 | arm_boot_address_space(cpu, info)); | |
1df7d1f9 AB |
151 | } |
152 | ||
ff72cb6b PM |
153 | static void write_smpboot64(ARMCPU *cpu, const struct arm_boot_info *info) |
154 | { | |
0f073693 | 155 | AddressSpace *as = arm_boot_address_space(cpu, info); |
ff72cb6b PM |
156 | /* Unlike the AArch32 version we don't need to call the board setup hook. |
157 | * The mechanism for doing the spin-table is also entirely different. | |
158 | * We must have four 64-bit fields at absolute addresses | |
159 | * 0xd8, 0xe0, 0xe8, 0xf0 in RAM, which are the flag variables for | |
160 | * our CPUs, and which we must ensure are zero initialized before | |
161 | * the primary CPU goes into the kernel. We put these variables inside | |
162 | * a rom blob, so that the reset for ROM contents zeroes them for us. | |
163 | */ | |
164 | static const uint32_t smpboot[] = { | |
165 | 0xd2801b05, /* mov x5, 0xd8 */ | |
166 | 0xd53800a6, /* mrs x6, mpidr_el1 */ | |
167 | 0x924004c6, /* and x6, x6, #0x3 */ | |
168 | 0xd503205f, /* spin: wfe */ | |
169 | 0xf86678a4, /* ldr x4, [x5,x6,lsl #3] */ | |
170 | 0xb4ffffc4, /* cbz x4, spin */ | |
171 | 0xd2800000, /* mov x0, #0x0 */ | |
172 | 0xd2800001, /* mov x1, #0x0 */ | |
173 | 0xd2800002, /* mov x2, #0x0 */ | |
174 | 0xd2800003, /* mov x3, #0x0 */ | |
175 | 0xd61f0080, /* br x4 */ | |
176 | }; | |
177 | ||
178 | static const uint64_t spintables[] = { | |
179 | 0, 0, 0, 0 | |
180 | }; | |
181 | ||
0f073693 PMD |
182 | rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot), |
183 | info->smp_loader_start, as); | |
184 | rom_add_blob_fixed_as("raspi_spintables", spintables, sizeof(spintables), | |
185 | SPINTABLE_ADDR, as); | |
ff72cb6b PM |
186 | } |
187 | ||
1df7d1f9 AB |
188 | static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info) |
189 | { | |
190 | arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); | |
191 | } | |
192 | ||
193 | static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) | |
194 | { | |
195 | CPUState *cs = CPU(cpu); | |
196 | cpu_set_pc(cs, info->smp_loader_start); | |
197 | } | |
198 | ||
cdfaa57d PMD |
199 | static void setup_boot(MachineState *machine, RaspiProcessorId processor_id, |
200 | size_t ram_size) | |
1df7d1f9 | 201 | { |
02058e4b | 202 | RaspiMachineState *s = RASPI_MACHINE(machine); |
1df7d1f9 AB |
203 | int r; |
204 | ||
0f15c6e3 PMD |
205 | s->binfo.board_id = MACH_TYPE_BCM2708; |
206 | s->binfo.ram_size = ram_size; | |
207 | s->binfo.nb_cpus = machine->smp.cpus; | |
01e02f5a | 208 | |
cdfaa57d PMD |
209 | if (processor_id <= PROCESSOR_ID_BCM2836) { |
210 | /* | |
211 | * The BCM2835 and BCM2836 require some custom setup code to run | |
212 | * in Secure mode before booting a kernel (to set up the SMC vectors | |
213 | * so that we get a no-op SMC; this is used by Linux to call the | |
01e02f5a | 214 | * firmware for some cache maintenance operations. |
cdfaa57d | 215 | * The BCM2837 doesn't need this. |
01e02f5a | 216 | */ |
0f15c6e3 PMD |
217 | s->binfo.board_setup_addr = BOARDSETUP_ADDR; |
218 | s->binfo.write_board_setup = write_board_setup; | |
219 | s->binfo.secure_board_setup = true; | |
220 | s->binfo.secure_boot = true; | |
01e02f5a | 221 | } |
1df7d1f9 | 222 | |
cdfaa57d PMD |
223 | /* BCM2836 and BCM2837 requires SMP setup */ |
224 | if (processor_id >= PROCESSOR_ID_BCM2836) { | |
0f15c6e3 | 225 | s->binfo.smp_loader_start = SMPBOOT_ADDR; |
cdfaa57d | 226 | if (processor_id == PROCESSOR_ID_BCM2836) { |
0f15c6e3 | 227 | s->binfo.write_secondary_boot = write_smpboot; |
ff72cb6b | 228 | } else { |
0f15c6e3 | 229 | s->binfo.write_secondary_boot = write_smpboot64; |
ff72cb6b | 230 | } |
0f15c6e3 | 231 | s->binfo.secondary_cpu_reset_hook = reset_secondary; |
1df7d1f9 AB |
232 | } |
233 | ||
234 | /* If the user specified a "firmware" image (e.g. UEFI), we bypass | |
235 | * the normal Linux boot process | |
236 | */ | |
237 | if (machine->firmware) { | |
1af70269 PMD |
238 | hwaddr firmware_addr = processor_id <= PROCESSOR_ID_BCM2836 |
239 | ? FIRMWARE_ADDR_2 : FIRMWARE_ADDR_3; | |
1df7d1f9 | 240 | /* load the firmware image (typically kernel.img) */ |
bade5816 PE |
241 | r = load_image_targphys(machine->firmware, firmware_addr, |
242 | ram_size - firmware_addr); | |
1df7d1f9 AB |
243 | if (r < 0) { |
244 | error_report("Failed to load firmware from %s", machine->firmware); | |
245 | exit(1); | |
246 | } | |
247 | ||
0f15c6e3 PMD |
248 | s->binfo.entry = firmware_addr; |
249 | s->binfo.firmware_loaded = true; | |
1df7d1f9 AB |
250 | } |
251 | ||
0f15c6e3 | 252 | arm_load_kernel(&s->soc.cpu[0].core, machine, &s->binfo); |
1df7d1f9 AB |
253 | } |
254 | ||
13c4e2c0 | 255 | static void raspi_machine_init(MachineState *machine) |
1df7d1f9 | 256 | { |
c318c66c | 257 | RaspiMachineClass *mc = RASPI_MACHINE_GET_CLASS(machine); |
cb57df6f | 258 | RaspiMachineState *s = RASPI_MACHINE(machine); |
c318c66c | 259 | uint32_t board_rev = mc->board_rev; |
f5bb124e | 260 | uint64_t ram_size = board_ram_size(board_rev); |
5e9c2a8d | 261 | uint32_t vcram_size; |
a55b53a2 AB |
262 | DriveInfo *di; |
263 | BlockBackend *blk; | |
264 | BusState *bus; | |
265 | DeviceState *carddev; | |
1df7d1f9 | 266 | |
f5bb124e PMD |
267 | if (machine->ram_size != ram_size) { |
268 | char *size_str = size_to_str(ram_size); | |
269 | error_report("Invalid RAM size, should be %s", size_str); | |
270 | g_free(size_str); | |
ff3dcf28 PM |
271 | exit(1); |
272 | } | |
273 | ||
1df7d1f9 | 274 | /* FIXME: Remove when we have custom CPU address space support */ |
a4317ae8 IM |
275 | memory_region_add_subregion_overlap(get_system_memory(), 0, |
276 | machine->ram, 0); | |
1df7d1f9 AB |
277 | |
278 | /* Setup the SOC */ | |
9fc7fc4d MA |
279 | object_initialize_child(OBJECT(machine), "soc", &s->soc, |
280 | board_soc_type(board_rev)); | |
d2623129 | 281 | object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram)); |
5325cc34 | 282 | object_property_set_int(OBJECT(&s->soc), "board-rev", board_rev, |
f0afa731 | 283 | &error_abort); |
ce189ab2 | 284 | qdev_realize(DEVICE(&s->soc), NULL, &error_abort); |
1df7d1f9 | 285 | |
a55b53a2 AB |
286 | /* Create and plug in the SD cards */ |
287 | di = drive_get_next(IF_SD); | |
288 | blk = di ? blk_by_legacy_dinfo(di) : NULL; | |
289 | bus = qdev_get_child_bus(DEVICE(&s->soc), "sd-bus"); | |
290 | if (bus == NULL) { | |
291 | error_report("No SD bus found in SOC object"); | |
292 | exit(1); | |
293 | } | |
3e80f690 | 294 | carddev = qdev_new(TYPE_SD_CARD); |
934df912 | 295 | qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); |
3e80f690 | 296 | qdev_realize_and_unref(carddev, bus, &error_fatal); |
a55b53a2 | 297 | |
c5c6c47c MAL |
298 | vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size", |
299 | &error_abort); | |
cdfaa57d PMD |
300 | setup_boot(machine, board_processor_id(mc->board_rev), |
301 | machine->ram_size - vcram_size); | |
bade5816 PE |
302 | } |
303 | ||
f0eeb4b6 PMD |
304 | static void raspi_machine_class_common_init(MachineClass *mc, |
305 | uint32_t board_rev) | |
1df7d1f9 | 306 | { |
62f06f71 PMD |
307 | mc->desc = g_strdup_printf("Raspberry Pi %s (revision 1.%u)", |
308 | board_type(board_rev), | |
309 | FIELD_EX32(board_rev, REV_CODE, REVISION)); | |
13c4e2c0 | 310 | mc->init = raspi_machine_init; |
1df7d1f9 AB |
311 | mc->block_default_type = IF_SD; |
312 | mc->no_parallel = 1; | |
313 | mc->no_floppy = 1; | |
314 | mc->no_cdrom = 1; | |
759f0f87 | 315 | mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev); |
975f3402 | 316 | mc->default_ram_size = board_ram_size(board_rev); |
a4317ae8 | 317 | mc->default_ram_id = "ram"; |
1df7d1f9 | 318 | }; |
1c3db49d | 319 | |
3c8f9927 PMD |
320 | static void raspi0_machine_class_init(ObjectClass *oc, void *data) |
321 | { | |
322 | MachineClass *mc = MACHINE_CLASS(oc); | |
323 | RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc); | |
324 | ||
325 | rmc->board_rev = 0x920092; /* Revision 1.2 */ | |
326 | raspi_machine_class_common_init(mc, rmc->board_rev); | |
327 | }; | |
328 | ||
ac6bc6eb PMD |
329 | static void raspi1ap_machine_class_init(ObjectClass *oc, void *data) |
330 | { | |
331 | MachineClass *mc = MACHINE_CLASS(oc); | |
332 | RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc); | |
333 | ||
334 | rmc->board_rev = 0x900021; /* Revision 1.1 */ | |
335 | raspi_machine_class_common_init(mc, rmc->board_rev); | |
336 | }; | |
337 | ||
f0eeb4b6 PMD |
338 | static void raspi2b_machine_class_init(ObjectClass *oc, void *data) |
339 | { | |
340 | MachineClass *mc = MACHINE_CLASS(oc); | |
341 | RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc); | |
342 | ||
aa35ec22 | 343 | mc->alias = "raspi2"; |
f0eeb4b6 PMD |
344 | rmc->board_rev = 0xa21041; |
345 | raspi_machine_class_common_init(mc, rmc->board_rev); | |
346 | }; | |
347 | ||
348 | #ifdef TARGET_AARCH64 | |
5be94252 PMD |
349 | static void raspi3ap_machine_class_init(ObjectClass *oc, void *data) |
350 | { | |
351 | MachineClass *mc = MACHINE_CLASS(oc); | |
352 | RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc); | |
353 | ||
354 | rmc->board_rev = 0x9020e0; /* Revision 1.0 */ | |
355 | raspi_machine_class_common_init(mc, rmc->board_rev); | |
356 | }; | |
357 | ||
f0eeb4b6 PMD |
358 | static void raspi3b_machine_class_init(ObjectClass *oc, void *data) |
359 | { | |
360 | MachineClass *mc = MACHINE_CLASS(oc); | |
361 | RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc); | |
362 | ||
aa35ec22 | 363 | mc->alias = "raspi3"; |
f0eeb4b6 PMD |
364 | rmc->board_rev = 0xa02082; |
365 | raspi_machine_class_common_init(mc, rmc->board_rev); | |
366 | }; | |
367 | #endif /* TARGET_AARCH64 */ | |
368 | ||
cb57df6f PMD |
369 | static const TypeInfo raspi_machine_types[] = { |
370 | { | |
3c8f9927 PMD |
371 | .name = MACHINE_TYPE_NAME("raspi0"), |
372 | .parent = TYPE_RASPI_MACHINE, | |
373 | .class_init = raspi0_machine_class_init, | |
374 | }, { | |
ac6bc6eb PMD |
375 | .name = MACHINE_TYPE_NAME("raspi1ap"), |
376 | .parent = TYPE_RASPI_MACHINE, | |
377 | .class_init = raspi1ap_machine_class_init, | |
378 | }, { | |
aa35ec22 | 379 | .name = MACHINE_TYPE_NAME("raspi2b"), |
cb57df6f | 380 | .parent = TYPE_RASPI_MACHINE, |
f0eeb4b6 | 381 | .class_init = raspi2b_machine_class_init, |
cb57df6f | 382 | #ifdef TARGET_AARCH64 |
5be94252 PMD |
383 | }, { |
384 | .name = MACHINE_TYPE_NAME("raspi3ap"), | |
385 | .parent = TYPE_RASPI_MACHINE, | |
386 | .class_init = raspi3ap_machine_class_init, | |
cb57df6f | 387 | }, { |
aa35ec22 | 388 | .name = MACHINE_TYPE_NAME("raspi3b"), |
cb57df6f | 389 | .parent = TYPE_RASPI_MACHINE, |
f0eeb4b6 | 390 | .class_init = raspi3b_machine_class_init, |
cb57df6f PMD |
391 | #endif |
392 | }, { | |
393 | .name = TYPE_RASPI_MACHINE, | |
394 | .parent = TYPE_MACHINE, | |
395 | .instance_size = sizeof(RaspiMachineState), | |
396 | .class_size = sizeof(RaspiMachineClass), | |
397 | .abstract = true, | |
398 | } | |
399 | }; | |
400 | ||
401 | DEFINE_TYPES(raspi_machine_types) |