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b00052e4
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1/*
2 * PXA270-based Clamshell PDA platforms.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This code is licensed under the GNU GPL v2.
6b620ca3
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8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
b00052e4
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11 */
12
12b16722 13#include "qemu/osdep.h"
da34e65c 14#include "qapi/error.h"
83c9f4ca 15#include "hw/hw.h"
0d09e41a 16#include "hw/arm/pxa.h"
bd2be150 17#include "hw/arm/arm.h"
9c17d615 18#include "sysemu/sysemu.h"
83c9f4ca 19#include "hw/pcmcia.h"
0d09e41a 20#include "hw/i2c/i2c.h"
8fd06719 21#include "hw/ssi/ssi.h"
0d09e41a 22#include "hw/block/flash.h"
1de7afc9 23#include "qemu/timer.h"
bd2be150 24#include "hw/devices.h"
0d09e41a 25#include "hw/arm/sharpsl.h"
28ecbaee 26#include "ui/console.h"
87ecb68b 27#include "audio/audio.h"
83c9f4ca 28#include "hw/boards.h"
fa1d36df 29#include "sysemu/block-backend.h"
83c9f4ca 30#include "hw/sysbus.h"
022c62cb 31#include "exec/address-spaces.h"
14da5821 32#include "sysemu/sysemu.h"
b00052e4 33
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34#undef REG_FMT
35#define REG_FMT "0x%02lx"
36
37/* Spitz Flash */
38#define FLASH_BASE 0x0c000000
39#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
40#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
41#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
42#define FLASH_ECCCNTR 0x0c /* ECC byte counter */
43#define FLASH_ECCCLRR 0x10 /* Clear ECC */
44#define FLASH_FLASHIO 0x14 /* Flash I/O */
45#define FLASH_FLASHCTL 0x18 /* Flash Control */
46
47#define FLASHCTL_CE0 (1 << 0)
48#define FLASHCTL_CLE (1 << 1)
49#define FLASHCTL_ALE (1 << 2)
50#define FLASHCTL_WP (1 << 3)
51#define FLASHCTL_CE1 (1 << 4)
52#define FLASHCTL_RYBY (1 << 5)
53#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
54
7eb8104a
AF
55#define TYPE_SL_NAND "sl-nand"
56#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
57
bc24a225 58typedef struct {
7eb8104a
AF
59 SysBusDevice parent_obj;
60
7cc09e6c 61 MemoryRegion iomem;
d4220389 62 DeviceState *nand;
b00052e4 63 uint8_t ctl;
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64 uint8_t manf_id;
65 uint8_t chip_id;
bc24a225
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66 ECCState ecc;
67} SLNANDState;
b00052e4 68
a8170e5e 69static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
b00052e4 70{
bc24a225 71 SLNANDState *s = (SLNANDState *) opaque;
b00052e4 72 int ryby;
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73
74 switch (addr) {
75#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
76 case FLASH_ECCLPLB:
77 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
78 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
79
80#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
81 case FLASH_ECCLPUB:
82 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
83 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
84
85 case FLASH_ECCCP:
86 return s->ecc.cp;
87
88 case FLASH_ECCCNTR:
89 return s->ecc.count & 0xff;
90
91 case FLASH_FLASHCTL:
92 nand_getpins(s->nand, &ryby);
93 if (ryby)
94 return s->ctl | FLASHCTL_RYBY;
95 else
96 return s->ctl;
97
98 case FLASH_FLASHIO:
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99 if (size == 4) {
100 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
101 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
102 }
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103 return ecc_digest(&s->ecc, nand_getio(s->nand));
104
105 default:
a8b7063b 106 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
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107 }
108 return 0;
109}
110
a8170e5e 111static void sl_write(void *opaque, hwaddr addr,
7cc09e6c 112 uint64_t value, unsigned size)
b00052e4 113{
bc24a225 114 SLNANDState *s = (SLNANDState *) opaque;
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115
116 switch (addr) {
117 case FLASH_ECCCLRR:
118 /* Value is ignored. */
119 ecc_reset(&s->ecc);
120 break;
121
122 case FLASH_FLASHCTL:
123 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
124 nand_setpins(s->nand,
125 s->ctl & FLASHCTL_CLE,
126 s->ctl & FLASHCTL_ALE,
127 s->ctl & FLASHCTL_NCE,
128 s->ctl & FLASHCTL_WP,
129 0);
130 break;
131
132 case FLASH_FLASHIO:
133 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
134 break;
135
136 default:
a8b7063b 137 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
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138 }
139}
140
141enum {
142 FLASH_128M,
143 FLASH_1024M,
144};
145
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146static const MemoryRegionOps sl_ops = {
147 .read = sl_read,
148 .write = sl_write,
149 .endianness = DEVICE_NATIVE_ENDIAN,
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150};
151
bc24a225 152static void sl_flash_register(PXA2xxState *cpu, int size)
b00052e4 153{
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154 DeviceState *dev;
155
7eb8104a 156 dev = qdev_create(NULL, TYPE_SL_NAND);
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157
158 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
159 if (size == FLASH_128M)
160 qdev_prop_set_uint8(dev, "chip_id", 0x73);
161 else if (size == FLASH_1024M)
162 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
163
164 qdev_init_nofail(dev);
1356b98d 165 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
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166}
167
f68575c9 168static void sl_nand_init(Object *obj)
7eb8104a 169{
f68575c9
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170 SLNANDState *s = SL_NAND(obj);
171 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
522f253c 172 DriveInfo *nand;
34f9f0b5 173
b00052e4 174 s->ctl = 0;
af9e40aa 175 /* FIXME use a qdev drive property instead of drive_get() */
522f253c 176 nand = drive_get(IF_MTD, 0, 0);
4be74634 177 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
fa1d36df 178 s->manf_id, s->chip_id);
b00052e4 179
f68575c9 180 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
750ecd44 181 sysbus_init_mmio(dev, &s->iomem);
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182}
183
184/* Spitz Keyboard */
185
186#define SPITZ_KEY_STROBE_NUM 11
187#define SPITZ_KEY_SENSE_NUM 7
188
189static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
190 12, 17, 91, 34, 36, 38, 39
191};
192
193static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
194 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
195};
196
197/* Eighth additional row maps the special keys */
198static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
199 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
200 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
201 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
202 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
203 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
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204 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
205 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
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206 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
207};
208
209#define SPITZ_GPIO_AK_INT 13 /* Remote control */
210#define SPITZ_GPIO_SYNC 16 /* Sync button */
211#define SPITZ_GPIO_ON_KEY 95 /* Power button */
212#define SPITZ_GPIO_SWA 97 /* Lid */
213#define SPITZ_GPIO_SWB 96 /* Tablet mode */
214
215/* The special buttons are mapped to unused keys */
216static const int spitz_gpiomap[5] = {
217 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
218 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
219};
b00052e4 220
73e9d965
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221#define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
222#define SPITZ_KEYBOARD(obj) \
223 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
224
bc24a225 225typedef struct {
73e9d965
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226 SysBusDevice parent_obj;
227
38641a52 228 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
38641a52 229 qemu_irq gpiomap[5];
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230 int keymap[0x80];
231 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
232 uint16_t strobe_state;
233 uint16_t sense_state;
234
235 uint16_t pre_map[0x100];
236 uint16_t modifiers;
237 uint16_t imodifiers;
238 uint8_t fifo[16];
239 int fifopos, fifolen;
240 QEMUTimer *kbdtimer;
bc24a225 241} SpitzKeyboardState;
b00052e4 242
bc24a225 243static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
b00052e4
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244{
245 int i;
246 uint16_t strobe, sense = 0;
247 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
248 strobe = s->keyrow[i] & s->strobe_state;
249 if (strobe) {
250 sense |= 1 << i;
251 if (!(s->sense_state & (1 << i)))
38641a52 252 qemu_irq_raise(s->sense[i]);
b00052e4 253 } else if (s->sense_state & (1 << i))
38641a52 254 qemu_irq_lower(s->sense[i]);
b00052e4
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255 }
256
257 s->sense_state = sense;
258}
259
38641a52 260static void spitz_keyboard_strobe(void *opaque, int line, int level)
b00052e4 261{
bc24a225 262 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
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263
264 if (level)
265 s->strobe_state |= 1 << line;
266 else
267 s->strobe_state &= ~(1 << line);
268 spitz_keyboard_sense_update(s);
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269}
270
bc24a225 271static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
b00052e4
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272{
273 int spitz_keycode = s->keymap[keycode & 0x7f];
274 if (spitz_keycode == -1)
275 return;
276
277 /* Handle the additional keys */
278 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
7ef4227b 279 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
b00052e4
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280 return;
281 }
282
283 if (keycode & 0x80)
284 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
285 else
286 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
287
288 spitz_keyboard_sense_update(s);
289}
290
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291#define SPITZ_MOD_SHIFT (1 << 7)
292#define SPITZ_MOD_CTRL (1 << 8)
293#define SPITZ_MOD_FN (1 << 9)
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294
295#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
296
7ef4227b 297static void spitz_keyboard_handler(void *opaque, int keycode)
b00052e4 298{
7ef4227b 299 SpitzKeyboardState *s = opaque;
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300 uint16_t code;
301 int mapcode;
302 switch (keycode) {
303 case 0x2a: /* Left Shift */
304 s->modifiers |= 1;
305 break;
306 case 0xaa:
307 s->modifiers &= ~1;
308 break;
309 case 0x36: /* Right Shift */
310 s->modifiers |= 2;
311 break;
312 case 0xb6:
313 s->modifiers &= ~2;
314 break;
315 case 0x1d: /* Control */
316 s->modifiers |= 4;
317 break;
318 case 0x9d:
319 s->modifiers &= ~4;
320 break;
321 case 0x38: /* Alt */
322 s->modifiers |= 8;
323 break;
324 case 0xb8:
325 s->modifiers &= ~8;
326 break;
327 }
328
329 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
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330 (keycode | SPITZ_MOD_SHIFT) :
331 (keycode & ~SPITZ_MOD_SHIFT))];
b00052e4
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332
333 if (code != mapcode) {
334#if 0
0062609f 335 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
b00052e4 336 QUEUE_KEY(0x2a | (keycode & 0x80));
0062609f
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337 }
338 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
b00052e4 339 QUEUE_KEY(0x1d | (keycode & 0x80));
0062609f
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340 }
341 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
b00052e4 342 QUEUE_KEY(0x38 | (keycode & 0x80));
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343 }
344 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
b00052e4 345 QUEUE_KEY(0x2a | (~keycode & 0x80));
0062609f
PM
346 }
347 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
b00052e4 348 QUEUE_KEY(0x36 | (~keycode & 0x80));
0062609f 349 }
b00052e4
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350#else
351 if (keycode & 0x80) {
352 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
353 QUEUE_KEY(0x2a | 0x80);
354 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
355 QUEUE_KEY(0x1d | 0x80);
356 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
357 QUEUE_KEY(0x38 | 0x80);
358 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
359 QUEUE_KEY(0x2a);
360 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
361 QUEUE_KEY(0x36);
362 s->imodifiers = 0;
363 } else {
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364 if ((code & SPITZ_MOD_SHIFT) &&
365 !((s->modifiers | s->imodifiers) & 1)) {
b00052e4
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366 QUEUE_KEY(0x2a);
367 s->imodifiers |= 1;
368 }
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369 if ((code & SPITZ_MOD_CTRL) &&
370 !((s->modifiers | s->imodifiers) & 4)) {
b00052e4
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371 QUEUE_KEY(0x1d);
372 s->imodifiers |= 4;
373 }
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374 if ((code & SPITZ_MOD_FN) &&
375 !((s->modifiers | s->imodifiers) & 8)) {
b00052e4
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376 QUEUE_KEY(0x38);
377 s->imodifiers |= 8;
378 }
0062609f 379 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
b00052e4
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380 !(s->imodifiers & 0x10)) {
381 QUEUE_KEY(0x2a | 0x80);
382 s->imodifiers |= 0x10;
383 }
0062609f 384 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
b00052e4
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385 !(s->imodifiers & 0x20)) {
386 QUEUE_KEY(0x36 | 0x80);
387 s->imodifiers |= 0x20;
388 }
389 }
390#endif
391 }
392
393 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
394}
395
396static void spitz_keyboard_tick(void *opaque)
397{
bc24a225 398 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
b00052e4
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399
400 if (s->fifolen) {
401 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
402 s->fifolen --;
403 if (s->fifopos >= 16)
404 s->fifopos = 0;
405 }
406
bc72ad67 407 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
73bcb24d 408 NANOSECONDS_PER_SECOND / 32);
b00052e4
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409}
410
bc24a225 411static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
b00052e4
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412{
413 int i;
414 for (i = 0; i < 0x100; i ++)
415 s->pre_map[i] = i;
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416 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
417 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
418 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
419 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
420 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
421 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
422 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */
423 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
424 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
425 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
426 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
427 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */
428 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */
429 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */
430 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */
431 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */
432 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */
433 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */
434 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */
435 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */
436 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */
437 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */
438 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */
439 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */
440 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */
441 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */
442 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */
443 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */
444 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */
445 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
446 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */
447 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */
b00052e4
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448
449 s->modifiers = 0;
450 s->imodifiers = 0;
451 s->fifopos = 0;
452 s->fifolen = 0;
b00052e4
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453}
454
0062609f
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455#undef SPITZ_MOD_SHIFT
456#undef SPITZ_MOD_CTRL
457#undef SPITZ_MOD_FN
b00052e4 458
7ef4227b 459static int spitz_keyboard_post_load(void *opaque, int version_id)
aa941b94 460{
bc24a225 461 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
aa941b94
AZ
462
463 /* Release all pressed keys */
464 memset(s->keyrow, 0, sizeof(s->keyrow));
465 spitz_keyboard_sense_update(s);
466 s->modifiers = 0;
467 s->imodifiers = 0;
468 s->fifopos = 0;
469 s->fifolen = 0;
470
471 return 0;
472}
473
bc24a225 474static void spitz_keyboard_register(PXA2xxState *cpu)
b00052e4 475{
7ef4227b
DES
476 int i;
477 DeviceState *dev;
bc24a225 478 SpitzKeyboardState *s;
b00052e4 479
73e9d965
AF
480 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
481 s = SPITZ_KEYBOARD(dev);
b00052e4 482
38641a52 483 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
0bb53337 484 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
38641a52
AZ
485
486 for (i = 0; i < 5; i ++)
0bb53337 487 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
38641a52 488
7ef4227b
DES
489 if (!graphic_rotate)
490 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
491
492 for (i = 0; i < 5; i++)
493 qemu_set_irq(s->gpiomap[i], 0);
494
b00052e4 495 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
0bb53337 496 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
7ef4227b
DES
497 qdev_get_gpio_in(dev, i));
498
bc72ad67 499 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
7ef4227b
DES
500
501 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
502}
503
f68575c9 504static void spitz_keyboard_init(Object *obj)
7ef4227b 505{
f68575c9
XZ
506 DeviceState *dev = DEVICE(obj);
507 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
7ef4227b
DES
508 int i, j;
509
7ef4227b
DES
510 for (i = 0; i < 0x80; i ++)
511 s->keymap[i] = -1;
512 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
513 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
514 if (spitz_keymap[i][j] != -1)
515 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
b00052e4
AZ
516
517 spitz_keyboard_pre_map(s);
aa941b94 518
bc72ad67 519 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
73e9d965
AF
520 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
521 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
b00052e4
AZ
522}
523
b00052e4
AZ
524/* LCD backlight controller */
525
526#define LCDTG_RESCTL 0x00
527#define LCDTG_PHACTRL 0x01
528#define LCDTG_DUTYCTRL 0x02
529#define LCDTG_POWERREG0 0x03
530#define LCDTG_POWERREG1 0x04
531#define LCDTG_GPOR3 0x05
532#define LCDTG_PICTRL 0x06
533#define LCDTG_POLCTRL 0x07
534
a984a69e
PB
535typedef struct {
536 SSISlave ssidev;
43842120
DES
537 uint32_t bl_intensity;
538 uint32_t bl_power;
a984a69e 539} SpitzLCDTG;
b00052e4 540
a984a69e 541static void spitz_bl_update(SpitzLCDTG *s)
b00052e4 542{
a984a69e
PB
543 if (s->bl_power && s->bl_intensity)
544 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
b00052e4 545 else
89cdb6af 546 zaurus_printf("LCD Backlight now off\n");
b00052e4
AZ
547}
548
a984a69e
PB
549/* FIXME: Implement GPIO properly and remove this hack. */
550static SpitzLCDTG *spitz_lcdtg;
551
38641a52 552static inline void spitz_bl_bit5(void *opaque, int line, int level)
b00052e4 553{
a984a69e
PB
554 SpitzLCDTG *s = spitz_lcdtg;
555 int prev = s->bl_intensity;
b00052e4
AZ
556
557 if (level)
a984a69e 558 s->bl_intensity &= ~0x20;
b00052e4 559 else
a984a69e 560 s->bl_intensity |= 0x20;
b00052e4 561
a984a69e
PB
562 if (s->bl_power && prev != s->bl_intensity)
563 spitz_bl_update(s);
b00052e4
AZ
564}
565
38641a52 566static inline void spitz_bl_power(void *opaque, int line, int level)
b00052e4 567{
a984a69e
PB
568 SpitzLCDTG *s = spitz_lcdtg;
569 s->bl_power = !!level;
570 spitz_bl_update(s);
b00052e4
AZ
571}
572
a984a69e 573static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
b00052e4 574{
a984a69e
PB
575 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
576 int addr;
577 addr = value >> 5;
578 value &= 0x1f;
b00052e4
AZ
579
580 switch (addr) {
581 case LCDTG_RESCTL:
582 if (value)
89cdb6af 583 zaurus_printf("LCD in QVGA mode\n");
b00052e4 584 else
89cdb6af 585 zaurus_printf("LCD in VGA mode\n");
b00052e4
AZ
586 break;
587
588 case LCDTG_DUTYCTRL:
a984a69e
PB
589 s->bl_intensity &= ~0x1f;
590 s->bl_intensity |= value;
591 if (s->bl_power)
592 spitz_bl_update(s);
b00052e4
AZ
593 break;
594
595 case LCDTG_POWERREG0:
596 /* Set common voltage to M62332FP */
597 break;
598 }
a984a69e
PB
599 return 0;
600}
601
7673bb4c 602static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
a984a69e
PB
603{
604 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
605
606 spitz_lcdtg = s;
607 s->bl_power = 0;
608 s->bl_intensity = 0x20;
b00052e4
AZ
609}
610
611/* SSP devices */
612
613#define CORGI_SSP_PORT 2
614
615#define SPITZ_GPIO_LCDCON_CS 53
616#define SPITZ_GPIO_ADS7846_CS 14
617#define SPITZ_GPIO_MAX1111_CS 20
618#define SPITZ_GPIO_TP_INT 11
619
a984a69e 620static DeviceState *max1111;
b00052e4
AZ
621
622/* "Demux" the signal based on current chipselect */
a984a69e
PB
623typedef struct {
624 SSISlave ssidev;
625 SSIBus *bus[3];
43842120 626 uint32_t enable[3];
a984a69e 627} CorgiSSPState;
b00052e4 628
a984a69e 629static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
b00052e4 630{
a984a69e
PB
631 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
632 int i;
633
634 for (i = 0; i < 3; i++) {
635 if (s->enable[i]) {
636 return ssi_transfer(s->bus[i], value);
637 }
638 }
639 return 0;
b00052e4
AZ
640}
641
38641a52 642static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
b00052e4 643{
a984a69e
PB
644 CorgiSSPState *s = (CorgiSSPState *)opaque;
645 assert(line >= 0 && line < 3);
646 s->enable[line] = !level;
b00052e4
AZ
647}
648
649#define MAX1111_BATT_VOLT 1
650#define MAX1111_BATT_TEMP 2
651#define MAX1111_ACIN_VOLT 3
652
653#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
654#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
655#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
656
38641a52 657static void spitz_adc_temp_on(void *opaque, int line, int level)
b00052e4
AZ
658{
659 if (!max1111)
660 return;
661
662 if (level)
663 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
664 else
665 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
666}
667
7673bb4c 668static void corgi_ssp_realize(SSISlave *d, Error **errp)
a984a69e 669{
1a7d9ee6
PC
670 DeviceState *dev = DEVICE(d);
671 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
a984a69e 672
1a7d9ee6
PC
673 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
674 s->bus[0] = ssi_create_bus(dev, "ssi0");
675 s->bus[1] = ssi_create_bus(dev, "ssi1");
676 s->bus[2] = ssi_create_bus(dev, "ssi2");
a984a69e
PB
677}
678
bc24a225 679static void spitz_ssp_attach(PXA2xxState *cpu)
b00052e4 680{
a984a69e
PB
681 DeviceState *mux;
682 DeviceState *dev;
683 void *bus;
684
685 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
38641a52 686
a984a69e 687 bus = qdev_get_child_bus(mux, "ssi0");
22ed1d34 688 ssi_create_slave(bus, "spitz-lcdtg");
b00052e4 689
a984a69e
PB
690 bus = qdev_get_child_bus(mux, "ssi1");
691 dev = ssi_create_slave(bus, "ads7846");
692 qdev_connect_gpio_out(dev, 0,
0bb53337 693 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
b00052e4 694
a984a69e
PB
695 bus = qdev_get_child_bus(mux, "ssi2");
696 max1111 = ssi_create_slave(bus, "max1111");
b00052e4
AZ
697 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
698 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
699 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
700
0bb53337 701 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
a984a69e 702 qdev_get_gpio_in(mux, 0));
0bb53337 703 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
a984a69e 704 qdev_get_gpio_in(mux, 1));
0bb53337 705 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
a984a69e 706 qdev_get_gpio_in(mux, 2));
b00052e4
AZ
707}
708
709/* CF Microdrive */
710
bc24a225 711static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
b00052e4 712{
bc24a225 713 PCMCIACardState *md;
751c6a17 714 DriveInfo *dinfo;
b00052e4 715
751c6a17 716 dinfo = drive_get(IF_IDE, 0, 0);
124386cc 717 if (!dinfo || dinfo->media_cd)
e4bcb14c 718 return;
124386cc
MA
719 md = dscm1xxxx_init(dinfo);
720 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
b00052e4
AZ
721}
722
adb86c37
AZ
723/* Wm8750 and Max7310 on I2C */
724
725#define AKITA_MAX_ADDR 0x18
611d7189
AZ
726#define SPITZ_WM_ADDRL 0x1b
727#define SPITZ_WM_ADDRH 0x1a
adb86c37
AZ
728
729#define SPITZ_GPIO_WM 5
730
38641a52 731static void spitz_wm8750_addr(void *opaque, int line, int level)
adb86c37 732{
9e07bdf8 733 I2CSlave *wm = (I2CSlave *) opaque;
adb86c37
AZ
734 if (level)
735 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
736 else
737 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
738}
adb86c37 739
bc24a225 740static void spitz_i2c_setup(PXA2xxState *cpu)
adb86c37
AZ
741{
742 /* Attach the CPU on one end of our I2C bus. */
a5c82852 743 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
adb86c37 744
cdbe40ca 745 DeviceState *wm;
adb86c37 746
adb86c37 747 /* Attach a WM8750 to the bus */
cdbe40ca 748 wm = i2c_create_slave(bus, "wm8750", 0);
adb86c37 749
38641a52 750 spitz_wm8750_addr(wm, 0, 0);
0bb53337 751 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
f3c7d038 752 qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
adb86c37
AZ
753 /* .. and to the sound interface. */
754 cpu->i2s->opaque = wm;
755 cpu->i2s->codec_out = wm8750_dac_dat;
756 cpu->i2s->codec_in = wm8750_adc_dat;
757 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
adb86c37
AZ
758}
759
bc24a225 760static void spitz_akita_i2c_setup(PXA2xxState *cpu)
adb86c37
AZ
761{
762 /* Attach a Max7310 to Akita I2C bus. */
6c0bd6bd
PB
763 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
764 AKITA_MAX_ADDR);
adb86c37
AZ
765}
766
b00052e4
AZ
767/* Other peripherals */
768
38641a52 769static void spitz_out_switch(void *opaque, int line, int level)
b00052e4 770{
38641a52
AZ
771 switch (line) {
772 case 0:
89cdb6af 773 zaurus_printf("Charging %s.\n", level ? "off" : "on");
38641a52
AZ
774 break;
775 case 1:
89cdb6af 776 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
38641a52
AZ
777 break;
778 case 2:
89cdb6af 779 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
38641a52
AZ
780 break;
781 case 3:
89cdb6af 782 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
38641a52
AZ
783 break;
784 case 4:
785 spitz_bl_bit5(opaque, line, level);
786 break;
787 case 5:
788 spitz_bl_power(opaque, line, level);
789 break;
790 case 6:
791 spitz_adc_temp_on(opaque, line, level);
792 break;
793 }
b00052e4
AZ
794}
795
796#define SPITZ_SCP_LED_GREEN 1
797#define SPITZ_SCP_JK_B 2
798#define SPITZ_SCP_CHRG_ON 3
799#define SPITZ_SCP_MUTE_L 4
800#define SPITZ_SCP_MUTE_R 5
801#define SPITZ_SCP_CF_POWER 6
802#define SPITZ_SCP_LED_ORANGE 7
803#define SPITZ_SCP_JK_A 8
804#define SPITZ_SCP_ADC_TEMP_ON 9
805#define SPITZ_SCP2_IR_ON 1
806#define SPITZ_SCP2_AKIN_PULLUP 2
807#define SPITZ_SCP2_BACKLIGHT_CONT 7
808#define SPITZ_SCP2_BACKLIGHT_ON 8
809#define SPITZ_SCP2_MIC_BIAS 9
810
bc24a225 811static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
383d01c6 812 DeviceState *scp0, DeviceState *scp1)
b00052e4 813{
38641a52
AZ
814 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
815
383d01c6
DES
816 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
817 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
818 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
819 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
b00052e4 820
e33d8cdb 821 if (scp1) {
383d01c6
DES
822 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
823 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
b00052e4
AZ
824 }
825
383d01c6 826 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
b00052e4
AZ
827}
828
829#define SPITZ_GPIO_HSYNC 22
830#define SPITZ_GPIO_SD_DETECT 9
831#define SPITZ_GPIO_SD_WP 81
832#define SPITZ_GPIO_ON_RESET 89
833#define SPITZ_GPIO_BAT_COVER 90
834#define SPITZ_GPIO_CF1_IRQ 105
835#define SPITZ_GPIO_CF1_CD 94
836#define SPITZ_GPIO_CF2_IRQ 106
837#define SPITZ_GPIO_CF2_CD 93
838
38641a52 839static int spitz_hsync;
b00052e4 840
38641a52 841static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
b00052e4 842{
bc24a225 843 PXA2xxState *cpu = (PXA2xxState *) opaque;
0bb53337 844 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
b00052e4
AZ
845 spitz_hsync ^= 1;
846}
847
14da5821
GR
848static void spitz_reset(void *opaque, int line, int level)
849{
850 if (level) {
cf83f140 851 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
14da5821
GR
852 }
853}
854
bc24a225 855static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
b00052e4 856{
38641a52 857 qemu_irq lcd_hsync;
14da5821
GR
858 qemu_irq reset;
859
b00052e4
AZ
860 /*
861 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
862 * read to satisfy broken guests that poll-wait for hsync.
863 * Simulating a real hsync event would be less practical and
864 * wouldn't guarantee that a guest ever exits the loop.
865 */
866 spitz_hsync = 0;
f3c7d038 867 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
38641a52
AZ
868 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
869 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
b00052e4
AZ
870
871 /* MMC/SD host */
02ce600c 872 pxa2xx_mmci_handlers(cpu->mmc,
0bb53337
DES
873 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
874 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
b00052e4
AZ
875
876 /* Battery lock always closed */
0bb53337 877 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
b00052e4
AZ
878
879 /* Handle reset */
14da5821
GR
880 reset = qemu_allocate_irq(spitz_reset, cpu, 0);
881 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
b00052e4
AZ
882
883 /* PCMCIA signals: card's IRQ and Card-Detect */
b00052e4 884 if (slots >= 1)
38641a52 885 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
0bb53337
DES
886 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
887 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
b00052e4 888 if (slots >= 2)
38641a52 889 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
0bb53337
DES
890 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
891 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
b00052e4
AZ
892}
893
b00052e4
AZ
894/* Board init. */
895enum spitz_model_e { spitz, akita, borzoi, terrier };
896
7fb4fdcf
AZ
897#define SPITZ_RAM 0x04000000
898#define SPITZ_ROM 0x00800000
899
f93eb9ff
AZ
900static struct arm_boot_info spitz_binfo = {
901 .loader_start = PXA2XX_SDRAM_BASE,
902 .ram_size = 0x04000000,
903};
904
3ef96221 905static void spitz_common_init(MachineState *machine,
72a9f5b7 906 enum spitz_model_e model, int arm_id)
b00052e4 907{
2e7ad760 908 PXA2xxState *mpu;
383d01c6 909 DeviceState *scp0, *scp1 = NULL;
a6dc4c2d 910 MemoryRegion *address_space_mem = get_system_memory();
7cc09e6c 911 MemoryRegion *rom = g_new(MemoryRegion, 1);
3ef96221 912 const char *cpu_model = machine->cpu_model;
b00052e4 913
4207117c
AZ
914 if (!cpu_model)
915 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
b00052e4 916
d95b2f8d 917 /* Setup CPU & memory */
2e7ad760 918 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
b00052e4 919
2e7ad760 920 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
b00052e4 921
98a99ce0 922 memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
7cc09e6c
AK
923 memory_region_set_readonly(rom, true);
924 memory_region_add_subregion(address_space_mem, 0, rom);
b00052e4
AZ
925
926 /* Setup peripherals */
2e7ad760 927 spitz_keyboard_register(mpu);
b00052e4 928
2e7ad760 929 spitz_ssp_attach(mpu);
b00052e4 930
383d01c6 931 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
e33d8cdb 932 if (model != akita) {
383d01c6 933 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
e33d8cdb 934 }
b00052e4 935
2e7ad760 936 spitz_scoop_gpio_setup(mpu, scp0, scp1);
b00052e4 937
2e7ad760 938 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
b00052e4 939
2e7ad760 940 spitz_i2c_setup(mpu);
adb86c37
AZ
941
942 if (model == akita)
2e7ad760 943 spitz_akita_i2c_setup(mpu);
adb86c37 944
b00052e4 945 if (model == terrier)
bf5ee248 946 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
2e7ad760 947 spitz_microdrive_attach(mpu, 1);
b00052e4 948 else if (model != akita)
15b18ec2 949 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
2e7ad760 950 spitz_microdrive_attach(mpu, 0);
b00052e4 951
3ef96221
MA
952 spitz_binfo.kernel_filename = machine->kernel_filename;
953 spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
954 spitz_binfo.initrd_filename = machine->initrd_filename;
f93eb9ff 955 spitz_binfo.board_id = arm_id;
3aaa8dfa 956 arm_load_kernel(mpu->cpu, &spitz_binfo);
f78630ab 957 sl_bootparam_write(SL_PXA_PARAM_BASE);
b00052e4
AZ
958}
959
3ef96221 960static void spitz_init(MachineState *machine)
b00052e4 961{
3ef96221 962 spitz_common_init(machine, spitz, 0x2c9);
b00052e4
AZ
963}
964
3ef96221 965static void borzoi_init(MachineState *machine)
b00052e4 966{
3ef96221 967 spitz_common_init(machine, borzoi, 0x33f);
b00052e4
AZ
968}
969
3ef96221 970static void akita_init(MachineState *machine)
b00052e4 971{
3ef96221 972 spitz_common_init(machine, akita, 0x2e8);
b00052e4
AZ
973}
974
3ef96221 975static void terrier_init(MachineState *machine)
b00052e4 976{
3ef96221 977 spitz_common_init(machine, terrier, 0x33f);
b00052e4
AZ
978}
979
8a661aea 980static void akitapda_class_init(ObjectClass *oc, void *data)
e264d29d 981{
8a661aea
AF
982 MachineClass *mc = MACHINE_CLASS(oc);
983
ad1e8db8 984 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
e264d29d 985 mc->init = akita_init;
4672cbd7 986 mc->ignore_memory_transaction_failures = true;
e264d29d 987}
b00052e4 988
8a661aea
AF
989static const TypeInfo akitapda_type = {
990 .name = MACHINE_TYPE_NAME("akita"),
991 .parent = TYPE_MACHINE,
992 .class_init = akitapda_class_init,
993};
b00052e4 994
8a661aea 995static void spitzpda_class_init(ObjectClass *oc, void *data)
e264d29d 996{
8a661aea
AF
997 MachineClass *mc = MACHINE_CLASS(oc);
998
ad1e8db8 999 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
e264d29d 1000 mc->init = spitz_init;
2059839b 1001 mc->block_default_type = IF_IDE;
4672cbd7 1002 mc->ignore_memory_transaction_failures = true;
e264d29d 1003}
b00052e4 1004
8a661aea
AF
1005static const TypeInfo spitzpda_type = {
1006 .name = MACHINE_TYPE_NAME("spitz"),
1007 .parent = TYPE_MACHINE,
1008 .class_init = spitzpda_class_init,
1009};
e264d29d 1010
8a661aea 1011static void borzoipda_class_init(ObjectClass *oc, void *data)
e264d29d 1012{
8a661aea
AF
1013 MachineClass *mc = MACHINE_CLASS(oc);
1014
ad1e8db8 1015 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
e264d29d 1016 mc->init = borzoi_init;
2059839b 1017 mc->block_default_type = IF_IDE;
4672cbd7 1018 mc->ignore_memory_transaction_failures = true;
e264d29d
EH
1019}
1020
8a661aea
AF
1021static const TypeInfo borzoipda_type = {
1022 .name = MACHINE_TYPE_NAME("borzoi"),
1023 .parent = TYPE_MACHINE,
1024 .class_init = borzoipda_class_init,
1025};
a984a69e 1026
8a661aea 1027static void terrierpda_class_init(ObjectClass *oc, void *data)
f80f9ec9 1028{
8a661aea
AF
1029 MachineClass *mc = MACHINE_CLASS(oc);
1030
ad1e8db8 1031 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
e264d29d 1032 mc->init = terrier_init;
2059839b 1033 mc->block_default_type = IF_IDE;
4672cbd7 1034 mc->ignore_memory_transaction_failures = true;
f80f9ec9
AL
1035}
1036
8a661aea
AF
1037static const TypeInfo terrierpda_type = {
1038 .name = MACHINE_TYPE_NAME("terrier"),
1039 .parent = TYPE_MACHINE,
1040 .class_init = terrierpda_class_init,
1041};
1042
1043static void spitz_machine_init(void)
1044{
1045 type_register_static(&akitapda_type);
1046 type_register_static(&spitzpda_type);
1047 type_register_static(&borzoipda_type);
1048 type_register_static(&terrierpda_type);
1049}
1050
0e6aac87 1051type_init(spitz_machine_init)
f80f9ec9 1052
7ef4227b
DES
1053static bool is_version_0(void *opaque, int version_id)
1054{
1055 return version_id == 0;
1056}
1057
34f9f0b5
DES
1058static VMStateDescription vmstate_sl_nand_info = {
1059 .name = "sl-nand",
1060 .version_id = 0,
1061 .minimum_version_id = 0,
8f1e884b 1062 .fields = (VMStateField[]) {
34f9f0b5
DES
1063 VMSTATE_UINT8(ctl, SLNANDState),
1064 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1065 VMSTATE_END_OF_LIST(),
1066 },
1067};
1068
999e12bb
AL
1069static Property sl_nand_properties[] = {
1070 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1071 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1072 DEFINE_PROP_END_OF_LIST(),
1073};
1074
1075static void sl_nand_class_init(ObjectClass *klass, void *data)
1076{
39bffca2 1077 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 1078
39bffca2
AL
1079 dc->vmsd = &vmstate_sl_nand_info;
1080 dc->props = sl_nand_properties;
9f9bdf43 1081 /* Reason: init() method uses drive_get() */
e90f2a8c 1082 dc->user_creatable = false;
999e12bb
AL
1083}
1084
8c43a6f0 1085static const TypeInfo sl_nand_info = {
7eb8104a 1086 .name = TYPE_SL_NAND,
39bffca2
AL
1087 .parent = TYPE_SYS_BUS_DEVICE,
1088 .instance_size = sizeof(SLNANDState),
f68575c9 1089 .instance_init = sl_nand_init,
39bffca2 1090 .class_init = sl_nand_class_init,
34f9f0b5
DES
1091};
1092
7ef4227b
DES
1093static VMStateDescription vmstate_spitz_kbd = {
1094 .name = "spitz-keyboard",
1095 .version_id = 1,
1096 .minimum_version_id = 0,
7ef4227b 1097 .post_load = spitz_keyboard_post_load,
8f1e884b 1098 .fields = (VMStateField[]) {
7ef4227b
DES
1099 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1100 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1101 VMSTATE_UNUSED_TEST(is_version_0, 5),
1102 VMSTATE_END_OF_LIST(),
1103 },
1104};
1105
999e12bb
AL
1106static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1107{
39bffca2 1108 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 1109
39bffca2 1110 dc->vmsd = &vmstate_spitz_kbd;
999e12bb
AL
1111}
1112
8c43a6f0 1113static const TypeInfo spitz_keyboard_info = {
73e9d965 1114 .name = TYPE_SPITZ_KEYBOARD,
39bffca2
AL
1115 .parent = TYPE_SYS_BUS_DEVICE,
1116 .instance_size = sizeof(SpitzKeyboardState),
f68575c9 1117 .instance_init = spitz_keyboard_init,
39bffca2 1118 .class_init = spitz_keyboard_class_init,
7ef4227b
DES
1119};
1120
43842120
DES
1121static const VMStateDescription vmstate_corgi_ssp_regs = {
1122 .name = "corgi-ssp",
66530953
PC
1123 .version_id = 2,
1124 .minimum_version_id = 2,
8f1e884b 1125 .fields = (VMStateField[]) {
66530953 1126 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
43842120
DES
1127 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1128 VMSTATE_END_OF_LIST(),
1129 }
1130};
1131
cd6c4cf2
AL
1132static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1133{
39bffca2 1134 DeviceClass *dc = DEVICE_CLASS(klass);
cd6c4cf2
AL
1135 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1136
7673bb4c 1137 k->realize = corgi_ssp_realize;
cd6c4cf2 1138 k->transfer = corgi_ssp_transfer;
39bffca2 1139 dc->vmsd = &vmstate_corgi_ssp_regs;
cd6c4cf2
AL
1140}
1141
8c43a6f0 1142static const TypeInfo corgi_ssp_info = {
39bffca2
AL
1143 .name = "corgi-ssp",
1144 .parent = TYPE_SSI_SLAVE,
1145 .instance_size = sizeof(CorgiSSPState),
1146 .class_init = corgi_ssp_class_init,
a984a69e
PB
1147};
1148
43842120
DES
1149static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1150 .name = "spitz-lcdtg",
1151 .version_id = 1,
1152 .minimum_version_id = 1,
8f1e884b 1153 .fields = (VMStateField[]) {
66530953 1154 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
43842120
DES
1155 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1156 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1157 VMSTATE_END_OF_LIST(),
1158 }
1159};
1160
cd6c4cf2
AL
1161static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1162{
39bffca2 1163 DeviceClass *dc = DEVICE_CLASS(klass);
cd6c4cf2
AL
1164 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1165
7673bb4c 1166 k->realize = spitz_lcdtg_realize;
cd6c4cf2 1167 k->transfer = spitz_lcdtg_transfer;
39bffca2 1168 dc->vmsd = &vmstate_spitz_lcdtg_regs;
cd6c4cf2
AL
1169}
1170
8c43a6f0 1171static const TypeInfo spitz_lcdtg_info = {
39bffca2
AL
1172 .name = "spitz-lcdtg",
1173 .parent = TYPE_SSI_SLAVE,
1174 .instance_size = sizeof(SpitzLCDTG),
1175 .class_init = spitz_lcdtg_class_init,
a984a69e
PB
1176};
1177
83f7d43a 1178static void spitz_register_types(void)
a984a69e 1179{
39bffca2
AL
1180 type_register_static(&corgi_ssp_info);
1181 type_register_static(&spitz_lcdtg_info);
1182 type_register_static(&spitz_keyboard_info);
1183 type_register_static(&sl_nand_info);
a984a69e
PB
1184}
1185
83f7d43a 1186type_init(spitz_register_types)