]>
Commit | Line | Data |
---|---|---|
b00052e4 AZ |
1 | /* |
2 | * PXA270-based Clamshell PDA platforms. | |
3 | * | |
4 | * Copyright (c) 2006 Openedhand Ltd. | |
5 | * Written by Andrzej Zaborowski <balrog@zabor.org> | |
6 | * | |
7 | * This code is licensed under the GNU GPL v2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
b00052e4 AZ |
11 | */ |
12 | ||
12b16722 | 13 | #include "qemu/osdep.h" |
da34e65c | 14 | #include "qapi/error.h" |
83c9f4ca | 15 | #include "hw/hw.h" |
0d09e41a | 16 | #include "hw/arm/pxa.h" |
12ec8bd5 | 17 | #include "hw/arm/boot.h" |
9c17d615 | 18 | #include "sysemu/sysemu.h" |
83c9f4ca | 19 | #include "hw/pcmcia.h" |
0d09e41a | 20 | #include "hw/i2c/i2c.h" |
64552b6b | 21 | #include "hw/irq.h" |
8fd06719 | 22 | #include "hw/ssi/ssi.h" |
0d09e41a | 23 | #include "hw/block/flash.h" |
1de7afc9 | 24 | #include "qemu/timer.h" |
0d09e41a | 25 | #include "hw/arm/sharpsl.h" |
28ecbaee | 26 | #include "ui/console.h" |
7ab14c5a | 27 | #include "hw/audio/wm8750.h" |
87ecb68b | 28 | #include "audio/audio.h" |
83c9f4ca | 29 | #include "hw/boards.h" |
83c9f4ca | 30 | #include "hw/sysbus.h" |
022c62cb | 31 | #include "exec/address-spaces.h" |
ba1ba5cc | 32 | #include "cpu.h" |
b00052e4 | 33 | |
b00052e4 AZ |
34 | #undef REG_FMT |
35 | #define REG_FMT "0x%02lx" | |
36 | ||
37 | /* Spitz Flash */ | |
38 | #define FLASH_BASE 0x0c000000 | |
39 | #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ | |
40 | #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ | |
41 | #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ | |
42 | #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ | |
43 | #define FLASH_ECCCLRR 0x10 /* Clear ECC */ | |
44 | #define FLASH_FLASHIO 0x14 /* Flash I/O */ | |
45 | #define FLASH_FLASHCTL 0x18 /* Flash Control */ | |
46 | ||
47 | #define FLASHCTL_CE0 (1 << 0) | |
48 | #define FLASHCTL_CLE (1 << 1) | |
49 | #define FLASHCTL_ALE (1 << 2) | |
50 | #define FLASHCTL_WP (1 << 3) | |
51 | #define FLASHCTL_CE1 (1 << 4) | |
52 | #define FLASHCTL_RYBY (1 << 5) | |
53 | #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) | |
54 | ||
7eb8104a AF |
55 | #define TYPE_SL_NAND "sl-nand" |
56 | #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) | |
57 | ||
bc24a225 | 58 | typedef struct { |
7eb8104a AF |
59 | SysBusDevice parent_obj; |
60 | ||
7cc09e6c | 61 | MemoryRegion iomem; |
d4220389 | 62 | DeviceState *nand; |
b00052e4 | 63 | uint8_t ctl; |
34f9f0b5 DES |
64 | uint8_t manf_id; |
65 | uint8_t chip_id; | |
bc24a225 PB |
66 | ECCState ecc; |
67 | } SLNANDState; | |
b00052e4 | 68 | |
a8170e5e | 69 | static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) |
b00052e4 | 70 | { |
bc24a225 | 71 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 | 72 | int ryby; |
b00052e4 AZ |
73 | |
74 | switch (addr) { | |
75 | #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) | |
76 | case FLASH_ECCLPLB: | |
77 | return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | | |
78 | BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); | |
79 | ||
80 | #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) | |
81 | case FLASH_ECCLPUB: | |
82 | return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | | |
83 | BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); | |
84 | ||
85 | case FLASH_ECCCP: | |
86 | return s->ecc.cp; | |
87 | ||
88 | case FLASH_ECCCNTR: | |
89 | return s->ecc.count & 0xff; | |
90 | ||
91 | case FLASH_FLASHCTL: | |
92 | nand_getpins(s->nand, &ryby); | |
93 | if (ryby) | |
94 | return s->ctl | FLASHCTL_RYBY; | |
95 | else | |
96 | return s->ctl; | |
97 | ||
98 | case FLASH_FLASHIO: | |
7cc09e6c AK |
99 | if (size == 4) { |
100 | return ecc_digest(&s->ecc, nand_getio(s->nand)) | | |
101 | (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); | |
102 | } | |
b00052e4 AZ |
103 | return ecc_digest(&s->ecc, nand_getio(s->nand)); |
104 | ||
105 | default: | |
a8b7063b | 106 | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
b00052e4 AZ |
107 | } |
108 | return 0; | |
109 | } | |
110 | ||
a8170e5e | 111 | static void sl_write(void *opaque, hwaddr addr, |
7cc09e6c | 112 | uint64_t value, unsigned size) |
b00052e4 | 113 | { |
bc24a225 | 114 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 AZ |
115 | |
116 | switch (addr) { | |
117 | case FLASH_ECCCLRR: | |
118 | /* Value is ignored. */ | |
119 | ecc_reset(&s->ecc); | |
120 | break; | |
121 | ||
122 | case FLASH_FLASHCTL: | |
123 | s->ctl = value & 0xff & ~FLASHCTL_RYBY; | |
124 | nand_setpins(s->nand, | |
125 | s->ctl & FLASHCTL_CLE, | |
126 | s->ctl & FLASHCTL_ALE, | |
127 | s->ctl & FLASHCTL_NCE, | |
128 | s->ctl & FLASHCTL_WP, | |
129 | 0); | |
130 | break; | |
131 | ||
132 | case FLASH_FLASHIO: | |
133 | nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); | |
134 | break; | |
135 | ||
136 | default: | |
a8b7063b | 137 | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
b00052e4 AZ |
138 | } |
139 | } | |
140 | ||
141 | enum { | |
142 | FLASH_128M, | |
143 | FLASH_1024M, | |
144 | }; | |
145 | ||
7cc09e6c AK |
146 | static const MemoryRegionOps sl_ops = { |
147 | .read = sl_read, | |
148 | .write = sl_write, | |
149 | .endianness = DEVICE_NATIVE_ENDIAN, | |
34f9f0b5 DES |
150 | }; |
151 | ||
bc24a225 | 152 | static void sl_flash_register(PXA2xxState *cpu, int size) |
b00052e4 | 153 | { |
34f9f0b5 DES |
154 | DeviceState *dev; |
155 | ||
7eb8104a | 156 | dev = qdev_create(NULL, TYPE_SL_NAND); |
34f9f0b5 DES |
157 | |
158 | qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); | |
159 | if (size == FLASH_128M) | |
160 | qdev_prop_set_uint8(dev, "chip_id", 0x73); | |
161 | else if (size == FLASH_1024M) | |
162 | qdev_prop_set_uint8(dev, "chip_id", 0xf1); | |
163 | ||
164 | qdev_init_nofail(dev); | |
1356b98d | 165 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); |
34f9f0b5 DES |
166 | } |
167 | ||
f68575c9 | 168 | static void sl_nand_init(Object *obj) |
7eb8104a | 169 | { |
f68575c9 XZ |
170 | SLNANDState *s = SL_NAND(obj); |
171 | SysBusDevice *dev = SYS_BUS_DEVICE(obj); | |
34f9f0b5 | 172 | |
b00052e4 | 173 | s->ctl = 0; |
07bc425e TH |
174 | |
175 | memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); | |
176 | sysbus_init_mmio(dev, &s->iomem); | |
177 | } | |
178 | ||
179 | static void sl_nand_realize(DeviceState *dev, Error **errp) | |
180 | { | |
181 | SLNANDState *s = SL_NAND(dev); | |
182 | DriveInfo *nand; | |
183 | ||
af9e40aa | 184 | /* FIXME use a qdev drive property instead of drive_get() */ |
522f253c | 185 | nand = drive_get(IF_MTD, 0, 0); |
4be74634 | 186 | s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, |
fa1d36df | 187 | s->manf_id, s->chip_id); |
b00052e4 AZ |
188 | } |
189 | ||
190 | /* Spitz Keyboard */ | |
191 | ||
192 | #define SPITZ_KEY_STROBE_NUM 11 | |
193 | #define SPITZ_KEY_SENSE_NUM 7 | |
194 | ||
195 | static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { | |
196 | 12, 17, 91, 34, 36, 38, 39 | |
197 | }; | |
198 | ||
199 | static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { | |
200 | 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 | |
201 | }; | |
202 | ||
203 | /* Eighth additional row maps the special keys */ | |
204 | static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { | |
205 | { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, | |
206 | { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, | |
207 | { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, | |
208 | { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, | |
209 | { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, | |
2b76bdc9 AZ |
210 | { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
211 | { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, | |
b00052e4 AZ |
212 | { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
213 | }; | |
214 | ||
215 | #define SPITZ_GPIO_AK_INT 13 /* Remote control */ | |
216 | #define SPITZ_GPIO_SYNC 16 /* Sync button */ | |
217 | #define SPITZ_GPIO_ON_KEY 95 /* Power button */ | |
218 | #define SPITZ_GPIO_SWA 97 /* Lid */ | |
219 | #define SPITZ_GPIO_SWB 96 /* Tablet mode */ | |
220 | ||
221 | /* The special buttons are mapped to unused keys */ | |
222 | static const int spitz_gpiomap[5] = { | |
223 | SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, | |
224 | SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, | |
225 | }; | |
b00052e4 | 226 | |
73e9d965 AF |
227 | #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" |
228 | #define SPITZ_KEYBOARD(obj) \ | |
229 | OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) | |
230 | ||
bc24a225 | 231 | typedef struct { |
73e9d965 AF |
232 | SysBusDevice parent_obj; |
233 | ||
38641a52 | 234 | qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
38641a52 | 235 | qemu_irq gpiomap[5]; |
b00052e4 AZ |
236 | int keymap[0x80]; |
237 | uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; | |
238 | uint16_t strobe_state; | |
239 | uint16_t sense_state; | |
240 | ||
241 | uint16_t pre_map[0x100]; | |
242 | uint16_t modifiers; | |
243 | uint16_t imodifiers; | |
244 | uint8_t fifo[16]; | |
245 | int fifopos, fifolen; | |
246 | QEMUTimer *kbdtimer; | |
bc24a225 | 247 | } SpitzKeyboardState; |
b00052e4 | 248 | |
bc24a225 | 249 | static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
b00052e4 AZ |
250 | { |
251 | int i; | |
252 | uint16_t strobe, sense = 0; | |
253 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { | |
254 | strobe = s->keyrow[i] & s->strobe_state; | |
255 | if (strobe) { | |
256 | sense |= 1 << i; | |
257 | if (!(s->sense_state & (1 << i))) | |
38641a52 | 258 | qemu_irq_raise(s->sense[i]); |
b00052e4 | 259 | } else if (s->sense_state & (1 << i)) |
38641a52 | 260 | qemu_irq_lower(s->sense[i]); |
b00052e4 AZ |
261 | } |
262 | ||
263 | s->sense_state = sense; | |
264 | } | |
265 | ||
38641a52 | 266 | static void spitz_keyboard_strobe(void *opaque, int line, int level) |
b00052e4 | 267 | { |
bc24a225 | 268 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
38641a52 AZ |
269 | |
270 | if (level) | |
271 | s->strobe_state |= 1 << line; | |
272 | else | |
273 | s->strobe_state &= ~(1 << line); | |
274 | spitz_keyboard_sense_update(s); | |
b00052e4 AZ |
275 | } |
276 | ||
bc24a225 | 277 | static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
b00052e4 AZ |
278 | { |
279 | int spitz_keycode = s->keymap[keycode & 0x7f]; | |
280 | if (spitz_keycode == -1) | |
281 | return; | |
282 | ||
283 | /* Handle the additional keys */ | |
284 | if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { | |
7ef4227b | 285 | qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); |
b00052e4 AZ |
286 | return; |
287 | } | |
288 | ||
289 | if (keycode & 0x80) | |
290 | s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); | |
291 | else | |
292 | s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); | |
293 | ||
294 | spitz_keyboard_sense_update(s); | |
295 | } | |
296 | ||
0062609f PM |
297 | #define SPITZ_MOD_SHIFT (1 << 7) |
298 | #define SPITZ_MOD_CTRL (1 << 8) | |
299 | #define SPITZ_MOD_FN (1 << 9) | |
b00052e4 AZ |
300 | |
301 | #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c | |
302 | ||
7ef4227b | 303 | static void spitz_keyboard_handler(void *opaque, int keycode) |
b00052e4 | 304 | { |
7ef4227b | 305 | SpitzKeyboardState *s = opaque; |
b00052e4 AZ |
306 | uint16_t code; |
307 | int mapcode; | |
308 | switch (keycode) { | |
309 | case 0x2a: /* Left Shift */ | |
310 | s->modifiers |= 1; | |
311 | break; | |
312 | case 0xaa: | |
313 | s->modifiers &= ~1; | |
314 | break; | |
315 | case 0x36: /* Right Shift */ | |
316 | s->modifiers |= 2; | |
317 | break; | |
318 | case 0xb6: | |
319 | s->modifiers &= ~2; | |
320 | break; | |
321 | case 0x1d: /* Control */ | |
322 | s->modifiers |= 4; | |
323 | break; | |
324 | case 0x9d: | |
325 | s->modifiers &= ~4; | |
326 | break; | |
327 | case 0x38: /* Alt */ | |
328 | s->modifiers |= 8; | |
329 | break; | |
330 | case 0xb8: | |
331 | s->modifiers &= ~8; | |
332 | break; | |
333 | } | |
334 | ||
335 | code = s->pre_map[mapcode = ((s->modifiers & 3) ? | |
0062609f PM |
336 | (keycode | SPITZ_MOD_SHIFT) : |
337 | (keycode & ~SPITZ_MOD_SHIFT))]; | |
b00052e4 AZ |
338 | |
339 | if (code != mapcode) { | |
340 | #if 0 | |
0062609f | 341 | if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { |
b00052e4 | 342 | QUEUE_KEY(0x2a | (keycode & 0x80)); |
0062609f PM |
343 | } |
344 | if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { | |
b00052e4 | 345 | QUEUE_KEY(0x1d | (keycode & 0x80)); |
0062609f PM |
346 | } |
347 | if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { | |
b00052e4 | 348 | QUEUE_KEY(0x38 | (keycode & 0x80)); |
0062609f PM |
349 | } |
350 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { | |
b00052e4 | 351 | QUEUE_KEY(0x2a | (~keycode & 0x80)); |
0062609f PM |
352 | } |
353 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { | |
b00052e4 | 354 | QUEUE_KEY(0x36 | (~keycode & 0x80)); |
0062609f | 355 | } |
b00052e4 AZ |
356 | #else |
357 | if (keycode & 0x80) { | |
358 | if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) | |
359 | QUEUE_KEY(0x2a | 0x80); | |
360 | if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) | |
361 | QUEUE_KEY(0x1d | 0x80); | |
362 | if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) | |
363 | QUEUE_KEY(0x38 | 0x80); | |
364 | if ((s->imodifiers & 0x10) && (s->modifiers & 1)) | |
365 | QUEUE_KEY(0x2a); | |
366 | if ((s->imodifiers & 0x20) && (s->modifiers & 2)) | |
367 | QUEUE_KEY(0x36); | |
368 | s->imodifiers = 0; | |
369 | } else { | |
0062609f PM |
370 | if ((code & SPITZ_MOD_SHIFT) && |
371 | !((s->modifiers | s->imodifiers) & 1)) { | |
b00052e4 AZ |
372 | QUEUE_KEY(0x2a); |
373 | s->imodifiers |= 1; | |
374 | } | |
0062609f PM |
375 | if ((code & SPITZ_MOD_CTRL) && |
376 | !((s->modifiers | s->imodifiers) & 4)) { | |
b00052e4 AZ |
377 | QUEUE_KEY(0x1d); |
378 | s->imodifiers |= 4; | |
379 | } | |
0062609f PM |
380 | if ((code & SPITZ_MOD_FN) && |
381 | !((s->modifiers | s->imodifiers) & 8)) { | |
b00052e4 AZ |
382 | QUEUE_KEY(0x38); |
383 | s->imodifiers |= 8; | |
384 | } | |
0062609f | 385 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && |
b00052e4 AZ |
386 | !(s->imodifiers & 0x10)) { |
387 | QUEUE_KEY(0x2a | 0x80); | |
388 | s->imodifiers |= 0x10; | |
389 | } | |
0062609f | 390 | if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && |
b00052e4 AZ |
391 | !(s->imodifiers & 0x20)) { |
392 | QUEUE_KEY(0x36 | 0x80); | |
393 | s->imodifiers |= 0x20; | |
394 | } | |
395 | } | |
396 | #endif | |
397 | } | |
398 | ||
399 | QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); | |
400 | } | |
401 | ||
402 | static void spitz_keyboard_tick(void *opaque) | |
403 | { | |
bc24a225 | 404 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
b00052e4 AZ |
405 | |
406 | if (s->fifolen) { | |
407 | spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); | |
408 | s->fifolen --; | |
409 | if (s->fifopos >= 16) | |
410 | s->fifopos = 0; | |
411 | } | |
412 | ||
bc72ad67 | 413 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + |
73bcb24d | 414 | NANOSECONDS_PER_SECOND / 32); |
b00052e4 AZ |
415 | } |
416 | ||
bc24a225 | 417 | static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
b00052e4 AZ |
418 | { |
419 | int i; | |
420 | for (i = 0; i < 0x100; i ++) | |
421 | s->pre_map[i] = i; | |
0062609f PM |
422 | s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ |
423 | s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ | |
424 | s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ | |
425 | s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ | |
426 | s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ | |
427 | s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ | |
428 | s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ | |
429 | s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ | |
430 | s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ | |
431 | s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ | |
432 | s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ | |
433 | s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ | |
434 | s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ | |
435 | s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ | |
436 | s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ | |
437 | s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ | |
438 | s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ | |
439 | s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ | |
440 | s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ | |
441 | s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ | |
442 | s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ | |
443 | s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ | |
444 | s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ | |
445 | s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ | |
446 | s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ | |
447 | s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ | |
448 | s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ | |
449 | s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ | |
450 | s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ | |
451 | s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ | |
452 | s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ | |
453 | s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ | |
b00052e4 AZ |
454 | |
455 | s->modifiers = 0; | |
456 | s->imodifiers = 0; | |
457 | s->fifopos = 0; | |
458 | s->fifolen = 0; | |
b00052e4 AZ |
459 | } |
460 | ||
0062609f PM |
461 | #undef SPITZ_MOD_SHIFT |
462 | #undef SPITZ_MOD_CTRL | |
463 | #undef SPITZ_MOD_FN | |
b00052e4 | 464 | |
7ef4227b | 465 | static int spitz_keyboard_post_load(void *opaque, int version_id) |
aa941b94 | 466 | { |
bc24a225 | 467 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
aa941b94 AZ |
468 | |
469 | /* Release all pressed keys */ | |
470 | memset(s->keyrow, 0, sizeof(s->keyrow)); | |
471 | spitz_keyboard_sense_update(s); | |
472 | s->modifiers = 0; | |
473 | s->imodifiers = 0; | |
474 | s->fifopos = 0; | |
475 | s->fifolen = 0; | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
bc24a225 | 480 | static void spitz_keyboard_register(PXA2xxState *cpu) |
b00052e4 | 481 | { |
7ef4227b DES |
482 | int i; |
483 | DeviceState *dev; | |
bc24a225 | 484 | SpitzKeyboardState *s; |
b00052e4 | 485 | |
73e9d965 AF |
486 | dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); |
487 | s = SPITZ_KEYBOARD(dev); | |
b00052e4 | 488 | |
38641a52 | 489 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
0bb53337 | 490 | qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); |
38641a52 AZ |
491 | |
492 | for (i = 0; i < 5; i ++) | |
0bb53337 | 493 | s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); |
38641a52 | 494 | |
7ef4227b DES |
495 | if (!graphic_rotate) |
496 | s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); | |
497 | ||
498 | for (i = 0; i < 5; i++) | |
499 | qemu_set_irq(s->gpiomap[i], 0); | |
500 | ||
b00052e4 | 501 | for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
0bb53337 | 502 | qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], |
7ef4227b DES |
503 | qdev_get_gpio_in(dev, i)); |
504 | ||
bc72ad67 | 505 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); |
7ef4227b DES |
506 | |
507 | qemu_add_kbd_event_handler(spitz_keyboard_handler, s); | |
508 | } | |
509 | ||
f68575c9 | 510 | static void spitz_keyboard_init(Object *obj) |
7ef4227b | 511 | { |
f68575c9 XZ |
512 | DeviceState *dev = DEVICE(obj); |
513 | SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); | |
7ef4227b DES |
514 | int i, j; |
515 | ||
7ef4227b DES |
516 | for (i = 0; i < 0x80; i ++) |
517 | s->keymap[i] = -1; | |
518 | for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) | |
519 | for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) | |
520 | if (spitz_keymap[i][j] != -1) | |
521 | s->keymap[spitz_keymap[i][j]] = (i << 4) | j; | |
b00052e4 AZ |
522 | |
523 | spitz_keyboard_pre_map(s); | |
aa941b94 | 524 | |
bc72ad67 | 525 | s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); |
73e9d965 AF |
526 | qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); |
527 | qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); | |
b00052e4 AZ |
528 | } |
529 | ||
b00052e4 AZ |
530 | /* LCD backlight controller */ |
531 | ||
532 | #define LCDTG_RESCTL 0x00 | |
533 | #define LCDTG_PHACTRL 0x01 | |
534 | #define LCDTG_DUTYCTRL 0x02 | |
535 | #define LCDTG_POWERREG0 0x03 | |
536 | #define LCDTG_POWERREG1 0x04 | |
537 | #define LCDTG_GPOR3 0x05 | |
538 | #define LCDTG_PICTRL 0x06 | |
539 | #define LCDTG_POLCTRL 0x07 | |
540 | ||
a984a69e PB |
541 | typedef struct { |
542 | SSISlave ssidev; | |
43842120 DES |
543 | uint32_t bl_intensity; |
544 | uint32_t bl_power; | |
a984a69e | 545 | } SpitzLCDTG; |
b00052e4 | 546 | |
a984a69e | 547 | static void spitz_bl_update(SpitzLCDTG *s) |
b00052e4 | 548 | { |
a984a69e PB |
549 | if (s->bl_power && s->bl_intensity) |
550 | zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); | |
b00052e4 | 551 | else |
89cdb6af | 552 | zaurus_printf("LCD Backlight now off\n"); |
b00052e4 AZ |
553 | } |
554 | ||
a984a69e PB |
555 | /* FIXME: Implement GPIO properly and remove this hack. */ |
556 | static SpitzLCDTG *spitz_lcdtg; | |
557 | ||
38641a52 | 558 | static inline void spitz_bl_bit5(void *opaque, int line, int level) |
b00052e4 | 559 | { |
a984a69e PB |
560 | SpitzLCDTG *s = spitz_lcdtg; |
561 | int prev = s->bl_intensity; | |
b00052e4 AZ |
562 | |
563 | if (level) | |
a984a69e | 564 | s->bl_intensity &= ~0x20; |
b00052e4 | 565 | else |
a984a69e | 566 | s->bl_intensity |= 0x20; |
b00052e4 | 567 | |
a984a69e PB |
568 | if (s->bl_power && prev != s->bl_intensity) |
569 | spitz_bl_update(s); | |
b00052e4 AZ |
570 | } |
571 | ||
38641a52 | 572 | static inline void spitz_bl_power(void *opaque, int line, int level) |
b00052e4 | 573 | { |
a984a69e PB |
574 | SpitzLCDTG *s = spitz_lcdtg; |
575 | s->bl_power = !!level; | |
576 | spitz_bl_update(s); | |
b00052e4 AZ |
577 | } |
578 | ||
a984a69e | 579 | static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) |
b00052e4 | 580 | { |
a984a69e PB |
581 | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
582 | int addr; | |
583 | addr = value >> 5; | |
584 | value &= 0x1f; | |
b00052e4 AZ |
585 | |
586 | switch (addr) { | |
587 | case LCDTG_RESCTL: | |
588 | if (value) | |
89cdb6af | 589 | zaurus_printf("LCD in QVGA mode\n"); |
b00052e4 | 590 | else |
89cdb6af | 591 | zaurus_printf("LCD in VGA mode\n"); |
b00052e4 AZ |
592 | break; |
593 | ||
594 | case LCDTG_DUTYCTRL: | |
a984a69e PB |
595 | s->bl_intensity &= ~0x1f; |
596 | s->bl_intensity |= value; | |
597 | if (s->bl_power) | |
598 | spitz_bl_update(s); | |
b00052e4 AZ |
599 | break; |
600 | ||
601 | case LCDTG_POWERREG0: | |
602 | /* Set common voltage to M62332FP */ | |
603 | break; | |
604 | } | |
a984a69e PB |
605 | return 0; |
606 | } | |
607 | ||
7673bb4c | 608 | static void spitz_lcdtg_realize(SSISlave *dev, Error **errp) |
a984a69e PB |
609 | { |
610 | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); | |
611 | ||
612 | spitz_lcdtg = s; | |
613 | s->bl_power = 0; | |
614 | s->bl_intensity = 0x20; | |
b00052e4 AZ |
615 | } |
616 | ||
617 | /* SSP devices */ | |
618 | ||
619 | #define CORGI_SSP_PORT 2 | |
620 | ||
621 | #define SPITZ_GPIO_LCDCON_CS 53 | |
622 | #define SPITZ_GPIO_ADS7846_CS 14 | |
623 | #define SPITZ_GPIO_MAX1111_CS 20 | |
624 | #define SPITZ_GPIO_TP_INT 11 | |
625 | ||
a984a69e | 626 | static DeviceState *max1111; |
b00052e4 AZ |
627 | |
628 | /* "Demux" the signal based on current chipselect */ | |
a984a69e PB |
629 | typedef struct { |
630 | SSISlave ssidev; | |
631 | SSIBus *bus[3]; | |
43842120 | 632 | uint32_t enable[3]; |
a984a69e | 633 | } CorgiSSPState; |
b00052e4 | 634 | |
a984a69e | 635 | static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) |
b00052e4 | 636 | { |
a984a69e PB |
637 | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
638 | int i; | |
639 | ||
640 | for (i = 0; i < 3; i++) { | |
641 | if (s->enable[i]) { | |
642 | return ssi_transfer(s->bus[i], value); | |
643 | } | |
644 | } | |
645 | return 0; | |
b00052e4 AZ |
646 | } |
647 | ||
38641a52 | 648 | static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
b00052e4 | 649 | { |
a984a69e PB |
650 | CorgiSSPState *s = (CorgiSSPState *)opaque; |
651 | assert(line >= 0 && line < 3); | |
652 | s->enable[line] = !level; | |
b00052e4 AZ |
653 | } |
654 | ||
655 | #define MAX1111_BATT_VOLT 1 | |
656 | #define MAX1111_BATT_TEMP 2 | |
657 | #define MAX1111_ACIN_VOLT 3 | |
658 | ||
659 | #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ | |
660 | #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ | |
661 | #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ | |
662 | ||
38641a52 | 663 | static void spitz_adc_temp_on(void *opaque, int line, int level) |
b00052e4 AZ |
664 | { |
665 | if (!max1111) | |
666 | return; | |
667 | ||
668 | if (level) | |
669 | max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); | |
670 | else | |
671 | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); | |
672 | } | |
673 | ||
7673bb4c | 674 | static void corgi_ssp_realize(SSISlave *d, Error **errp) |
a984a69e | 675 | { |
1a7d9ee6 PC |
676 | DeviceState *dev = DEVICE(d); |
677 | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d); | |
a984a69e | 678 | |
1a7d9ee6 PC |
679 | qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); |
680 | s->bus[0] = ssi_create_bus(dev, "ssi0"); | |
681 | s->bus[1] = ssi_create_bus(dev, "ssi1"); | |
682 | s->bus[2] = ssi_create_bus(dev, "ssi2"); | |
a984a69e PB |
683 | } |
684 | ||
bc24a225 | 685 | static void spitz_ssp_attach(PXA2xxState *cpu) |
b00052e4 | 686 | { |
a984a69e PB |
687 | DeviceState *mux; |
688 | DeviceState *dev; | |
689 | void *bus; | |
690 | ||
691 | mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); | |
38641a52 | 692 | |
a984a69e | 693 | bus = qdev_get_child_bus(mux, "ssi0"); |
22ed1d34 | 694 | ssi_create_slave(bus, "spitz-lcdtg"); |
b00052e4 | 695 | |
a984a69e PB |
696 | bus = qdev_get_child_bus(mux, "ssi1"); |
697 | dev = ssi_create_slave(bus, "ads7846"); | |
698 | qdev_connect_gpio_out(dev, 0, | |
0bb53337 | 699 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT)); |
b00052e4 | 700 | |
a984a69e PB |
701 | bus = qdev_get_child_bus(mux, "ssi2"); |
702 | max1111 = ssi_create_slave(bus, "max1111"); | |
b00052e4 AZ |
703 | max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); |
704 | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); | |
705 | max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); | |
706 | ||
0bb53337 | 707 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS, |
a984a69e | 708 | qdev_get_gpio_in(mux, 0)); |
0bb53337 | 709 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS, |
a984a69e | 710 | qdev_get_gpio_in(mux, 1)); |
0bb53337 | 711 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS, |
a984a69e | 712 | qdev_get_gpio_in(mux, 2)); |
b00052e4 AZ |
713 | } |
714 | ||
715 | /* CF Microdrive */ | |
716 | ||
bc24a225 | 717 | static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
b00052e4 | 718 | { |
bc24a225 | 719 | PCMCIACardState *md; |
751c6a17 | 720 | DriveInfo *dinfo; |
b00052e4 | 721 | |
751c6a17 | 722 | dinfo = drive_get(IF_IDE, 0, 0); |
124386cc | 723 | if (!dinfo || dinfo->media_cd) |
e4bcb14c | 724 | return; |
124386cc MA |
725 | md = dscm1xxxx_init(dinfo); |
726 | pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); | |
b00052e4 AZ |
727 | } |
728 | ||
adb86c37 AZ |
729 | /* Wm8750 and Max7310 on I2C */ |
730 | ||
731 | #define AKITA_MAX_ADDR 0x18 | |
611d7189 AZ |
732 | #define SPITZ_WM_ADDRL 0x1b |
733 | #define SPITZ_WM_ADDRH 0x1a | |
adb86c37 AZ |
734 | |
735 | #define SPITZ_GPIO_WM 5 | |
736 | ||
38641a52 | 737 | static void spitz_wm8750_addr(void *opaque, int line, int level) |
adb86c37 | 738 | { |
9e07bdf8 | 739 | I2CSlave *wm = (I2CSlave *) opaque; |
adb86c37 AZ |
740 | if (level) |
741 | i2c_set_slave_address(wm, SPITZ_WM_ADDRH); | |
742 | else | |
743 | i2c_set_slave_address(wm, SPITZ_WM_ADDRL); | |
744 | } | |
adb86c37 | 745 | |
bc24a225 | 746 | static void spitz_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
747 | { |
748 | /* Attach the CPU on one end of our I2C bus. */ | |
a5c82852 | 749 | I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); |
adb86c37 | 750 | |
cdbe40ca | 751 | DeviceState *wm; |
adb86c37 | 752 | |
adb86c37 | 753 | /* Attach a WM8750 to the bus */ |
7ab14c5a | 754 | wm = i2c_create_slave(bus, TYPE_WM8750, 0); |
adb86c37 | 755 | |
38641a52 | 756 | spitz_wm8750_addr(wm, 0, 0); |
0bb53337 | 757 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, |
f3c7d038 | 758 | qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); |
adb86c37 AZ |
759 | /* .. and to the sound interface. */ |
760 | cpu->i2s->opaque = wm; | |
761 | cpu->i2s->codec_out = wm8750_dac_dat; | |
762 | cpu->i2s->codec_in = wm8750_adc_dat; | |
763 | wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); | |
adb86c37 AZ |
764 | } |
765 | ||
bc24a225 | 766 | static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
767 | { |
768 | /* Attach a Max7310 to Akita I2C bus. */ | |
6c0bd6bd PB |
769 | i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
770 | AKITA_MAX_ADDR); | |
adb86c37 AZ |
771 | } |
772 | ||
b00052e4 AZ |
773 | /* Other peripherals */ |
774 | ||
38641a52 | 775 | static void spitz_out_switch(void *opaque, int line, int level) |
b00052e4 | 776 | { |
38641a52 AZ |
777 | switch (line) { |
778 | case 0: | |
89cdb6af | 779 | zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
38641a52 AZ |
780 | break; |
781 | case 1: | |
89cdb6af | 782 | zaurus_printf("Discharging %s.\n", level ? "on" : "off"); |
38641a52 AZ |
783 | break; |
784 | case 2: | |
89cdb6af | 785 | zaurus_printf("Green LED %s.\n", level ? "on" : "off"); |
38641a52 AZ |
786 | break; |
787 | case 3: | |
89cdb6af | 788 | zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); |
38641a52 AZ |
789 | break; |
790 | case 4: | |
791 | spitz_bl_bit5(opaque, line, level); | |
792 | break; | |
793 | case 5: | |
794 | spitz_bl_power(opaque, line, level); | |
795 | break; | |
796 | case 6: | |
797 | spitz_adc_temp_on(opaque, line, level); | |
798 | break; | |
799 | } | |
b00052e4 AZ |
800 | } |
801 | ||
802 | #define SPITZ_SCP_LED_GREEN 1 | |
803 | #define SPITZ_SCP_JK_B 2 | |
804 | #define SPITZ_SCP_CHRG_ON 3 | |
805 | #define SPITZ_SCP_MUTE_L 4 | |
806 | #define SPITZ_SCP_MUTE_R 5 | |
807 | #define SPITZ_SCP_CF_POWER 6 | |
808 | #define SPITZ_SCP_LED_ORANGE 7 | |
809 | #define SPITZ_SCP_JK_A 8 | |
810 | #define SPITZ_SCP_ADC_TEMP_ON 9 | |
811 | #define SPITZ_SCP2_IR_ON 1 | |
812 | #define SPITZ_SCP2_AKIN_PULLUP 2 | |
813 | #define SPITZ_SCP2_BACKLIGHT_CONT 7 | |
814 | #define SPITZ_SCP2_BACKLIGHT_ON 8 | |
815 | #define SPITZ_SCP2_MIC_BIAS 9 | |
816 | ||
bc24a225 | 817 | static void spitz_scoop_gpio_setup(PXA2xxState *cpu, |
383d01c6 | 818 | DeviceState *scp0, DeviceState *scp1) |
b00052e4 | 819 | { |
38641a52 AZ |
820 | qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8); |
821 | ||
383d01c6 DES |
822 | qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]); |
823 | qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]); | |
824 | qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]); | |
825 | qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]); | |
b00052e4 | 826 | |
e33d8cdb | 827 | if (scp1) { |
383d01c6 DES |
828 | qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]); |
829 | qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]); | |
b00052e4 AZ |
830 | } |
831 | ||
383d01c6 | 832 | qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]); |
b00052e4 AZ |
833 | } |
834 | ||
835 | #define SPITZ_GPIO_HSYNC 22 | |
836 | #define SPITZ_GPIO_SD_DETECT 9 | |
837 | #define SPITZ_GPIO_SD_WP 81 | |
838 | #define SPITZ_GPIO_ON_RESET 89 | |
839 | #define SPITZ_GPIO_BAT_COVER 90 | |
840 | #define SPITZ_GPIO_CF1_IRQ 105 | |
841 | #define SPITZ_GPIO_CF1_CD 94 | |
842 | #define SPITZ_GPIO_CF2_IRQ 106 | |
843 | #define SPITZ_GPIO_CF2_CD 93 | |
844 | ||
38641a52 | 845 | static int spitz_hsync; |
b00052e4 | 846 | |
38641a52 | 847 | static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
b00052e4 | 848 | { |
bc24a225 | 849 | PXA2xxState *cpu = (PXA2xxState *) opaque; |
0bb53337 | 850 | qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); |
b00052e4 AZ |
851 | spitz_hsync ^= 1; |
852 | } | |
853 | ||
14da5821 GR |
854 | static void spitz_reset(void *opaque, int line, int level) |
855 | { | |
856 | if (level) { | |
cf83f140 | 857 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
14da5821 GR |
858 | } |
859 | } | |
860 | ||
bc24a225 | 861 | static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
b00052e4 | 862 | { |
38641a52 | 863 | qemu_irq lcd_hsync; |
14da5821 GR |
864 | qemu_irq reset; |
865 | ||
b00052e4 AZ |
866 | /* |
867 | * Bad hack: We toggle the LCD hsync GPIO on every GPIO status | |
868 | * read to satisfy broken guests that poll-wait for hsync. | |
869 | * Simulating a real hsync event would be less practical and | |
870 | * wouldn't guarantee that a guest ever exits the loop. | |
871 | */ | |
872 | spitz_hsync = 0; | |
f3c7d038 | 873 | lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); |
38641a52 AZ |
874 | pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); |
875 | pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); | |
b00052e4 AZ |
876 | |
877 | /* MMC/SD host */ | |
02ce600c | 878 | pxa2xx_mmci_handlers(cpu->mmc, |
0bb53337 DES |
879 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), |
880 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); | |
b00052e4 AZ |
881 | |
882 | /* Battery lock always closed */ | |
0bb53337 | 883 | qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); |
b00052e4 AZ |
884 | |
885 | /* Handle reset */ | |
14da5821 GR |
886 | reset = qemu_allocate_irq(spitz_reset, cpu, 0); |
887 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); | |
b00052e4 AZ |
888 | |
889 | /* PCMCIA signals: card's IRQ and Card-Detect */ | |
b00052e4 | 890 | if (slots >= 1) |
38641a52 | 891 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], |
0bb53337 DES |
892 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), |
893 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); | |
b00052e4 | 894 | if (slots >= 2) |
38641a52 | 895 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], |
0bb53337 DES |
896 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), |
897 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); | |
b00052e4 AZ |
898 | } |
899 | ||
b00052e4 AZ |
900 | /* Board init. */ |
901 | enum spitz_model_e { spitz, akita, borzoi, terrier }; | |
902 | ||
7fb4fdcf AZ |
903 | #define SPITZ_RAM 0x04000000 |
904 | #define SPITZ_ROM 0x00800000 | |
905 | ||
f93eb9ff AZ |
906 | static struct arm_boot_info spitz_binfo = { |
907 | .loader_start = PXA2XX_SDRAM_BASE, | |
908 | .ram_size = 0x04000000, | |
909 | }; | |
910 | ||
3ef96221 | 911 | static void spitz_common_init(MachineState *machine, |
72a9f5b7 | 912 | enum spitz_model_e model, int arm_id) |
b00052e4 | 913 | { |
2e7ad760 | 914 | PXA2xxState *mpu; |
383d01c6 | 915 | DeviceState *scp0, *scp1 = NULL; |
a6dc4c2d | 916 | MemoryRegion *address_space_mem = get_system_memory(); |
7cc09e6c | 917 | MemoryRegion *rom = g_new(MemoryRegion, 1); |
b00052e4 | 918 | |
d95b2f8d | 919 | /* Setup CPU & memory */ |
ba1ba5cc IM |
920 | mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, |
921 | machine->cpu_type); | |
b00052e4 | 922 | |
2e7ad760 | 923 | sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
b00052e4 | 924 | |
98a99ce0 | 925 | memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); |
7cc09e6c AK |
926 | memory_region_set_readonly(rom, true); |
927 | memory_region_add_subregion(address_space_mem, 0, rom); | |
b00052e4 AZ |
928 | |
929 | /* Setup peripherals */ | |
2e7ad760 | 930 | spitz_keyboard_register(mpu); |
b00052e4 | 931 | |
2e7ad760 | 932 | spitz_ssp_attach(mpu); |
b00052e4 | 933 | |
383d01c6 | 934 | scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); |
e33d8cdb | 935 | if (model != akita) { |
383d01c6 | 936 | scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); |
e33d8cdb | 937 | } |
b00052e4 | 938 | |
2e7ad760 | 939 | spitz_scoop_gpio_setup(mpu, scp0, scp1); |
b00052e4 | 940 | |
2e7ad760 | 941 | spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); |
b00052e4 | 942 | |
2e7ad760 | 943 | spitz_i2c_setup(mpu); |
adb86c37 AZ |
944 | |
945 | if (model == akita) | |
2e7ad760 | 946 | spitz_akita_i2c_setup(mpu); |
adb86c37 | 947 | |
b00052e4 | 948 | if (model == terrier) |
bf5ee248 | 949 | /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ |
2e7ad760 | 950 | spitz_microdrive_attach(mpu, 1); |
b00052e4 | 951 | else if (model != akita) |
15b18ec2 | 952 | /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ |
2e7ad760 | 953 | spitz_microdrive_attach(mpu, 0); |
b00052e4 | 954 | |
3ef96221 MA |
955 | spitz_binfo.kernel_filename = machine->kernel_filename; |
956 | spitz_binfo.kernel_cmdline = machine->kernel_cmdline; | |
957 | spitz_binfo.initrd_filename = machine->initrd_filename; | |
f93eb9ff | 958 | spitz_binfo.board_id = arm_id; |
3aaa8dfa | 959 | arm_load_kernel(mpu->cpu, &spitz_binfo); |
f78630ab | 960 | sl_bootparam_write(SL_PXA_PARAM_BASE); |
b00052e4 AZ |
961 | } |
962 | ||
3ef96221 | 963 | static void spitz_init(MachineState *machine) |
b00052e4 | 964 | { |
3ef96221 | 965 | spitz_common_init(machine, spitz, 0x2c9); |
b00052e4 AZ |
966 | } |
967 | ||
3ef96221 | 968 | static void borzoi_init(MachineState *machine) |
b00052e4 | 969 | { |
3ef96221 | 970 | spitz_common_init(machine, borzoi, 0x33f); |
b00052e4 AZ |
971 | } |
972 | ||
3ef96221 | 973 | static void akita_init(MachineState *machine) |
b00052e4 | 974 | { |
3ef96221 | 975 | spitz_common_init(machine, akita, 0x2e8); |
b00052e4 AZ |
976 | } |
977 | ||
3ef96221 | 978 | static void terrier_init(MachineState *machine) |
b00052e4 | 979 | { |
3ef96221 | 980 | spitz_common_init(machine, terrier, 0x33f); |
b00052e4 AZ |
981 | } |
982 | ||
8a661aea | 983 | static void akitapda_class_init(ObjectClass *oc, void *data) |
e264d29d | 984 | { |
8a661aea AF |
985 | MachineClass *mc = MACHINE_CLASS(oc); |
986 | ||
ad1e8db8 | 987 | mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; |
e264d29d | 988 | mc->init = akita_init; |
4672cbd7 | 989 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 990 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e264d29d | 991 | } |
b00052e4 | 992 | |
8a661aea AF |
993 | static const TypeInfo akitapda_type = { |
994 | .name = MACHINE_TYPE_NAME("akita"), | |
995 | .parent = TYPE_MACHINE, | |
996 | .class_init = akitapda_class_init, | |
997 | }; | |
b00052e4 | 998 | |
8a661aea | 999 | static void spitzpda_class_init(ObjectClass *oc, void *data) |
e264d29d | 1000 | { |
8a661aea AF |
1001 | MachineClass *mc = MACHINE_CLASS(oc); |
1002 | ||
ad1e8db8 | 1003 | mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; |
e264d29d | 1004 | mc->init = spitz_init; |
2059839b | 1005 | mc->block_default_type = IF_IDE; |
4672cbd7 | 1006 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 1007 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e264d29d | 1008 | } |
b00052e4 | 1009 | |
8a661aea AF |
1010 | static const TypeInfo spitzpda_type = { |
1011 | .name = MACHINE_TYPE_NAME("spitz"), | |
1012 | .parent = TYPE_MACHINE, | |
1013 | .class_init = spitzpda_class_init, | |
1014 | }; | |
e264d29d | 1015 | |
8a661aea | 1016 | static void borzoipda_class_init(ObjectClass *oc, void *data) |
e264d29d | 1017 | { |
8a661aea AF |
1018 | MachineClass *mc = MACHINE_CLASS(oc); |
1019 | ||
ad1e8db8 | 1020 | mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; |
e264d29d | 1021 | mc->init = borzoi_init; |
2059839b | 1022 | mc->block_default_type = IF_IDE; |
4672cbd7 | 1023 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 1024 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); |
e264d29d EH |
1025 | } |
1026 | ||
8a661aea AF |
1027 | static const TypeInfo borzoipda_type = { |
1028 | .name = MACHINE_TYPE_NAME("borzoi"), | |
1029 | .parent = TYPE_MACHINE, | |
1030 | .class_init = borzoipda_class_init, | |
1031 | }; | |
a984a69e | 1032 | |
8a661aea | 1033 | static void terrierpda_class_init(ObjectClass *oc, void *data) |
f80f9ec9 | 1034 | { |
8a661aea AF |
1035 | MachineClass *mc = MACHINE_CLASS(oc); |
1036 | ||
ad1e8db8 | 1037 | mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; |
e264d29d | 1038 | mc->init = terrier_init; |
2059839b | 1039 | mc->block_default_type = IF_IDE; |
4672cbd7 | 1040 | mc->ignore_memory_transaction_failures = true; |
ba1ba5cc | 1041 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); |
f80f9ec9 AL |
1042 | } |
1043 | ||
8a661aea AF |
1044 | static const TypeInfo terrierpda_type = { |
1045 | .name = MACHINE_TYPE_NAME("terrier"), | |
1046 | .parent = TYPE_MACHINE, | |
1047 | .class_init = terrierpda_class_init, | |
1048 | }; | |
1049 | ||
1050 | static void spitz_machine_init(void) | |
1051 | { | |
1052 | type_register_static(&akitapda_type); | |
1053 | type_register_static(&spitzpda_type); | |
1054 | type_register_static(&borzoipda_type); | |
1055 | type_register_static(&terrierpda_type); | |
1056 | } | |
1057 | ||
0e6aac87 | 1058 | type_init(spitz_machine_init) |
f80f9ec9 | 1059 | |
7ef4227b DES |
1060 | static bool is_version_0(void *opaque, int version_id) |
1061 | { | |
1062 | return version_id == 0; | |
1063 | } | |
1064 | ||
34f9f0b5 DES |
1065 | static VMStateDescription vmstate_sl_nand_info = { |
1066 | .name = "sl-nand", | |
1067 | .version_id = 0, | |
1068 | .minimum_version_id = 0, | |
8f1e884b | 1069 | .fields = (VMStateField[]) { |
34f9f0b5 DES |
1070 | VMSTATE_UINT8(ctl, SLNANDState), |
1071 | VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), | |
1072 | VMSTATE_END_OF_LIST(), | |
1073 | }, | |
1074 | }; | |
1075 | ||
999e12bb AL |
1076 | static Property sl_nand_properties[] = { |
1077 | DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), | |
1078 | DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), | |
1079 | DEFINE_PROP_END_OF_LIST(), | |
1080 | }; | |
1081 | ||
1082 | static void sl_nand_class_init(ObjectClass *klass, void *data) | |
1083 | { | |
39bffca2 | 1084 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 1085 | |
39bffca2 AL |
1086 | dc->vmsd = &vmstate_sl_nand_info; |
1087 | dc->props = sl_nand_properties; | |
07bc425e | 1088 | dc->realize = sl_nand_realize; |
9f9bdf43 | 1089 | /* Reason: init() method uses drive_get() */ |
e90f2a8c | 1090 | dc->user_creatable = false; |
999e12bb AL |
1091 | } |
1092 | ||
8c43a6f0 | 1093 | static const TypeInfo sl_nand_info = { |
7eb8104a | 1094 | .name = TYPE_SL_NAND, |
39bffca2 AL |
1095 | .parent = TYPE_SYS_BUS_DEVICE, |
1096 | .instance_size = sizeof(SLNANDState), | |
f68575c9 | 1097 | .instance_init = sl_nand_init, |
39bffca2 | 1098 | .class_init = sl_nand_class_init, |
34f9f0b5 DES |
1099 | }; |
1100 | ||
7ef4227b DES |
1101 | static VMStateDescription vmstate_spitz_kbd = { |
1102 | .name = "spitz-keyboard", | |
1103 | .version_id = 1, | |
1104 | .minimum_version_id = 0, | |
7ef4227b | 1105 | .post_load = spitz_keyboard_post_load, |
8f1e884b | 1106 | .fields = (VMStateField[]) { |
7ef4227b DES |
1107 | VMSTATE_UINT16(sense_state, SpitzKeyboardState), |
1108 | VMSTATE_UINT16(strobe_state, SpitzKeyboardState), | |
1109 | VMSTATE_UNUSED_TEST(is_version_0, 5), | |
1110 | VMSTATE_END_OF_LIST(), | |
1111 | }, | |
1112 | }; | |
1113 | ||
999e12bb AL |
1114 | static void spitz_keyboard_class_init(ObjectClass *klass, void *data) |
1115 | { | |
39bffca2 | 1116 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 1117 | |
39bffca2 | 1118 | dc->vmsd = &vmstate_spitz_kbd; |
999e12bb AL |
1119 | } |
1120 | ||
8c43a6f0 | 1121 | static const TypeInfo spitz_keyboard_info = { |
73e9d965 | 1122 | .name = TYPE_SPITZ_KEYBOARD, |
39bffca2 AL |
1123 | .parent = TYPE_SYS_BUS_DEVICE, |
1124 | .instance_size = sizeof(SpitzKeyboardState), | |
f68575c9 | 1125 | .instance_init = spitz_keyboard_init, |
39bffca2 | 1126 | .class_init = spitz_keyboard_class_init, |
7ef4227b DES |
1127 | }; |
1128 | ||
43842120 DES |
1129 | static const VMStateDescription vmstate_corgi_ssp_regs = { |
1130 | .name = "corgi-ssp", | |
66530953 PC |
1131 | .version_id = 2, |
1132 | .minimum_version_id = 2, | |
8f1e884b | 1133 | .fields = (VMStateField[]) { |
66530953 | 1134 | VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), |
43842120 DES |
1135 | VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), |
1136 | VMSTATE_END_OF_LIST(), | |
1137 | } | |
1138 | }; | |
1139 | ||
cd6c4cf2 AL |
1140 | static void corgi_ssp_class_init(ObjectClass *klass, void *data) |
1141 | { | |
39bffca2 | 1142 | DeviceClass *dc = DEVICE_CLASS(klass); |
cd6c4cf2 AL |
1143 | SSISlaveClass *k = SSI_SLAVE_CLASS(klass); |
1144 | ||
7673bb4c | 1145 | k->realize = corgi_ssp_realize; |
cd6c4cf2 | 1146 | k->transfer = corgi_ssp_transfer; |
39bffca2 | 1147 | dc->vmsd = &vmstate_corgi_ssp_regs; |
cd6c4cf2 AL |
1148 | } |
1149 | ||
8c43a6f0 | 1150 | static const TypeInfo corgi_ssp_info = { |
39bffca2 AL |
1151 | .name = "corgi-ssp", |
1152 | .parent = TYPE_SSI_SLAVE, | |
1153 | .instance_size = sizeof(CorgiSSPState), | |
1154 | .class_init = corgi_ssp_class_init, | |
a984a69e PB |
1155 | }; |
1156 | ||
43842120 DES |
1157 | static const VMStateDescription vmstate_spitz_lcdtg_regs = { |
1158 | .name = "spitz-lcdtg", | |
1159 | .version_id = 1, | |
1160 | .minimum_version_id = 1, | |
8f1e884b | 1161 | .fields = (VMStateField[]) { |
66530953 | 1162 | VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), |
43842120 DES |
1163 | VMSTATE_UINT32(bl_intensity, SpitzLCDTG), |
1164 | VMSTATE_UINT32(bl_power, SpitzLCDTG), | |
1165 | VMSTATE_END_OF_LIST(), | |
1166 | } | |
1167 | }; | |
1168 | ||
cd6c4cf2 AL |
1169 | static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) |
1170 | { | |
39bffca2 | 1171 | DeviceClass *dc = DEVICE_CLASS(klass); |
cd6c4cf2 AL |
1172 | SSISlaveClass *k = SSI_SLAVE_CLASS(klass); |
1173 | ||
7673bb4c | 1174 | k->realize = spitz_lcdtg_realize; |
cd6c4cf2 | 1175 | k->transfer = spitz_lcdtg_transfer; |
39bffca2 | 1176 | dc->vmsd = &vmstate_spitz_lcdtg_regs; |
cd6c4cf2 AL |
1177 | } |
1178 | ||
8c43a6f0 | 1179 | static const TypeInfo spitz_lcdtg_info = { |
39bffca2 AL |
1180 | .name = "spitz-lcdtg", |
1181 | .parent = TYPE_SSI_SLAVE, | |
1182 | .instance_size = sizeof(SpitzLCDTG), | |
1183 | .class_init = spitz_lcdtg_class_init, | |
a984a69e PB |
1184 | }; |
1185 | ||
83f7d43a | 1186 | static void spitz_register_types(void) |
a984a69e | 1187 | { |
39bffca2 AL |
1188 | type_register_static(&corgi_ssp_info); |
1189 | type_register_static(&spitz_lcdtg_info); | |
1190 | type_register_static(&spitz_keyboard_info); | |
1191 | type_register_static(&sl_nand_info); | |
a984a69e PB |
1192 | } |
1193 | ||
83f7d43a | 1194 | type_init(spitz_register_types) |