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Commit | Line | Data |
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b00052e4 AZ |
1 | /* |
2 | * PXA270-based Clamshell PDA platforms. | |
3 | * | |
4 | * Copyright (c) 2006 Openedhand Ltd. | |
5 | * Written by Andrzej Zaborowski <balrog@zabor.org> | |
6 | * | |
7 | * This code is licensed under the GNU GPL v2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
b00052e4 AZ |
11 | */ |
12 | ||
83c9f4ca | 13 | #include "hw/hw.h" |
0d09e41a | 14 | #include "hw/arm/pxa.h" |
bd2be150 | 15 | #include "hw/arm/arm.h" |
9c17d615 | 16 | #include "sysemu/sysemu.h" |
83c9f4ca | 17 | #include "hw/pcmcia.h" |
0d09e41a | 18 | #include "hw/i2c/i2c.h" |
83c9f4ca | 19 | #include "hw/ssi.h" |
0d09e41a | 20 | #include "hw/block/flash.h" |
1de7afc9 | 21 | #include "qemu/timer.h" |
bd2be150 | 22 | #include "hw/devices.h" |
0d09e41a | 23 | #include "hw/arm/sharpsl.h" |
28ecbaee | 24 | #include "ui/console.h" |
737e150e | 25 | #include "block/block.h" |
87ecb68b | 26 | #include "audio/audio.h" |
83c9f4ca | 27 | #include "hw/boards.h" |
9c17d615 | 28 | #include "sysemu/blockdev.h" |
83c9f4ca | 29 | #include "hw/sysbus.h" |
022c62cb | 30 | #include "exec/address-spaces.h" |
b00052e4 | 31 | |
b00052e4 AZ |
32 | #undef REG_FMT |
33 | #define REG_FMT "0x%02lx" | |
34 | ||
35 | /* Spitz Flash */ | |
36 | #define FLASH_BASE 0x0c000000 | |
37 | #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ | |
38 | #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ | |
39 | #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ | |
40 | #define FLASH_ECCCNTR 0x0c /* ECC byte counter */ | |
41 | #define FLASH_ECCCLRR 0x10 /* Clear ECC */ | |
42 | #define FLASH_FLASHIO 0x14 /* Flash I/O */ | |
43 | #define FLASH_FLASHCTL 0x18 /* Flash Control */ | |
44 | ||
45 | #define FLASHCTL_CE0 (1 << 0) | |
46 | #define FLASHCTL_CLE (1 << 1) | |
47 | #define FLASHCTL_ALE (1 << 2) | |
48 | #define FLASHCTL_WP (1 << 3) | |
49 | #define FLASHCTL_CE1 (1 << 4) | |
50 | #define FLASHCTL_RYBY (1 << 5) | |
51 | #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) | |
52 | ||
7eb8104a AF |
53 | #define TYPE_SL_NAND "sl-nand" |
54 | #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) | |
55 | ||
bc24a225 | 56 | typedef struct { |
7eb8104a AF |
57 | SysBusDevice parent_obj; |
58 | ||
7cc09e6c | 59 | MemoryRegion iomem; |
d4220389 | 60 | DeviceState *nand; |
b00052e4 | 61 | uint8_t ctl; |
34f9f0b5 DES |
62 | uint8_t manf_id; |
63 | uint8_t chip_id; | |
bc24a225 PB |
64 | ECCState ecc; |
65 | } SLNANDState; | |
b00052e4 | 66 | |
a8170e5e | 67 | static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) |
b00052e4 | 68 | { |
bc24a225 | 69 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 | 70 | int ryby; |
b00052e4 AZ |
71 | |
72 | switch (addr) { | |
73 | #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) | |
74 | case FLASH_ECCLPLB: | |
75 | return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | | |
76 | BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); | |
77 | ||
78 | #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) | |
79 | case FLASH_ECCLPUB: | |
80 | return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | | |
81 | BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); | |
82 | ||
83 | case FLASH_ECCCP: | |
84 | return s->ecc.cp; | |
85 | ||
86 | case FLASH_ECCCNTR: | |
87 | return s->ecc.count & 0xff; | |
88 | ||
89 | case FLASH_FLASHCTL: | |
90 | nand_getpins(s->nand, &ryby); | |
91 | if (ryby) | |
92 | return s->ctl | FLASHCTL_RYBY; | |
93 | else | |
94 | return s->ctl; | |
95 | ||
96 | case FLASH_FLASHIO: | |
7cc09e6c AK |
97 | if (size == 4) { |
98 | return ecc_digest(&s->ecc, nand_getio(s->nand)) | | |
99 | (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); | |
100 | } | |
b00052e4 AZ |
101 | return ecc_digest(&s->ecc, nand_getio(s->nand)); |
102 | ||
103 | default: | |
a8b7063b | 104 | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
b00052e4 AZ |
105 | } |
106 | return 0; | |
107 | } | |
108 | ||
a8170e5e | 109 | static void sl_write(void *opaque, hwaddr addr, |
7cc09e6c | 110 | uint64_t value, unsigned size) |
b00052e4 | 111 | { |
bc24a225 | 112 | SLNANDState *s = (SLNANDState *) opaque; |
b00052e4 AZ |
113 | |
114 | switch (addr) { | |
115 | case FLASH_ECCCLRR: | |
116 | /* Value is ignored. */ | |
117 | ecc_reset(&s->ecc); | |
118 | break; | |
119 | ||
120 | case FLASH_FLASHCTL: | |
121 | s->ctl = value & 0xff & ~FLASHCTL_RYBY; | |
122 | nand_setpins(s->nand, | |
123 | s->ctl & FLASHCTL_CLE, | |
124 | s->ctl & FLASHCTL_ALE, | |
125 | s->ctl & FLASHCTL_NCE, | |
126 | s->ctl & FLASHCTL_WP, | |
127 | 0); | |
128 | break; | |
129 | ||
130 | case FLASH_FLASHIO: | |
131 | nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); | |
132 | break; | |
133 | ||
134 | default: | |
a8b7063b | 135 | zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
b00052e4 AZ |
136 | } |
137 | } | |
138 | ||
139 | enum { | |
140 | FLASH_128M, | |
141 | FLASH_1024M, | |
142 | }; | |
143 | ||
7cc09e6c AK |
144 | static const MemoryRegionOps sl_ops = { |
145 | .read = sl_read, | |
146 | .write = sl_write, | |
147 | .endianness = DEVICE_NATIVE_ENDIAN, | |
34f9f0b5 DES |
148 | }; |
149 | ||
bc24a225 | 150 | static void sl_flash_register(PXA2xxState *cpu, int size) |
b00052e4 | 151 | { |
34f9f0b5 DES |
152 | DeviceState *dev; |
153 | ||
7eb8104a | 154 | dev = qdev_create(NULL, TYPE_SL_NAND); |
34f9f0b5 DES |
155 | |
156 | qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); | |
157 | if (size == FLASH_128M) | |
158 | qdev_prop_set_uint8(dev, "chip_id", 0x73); | |
159 | else if (size == FLASH_1024M) | |
160 | qdev_prop_set_uint8(dev, "chip_id", 0xf1); | |
161 | ||
162 | qdev_init_nofail(dev); | |
1356b98d | 163 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); |
34f9f0b5 DES |
164 | } |
165 | ||
7eb8104a AF |
166 | static int sl_nand_init(SysBusDevice *dev) |
167 | { | |
168 | SLNANDState *s = SL_NAND(dev); | |
522f253c | 169 | DriveInfo *nand; |
34f9f0b5 | 170 | |
b00052e4 | 171 | s->ctl = 0; |
522f253c PM |
172 | nand = drive_get(IF_MTD, 0, 0); |
173 | s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id); | |
b00052e4 | 174 | |
64bde0f3 | 175 | memory_region_init_io(&s->iomem, OBJECT(s), &sl_ops, s, "sl", 0x40); |
750ecd44 | 176 | sysbus_init_mmio(dev, &s->iomem); |
34f9f0b5 DES |
177 | |
178 | return 0; | |
b00052e4 AZ |
179 | } |
180 | ||
181 | /* Spitz Keyboard */ | |
182 | ||
183 | #define SPITZ_KEY_STROBE_NUM 11 | |
184 | #define SPITZ_KEY_SENSE_NUM 7 | |
185 | ||
186 | static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { | |
187 | 12, 17, 91, 34, 36, 38, 39 | |
188 | }; | |
189 | ||
190 | static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { | |
191 | 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 | |
192 | }; | |
193 | ||
194 | /* Eighth additional row maps the special keys */ | |
195 | static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { | |
196 | { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, | |
197 | { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, | |
198 | { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, | |
199 | { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, | |
200 | { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, | |
2b76bdc9 AZ |
201 | { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
202 | { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, | |
b00052e4 AZ |
203 | { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
204 | }; | |
205 | ||
206 | #define SPITZ_GPIO_AK_INT 13 /* Remote control */ | |
207 | #define SPITZ_GPIO_SYNC 16 /* Sync button */ | |
208 | #define SPITZ_GPIO_ON_KEY 95 /* Power button */ | |
209 | #define SPITZ_GPIO_SWA 97 /* Lid */ | |
210 | #define SPITZ_GPIO_SWB 96 /* Tablet mode */ | |
211 | ||
212 | /* The special buttons are mapped to unused keys */ | |
213 | static const int spitz_gpiomap[5] = { | |
214 | SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, | |
215 | SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, | |
216 | }; | |
b00052e4 | 217 | |
73e9d965 AF |
218 | #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" |
219 | #define SPITZ_KEYBOARD(obj) \ | |
220 | OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) | |
221 | ||
bc24a225 | 222 | typedef struct { |
73e9d965 AF |
223 | SysBusDevice parent_obj; |
224 | ||
38641a52 | 225 | qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
38641a52 | 226 | qemu_irq gpiomap[5]; |
b00052e4 AZ |
227 | int keymap[0x80]; |
228 | uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; | |
229 | uint16_t strobe_state; | |
230 | uint16_t sense_state; | |
231 | ||
232 | uint16_t pre_map[0x100]; | |
233 | uint16_t modifiers; | |
234 | uint16_t imodifiers; | |
235 | uint8_t fifo[16]; | |
236 | int fifopos, fifolen; | |
237 | QEMUTimer *kbdtimer; | |
bc24a225 | 238 | } SpitzKeyboardState; |
b00052e4 | 239 | |
bc24a225 | 240 | static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
b00052e4 AZ |
241 | { |
242 | int i; | |
243 | uint16_t strobe, sense = 0; | |
244 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { | |
245 | strobe = s->keyrow[i] & s->strobe_state; | |
246 | if (strobe) { | |
247 | sense |= 1 << i; | |
248 | if (!(s->sense_state & (1 << i))) | |
38641a52 | 249 | qemu_irq_raise(s->sense[i]); |
b00052e4 | 250 | } else if (s->sense_state & (1 << i)) |
38641a52 | 251 | qemu_irq_lower(s->sense[i]); |
b00052e4 AZ |
252 | } |
253 | ||
254 | s->sense_state = sense; | |
255 | } | |
256 | ||
38641a52 | 257 | static void spitz_keyboard_strobe(void *opaque, int line, int level) |
b00052e4 | 258 | { |
bc24a225 | 259 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
38641a52 AZ |
260 | |
261 | if (level) | |
262 | s->strobe_state |= 1 << line; | |
263 | else | |
264 | s->strobe_state &= ~(1 << line); | |
265 | spitz_keyboard_sense_update(s); | |
b00052e4 AZ |
266 | } |
267 | ||
bc24a225 | 268 | static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
b00052e4 AZ |
269 | { |
270 | int spitz_keycode = s->keymap[keycode & 0x7f]; | |
271 | if (spitz_keycode == -1) | |
272 | return; | |
273 | ||
274 | /* Handle the additional keys */ | |
275 | if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { | |
7ef4227b | 276 | qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); |
b00052e4 AZ |
277 | return; |
278 | } | |
279 | ||
280 | if (keycode & 0x80) | |
281 | s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); | |
282 | else | |
283 | s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); | |
284 | ||
285 | spitz_keyboard_sense_update(s); | |
286 | } | |
287 | ||
d8e846e1 PB |
288 | #define MOD_SHIFT (1 << 7) |
289 | #define MOD_CTRL (1 << 8) | |
290 | #define MOD_FN (1 << 9) | |
b00052e4 AZ |
291 | |
292 | #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c | |
293 | ||
7ef4227b | 294 | static void spitz_keyboard_handler(void *opaque, int keycode) |
b00052e4 | 295 | { |
7ef4227b | 296 | SpitzKeyboardState *s = opaque; |
b00052e4 AZ |
297 | uint16_t code; |
298 | int mapcode; | |
299 | switch (keycode) { | |
300 | case 0x2a: /* Left Shift */ | |
301 | s->modifiers |= 1; | |
302 | break; | |
303 | case 0xaa: | |
304 | s->modifiers &= ~1; | |
305 | break; | |
306 | case 0x36: /* Right Shift */ | |
307 | s->modifiers |= 2; | |
308 | break; | |
309 | case 0xb6: | |
310 | s->modifiers &= ~2; | |
311 | break; | |
312 | case 0x1d: /* Control */ | |
313 | s->modifiers |= 4; | |
314 | break; | |
315 | case 0x9d: | |
316 | s->modifiers &= ~4; | |
317 | break; | |
318 | case 0x38: /* Alt */ | |
319 | s->modifiers |= 8; | |
320 | break; | |
321 | case 0xb8: | |
322 | s->modifiers &= ~8; | |
323 | break; | |
324 | } | |
325 | ||
326 | code = s->pre_map[mapcode = ((s->modifiers & 3) ? | |
d8e846e1 PB |
327 | (keycode | MOD_SHIFT) : |
328 | (keycode & ~MOD_SHIFT))]; | |
b00052e4 AZ |
329 | |
330 | if (code != mapcode) { | |
331 | #if 0 | |
d8e846e1 | 332 | if ((code & MOD_SHIFT) && !(s->modifiers & 1)) |
b00052e4 | 333 | QUEUE_KEY(0x2a | (keycode & 0x80)); |
d8e846e1 | 334 | if ((code & MOD_CTRL ) && !(s->modifiers & 4)) |
b00052e4 | 335 | QUEUE_KEY(0x1d | (keycode & 0x80)); |
d8e846e1 | 336 | if ((code & MOD_FN ) && !(s->modifiers & 8)) |
b00052e4 | 337 | QUEUE_KEY(0x38 | (keycode & 0x80)); |
d8e846e1 | 338 | if ((code & MOD_FN ) && (s->modifiers & 1)) |
b00052e4 | 339 | QUEUE_KEY(0x2a | (~keycode & 0x80)); |
d8e846e1 | 340 | if ((code & MOD_FN ) && (s->modifiers & 2)) |
b00052e4 AZ |
341 | QUEUE_KEY(0x36 | (~keycode & 0x80)); |
342 | #else | |
343 | if (keycode & 0x80) { | |
344 | if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) | |
345 | QUEUE_KEY(0x2a | 0x80); | |
346 | if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) | |
347 | QUEUE_KEY(0x1d | 0x80); | |
348 | if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) | |
349 | QUEUE_KEY(0x38 | 0x80); | |
350 | if ((s->imodifiers & 0x10) && (s->modifiers & 1)) | |
351 | QUEUE_KEY(0x2a); | |
352 | if ((s->imodifiers & 0x20) && (s->modifiers & 2)) | |
353 | QUEUE_KEY(0x36); | |
354 | s->imodifiers = 0; | |
355 | } else { | |
d8e846e1 | 356 | if ((code & MOD_SHIFT) && !((s->modifiers | s->imodifiers) & 1)) { |
b00052e4 AZ |
357 | QUEUE_KEY(0x2a); |
358 | s->imodifiers |= 1; | |
359 | } | |
d8e846e1 | 360 | if ((code & MOD_CTRL ) && !((s->modifiers | s->imodifiers) & 4)) { |
b00052e4 AZ |
361 | QUEUE_KEY(0x1d); |
362 | s->imodifiers |= 4; | |
363 | } | |
d8e846e1 | 364 | if ((code & MOD_FN ) && !((s->modifiers | s->imodifiers) & 8)) { |
b00052e4 AZ |
365 | QUEUE_KEY(0x38); |
366 | s->imodifiers |= 8; | |
367 | } | |
d8e846e1 | 368 | if ((code & MOD_FN ) && (s->modifiers & 1) && |
b00052e4 AZ |
369 | !(s->imodifiers & 0x10)) { |
370 | QUEUE_KEY(0x2a | 0x80); | |
371 | s->imodifiers |= 0x10; | |
372 | } | |
d8e846e1 | 373 | if ((code & MOD_FN ) && (s->modifiers & 2) && |
b00052e4 AZ |
374 | !(s->imodifiers & 0x20)) { |
375 | QUEUE_KEY(0x36 | 0x80); | |
376 | s->imodifiers |= 0x20; | |
377 | } | |
378 | } | |
379 | #endif | |
380 | } | |
381 | ||
382 | QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); | |
383 | } | |
384 | ||
385 | static void spitz_keyboard_tick(void *opaque) | |
386 | { | |
bc24a225 | 387 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
b00052e4 AZ |
388 | |
389 | if (s->fifolen) { | |
390 | spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); | |
391 | s->fifolen --; | |
392 | if (s->fifopos >= 16) | |
393 | s->fifopos = 0; | |
394 | } | |
395 | ||
bc72ad67 | 396 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + |
6ee093c9 | 397 | get_ticks_per_sec() / 32); |
b00052e4 AZ |
398 | } |
399 | ||
bc24a225 | 400 | static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
b00052e4 AZ |
401 | { |
402 | int i; | |
403 | for (i = 0; i < 0x100; i ++) | |
404 | s->pre_map[i] = i; | |
d8e846e1 PB |
405 | s->pre_map[0x02 | MOD_SHIFT ] = 0x02 | MOD_SHIFT; /* exclam */ |
406 | s->pre_map[0x28 | MOD_SHIFT ] = 0x03 | MOD_SHIFT; /* quotedbl */ | |
407 | s->pre_map[0x04 | MOD_SHIFT ] = 0x04 | MOD_SHIFT; /* numbersign */ | |
408 | s->pre_map[0x05 | MOD_SHIFT ] = 0x05 | MOD_SHIFT; /* dollar */ | |
409 | s->pre_map[0x06 | MOD_SHIFT ] = 0x06 | MOD_SHIFT; /* percent */ | |
410 | s->pre_map[0x08 | MOD_SHIFT ] = 0x07 | MOD_SHIFT; /* ampersand */ | |
411 | s->pre_map[0x28 ] = 0x08 | MOD_SHIFT; /* apostrophe */ | |
412 | s->pre_map[0x0a | MOD_SHIFT ] = 0x09 | MOD_SHIFT; /* parenleft */ | |
413 | s->pre_map[0x0b | MOD_SHIFT ] = 0x0a | MOD_SHIFT; /* parenright */ | |
414 | s->pre_map[0x29 | MOD_SHIFT ] = 0x0b | MOD_SHIFT; /* asciitilde */ | |
415 | s->pre_map[0x03 | MOD_SHIFT ] = 0x0c | MOD_SHIFT; /* at */ | |
416 | s->pre_map[0xd3 ] = 0x0e | MOD_FN; /* Delete */ | |
417 | s->pre_map[0x3a ] = 0x0f | MOD_FN; /* Caps_Lock */ | |
418 | s->pre_map[0x07 | MOD_SHIFT ] = 0x11 | MOD_FN; /* asciicircum */ | |
419 | s->pre_map[0x0d ] = 0x12 | MOD_FN; /* equal */ | |
420 | s->pre_map[0x0d | MOD_SHIFT ] = 0x13 | MOD_FN; /* plus */ | |
421 | s->pre_map[0x1a ] = 0x14 | MOD_FN; /* bracketleft */ | |
422 | s->pre_map[0x1b ] = 0x15 | MOD_FN; /* bracketright */ | |
423 | s->pre_map[0x1a | MOD_SHIFT ] = 0x16 | MOD_FN; /* braceleft */ | |
424 | s->pre_map[0x1b | MOD_SHIFT ] = 0x17 | MOD_FN; /* braceright */ | |
425 | s->pre_map[0x27 ] = 0x22 | MOD_FN; /* semicolon */ | |
426 | s->pre_map[0x27 | MOD_SHIFT ] = 0x23 | MOD_FN; /* colon */ | |
427 | s->pre_map[0x09 | MOD_SHIFT ] = 0x24 | MOD_FN; /* asterisk */ | |
428 | s->pre_map[0x2b ] = 0x25 | MOD_FN; /* backslash */ | |
429 | s->pre_map[0x2b | MOD_SHIFT ] = 0x26 | MOD_FN; /* bar */ | |
430 | s->pre_map[0x0c | MOD_SHIFT ] = 0x30 | MOD_FN; /* underscore */ | |
431 | s->pre_map[0x33 | MOD_SHIFT ] = 0x33 | MOD_FN; /* less */ | |
432 | s->pre_map[0x35 ] = 0x33 | MOD_SHIFT; /* slash */ | |
433 | s->pre_map[0x34 | MOD_SHIFT ] = 0x34 | MOD_FN; /* greater */ | |
434 | s->pre_map[0x35 | MOD_SHIFT ] = 0x34 | MOD_SHIFT; /* question */ | |
435 | s->pre_map[0x49 ] = 0x48 | MOD_FN; /* Page_Up */ | |
436 | s->pre_map[0x51 ] = 0x50 | MOD_FN; /* Page_Down */ | |
b00052e4 AZ |
437 | |
438 | s->modifiers = 0; | |
439 | s->imodifiers = 0; | |
440 | s->fifopos = 0; | |
441 | s->fifolen = 0; | |
b00052e4 AZ |
442 | } |
443 | ||
d8e846e1 PB |
444 | #undef MOD_SHIFT |
445 | #undef MOD_CTRL | |
446 | #undef MOD_FN | |
b00052e4 | 447 | |
7ef4227b | 448 | static int spitz_keyboard_post_load(void *opaque, int version_id) |
aa941b94 | 449 | { |
bc24a225 | 450 | SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
aa941b94 AZ |
451 | |
452 | /* Release all pressed keys */ | |
453 | memset(s->keyrow, 0, sizeof(s->keyrow)); | |
454 | spitz_keyboard_sense_update(s); | |
455 | s->modifiers = 0; | |
456 | s->imodifiers = 0; | |
457 | s->fifopos = 0; | |
458 | s->fifolen = 0; | |
459 | ||
460 | return 0; | |
461 | } | |
462 | ||
bc24a225 | 463 | static void spitz_keyboard_register(PXA2xxState *cpu) |
b00052e4 | 464 | { |
7ef4227b DES |
465 | int i; |
466 | DeviceState *dev; | |
bc24a225 | 467 | SpitzKeyboardState *s; |
b00052e4 | 468 | |
73e9d965 AF |
469 | dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); |
470 | s = SPITZ_KEYBOARD(dev); | |
b00052e4 | 471 | |
38641a52 | 472 | for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
0bb53337 | 473 | qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); |
38641a52 AZ |
474 | |
475 | for (i = 0; i < 5; i ++) | |
0bb53337 | 476 | s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); |
38641a52 | 477 | |
7ef4227b DES |
478 | if (!graphic_rotate) |
479 | s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); | |
480 | ||
481 | for (i = 0; i < 5; i++) | |
482 | qemu_set_irq(s->gpiomap[i], 0); | |
483 | ||
b00052e4 | 484 | for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
0bb53337 | 485 | qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], |
7ef4227b DES |
486 | qdev_get_gpio_in(dev, i)); |
487 | ||
bc72ad67 | 488 | timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); |
7ef4227b DES |
489 | |
490 | qemu_add_kbd_event_handler(spitz_keyboard_handler, s); | |
491 | } | |
492 | ||
73e9d965 | 493 | static int spitz_keyboard_init(SysBusDevice *sbd) |
7ef4227b | 494 | { |
73e9d965 AF |
495 | DeviceState *dev = DEVICE(sbd); |
496 | SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); | |
7ef4227b DES |
497 | int i, j; |
498 | ||
7ef4227b DES |
499 | for (i = 0; i < 0x80; i ++) |
500 | s->keymap[i] = -1; | |
501 | for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) | |
502 | for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) | |
503 | if (spitz_keymap[i][j] != -1) | |
504 | s->keymap[spitz_keymap[i][j]] = (i << 4) | j; | |
b00052e4 AZ |
505 | |
506 | spitz_keyboard_pre_map(s); | |
aa941b94 | 507 | |
bc72ad67 | 508 | s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); |
73e9d965 AF |
509 | qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); |
510 | qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); | |
7ef4227b DES |
511 | |
512 | return 0; | |
b00052e4 AZ |
513 | } |
514 | ||
b00052e4 AZ |
515 | /* LCD backlight controller */ |
516 | ||
517 | #define LCDTG_RESCTL 0x00 | |
518 | #define LCDTG_PHACTRL 0x01 | |
519 | #define LCDTG_DUTYCTRL 0x02 | |
520 | #define LCDTG_POWERREG0 0x03 | |
521 | #define LCDTG_POWERREG1 0x04 | |
522 | #define LCDTG_GPOR3 0x05 | |
523 | #define LCDTG_PICTRL 0x06 | |
524 | #define LCDTG_POLCTRL 0x07 | |
525 | ||
a984a69e PB |
526 | typedef struct { |
527 | SSISlave ssidev; | |
43842120 DES |
528 | uint32_t bl_intensity; |
529 | uint32_t bl_power; | |
a984a69e | 530 | } SpitzLCDTG; |
b00052e4 | 531 | |
a984a69e | 532 | static void spitz_bl_update(SpitzLCDTG *s) |
b00052e4 | 533 | { |
a984a69e PB |
534 | if (s->bl_power && s->bl_intensity) |
535 | zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); | |
b00052e4 | 536 | else |
89cdb6af | 537 | zaurus_printf("LCD Backlight now off\n"); |
b00052e4 AZ |
538 | } |
539 | ||
a984a69e PB |
540 | /* FIXME: Implement GPIO properly and remove this hack. */ |
541 | static SpitzLCDTG *spitz_lcdtg; | |
542 | ||
38641a52 | 543 | static inline void spitz_bl_bit5(void *opaque, int line, int level) |
b00052e4 | 544 | { |
a984a69e PB |
545 | SpitzLCDTG *s = spitz_lcdtg; |
546 | int prev = s->bl_intensity; | |
b00052e4 AZ |
547 | |
548 | if (level) | |
a984a69e | 549 | s->bl_intensity &= ~0x20; |
b00052e4 | 550 | else |
a984a69e | 551 | s->bl_intensity |= 0x20; |
b00052e4 | 552 | |
a984a69e PB |
553 | if (s->bl_power && prev != s->bl_intensity) |
554 | spitz_bl_update(s); | |
b00052e4 AZ |
555 | } |
556 | ||
38641a52 | 557 | static inline void spitz_bl_power(void *opaque, int line, int level) |
b00052e4 | 558 | { |
a984a69e PB |
559 | SpitzLCDTG *s = spitz_lcdtg; |
560 | s->bl_power = !!level; | |
561 | spitz_bl_update(s); | |
b00052e4 AZ |
562 | } |
563 | ||
a984a69e | 564 | static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value) |
b00052e4 | 565 | { |
a984a69e PB |
566 | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
567 | int addr; | |
568 | addr = value >> 5; | |
569 | value &= 0x1f; | |
b00052e4 AZ |
570 | |
571 | switch (addr) { | |
572 | case LCDTG_RESCTL: | |
573 | if (value) | |
89cdb6af | 574 | zaurus_printf("LCD in QVGA mode\n"); |
b00052e4 | 575 | else |
89cdb6af | 576 | zaurus_printf("LCD in VGA mode\n"); |
b00052e4 AZ |
577 | break; |
578 | ||
579 | case LCDTG_DUTYCTRL: | |
a984a69e PB |
580 | s->bl_intensity &= ~0x1f; |
581 | s->bl_intensity |= value; | |
582 | if (s->bl_power) | |
583 | spitz_bl_update(s); | |
b00052e4 AZ |
584 | break; |
585 | ||
586 | case LCDTG_POWERREG0: | |
587 | /* Set common voltage to M62332FP */ | |
588 | break; | |
589 | } | |
a984a69e PB |
590 | return 0; |
591 | } | |
592 | ||
81a322d4 | 593 | static int spitz_lcdtg_init(SSISlave *dev) |
a984a69e PB |
594 | { |
595 | SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); | |
596 | ||
597 | spitz_lcdtg = s; | |
598 | s->bl_power = 0; | |
599 | s->bl_intensity = 0x20; | |
600 | ||
81a322d4 | 601 | return 0; |
b00052e4 AZ |
602 | } |
603 | ||
604 | /* SSP devices */ | |
605 | ||
606 | #define CORGI_SSP_PORT 2 | |
607 | ||
608 | #define SPITZ_GPIO_LCDCON_CS 53 | |
609 | #define SPITZ_GPIO_ADS7846_CS 14 | |
610 | #define SPITZ_GPIO_MAX1111_CS 20 | |
611 | #define SPITZ_GPIO_TP_INT 11 | |
612 | ||
a984a69e | 613 | static DeviceState *max1111; |
b00052e4 AZ |
614 | |
615 | /* "Demux" the signal based on current chipselect */ | |
a984a69e PB |
616 | typedef struct { |
617 | SSISlave ssidev; | |
618 | SSIBus *bus[3]; | |
43842120 | 619 | uint32_t enable[3]; |
a984a69e | 620 | } CorgiSSPState; |
b00052e4 | 621 | |
a984a69e | 622 | static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) |
b00052e4 | 623 | { |
a984a69e PB |
624 | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
625 | int i; | |
626 | ||
627 | for (i = 0; i < 3; i++) { | |
628 | if (s->enable[i]) { | |
629 | return ssi_transfer(s->bus[i], value); | |
630 | } | |
631 | } | |
632 | return 0; | |
b00052e4 AZ |
633 | } |
634 | ||
38641a52 | 635 | static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
b00052e4 | 636 | { |
a984a69e PB |
637 | CorgiSSPState *s = (CorgiSSPState *)opaque; |
638 | assert(line >= 0 && line < 3); | |
639 | s->enable[line] = !level; | |
b00052e4 AZ |
640 | } |
641 | ||
642 | #define MAX1111_BATT_VOLT 1 | |
643 | #define MAX1111_BATT_TEMP 2 | |
644 | #define MAX1111_ACIN_VOLT 3 | |
645 | ||
646 | #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ | |
647 | #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ | |
648 | #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ | |
649 | ||
38641a52 | 650 | static void spitz_adc_temp_on(void *opaque, int line, int level) |
b00052e4 AZ |
651 | { |
652 | if (!max1111) | |
653 | return; | |
654 | ||
655 | if (level) | |
656 | max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); | |
657 | else | |
658 | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); | |
659 | } | |
660 | ||
81a322d4 | 661 | static int corgi_ssp_init(SSISlave *dev) |
a984a69e PB |
662 | { |
663 | CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); | |
664 | ||
665 | qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3); | |
02e2da45 PB |
666 | s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0"); |
667 | s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1"); | |
668 | s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2"); | |
a984a69e | 669 | |
81a322d4 | 670 | return 0; |
a984a69e PB |
671 | } |
672 | ||
bc24a225 | 673 | static void spitz_ssp_attach(PXA2xxState *cpu) |
b00052e4 | 674 | { |
a984a69e PB |
675 | DeviceState *mux; |
676 | DeviceState *dev; | |
677 | void *bus; | |
678 | ||
679 | mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); | |
38641a52 | 680 | |
a984a69e | 681 | bus = qdev_get_child_bus(mux, "ssi0"); |
22ed1d34 | 682 | ssi_create_slave(bus, "spitz-lcdtg"); |
b00052e4 | 683 | |
a984a69e PB |
684 | bus = qdev_get_child_bus(mux, "ssi1"); |
685 | dev = ssi_create_slave(bus, "ads7846"); | |
686 | qdev_connect_gpio_out(dev, 0, | |
0bb53337 | 687 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT)); |
b00052e4 | 688 | |
a984a69e PB |
689 | bus = qdev_get_child_bus(mux, "ssi2"); |
690 | max1111 = ssi_create_slave(bus, "max1111"); | |
b00052e4 AZ |
691 | max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); |
692 | max111x_set_input(max1111, MAX1111_BATT_TEMP, 0); | |
693 | max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); | |
694 | ||
0bb53337 | 695 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS, |
a984a69e | 696 | qdev_get_gpio_in(mux, 0)); |
0bb53337 | 697 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS, |
a984a69e | 698 | qdev_get_gpio_in(mux, 1)); |
0bb53337 | 699 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS, |
a984a69e | 700 | qdev_get_gpio_in(mux, 2)); |
b00052e4 AZ |
701 | } |
702 | ||
703 | /* CF Microdrive */ | |
704 | ||
bc24a225 | 705 | static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
b00052e4 | 706 | { |
bc24a225 | 707 | PCMCIACardState *md; |
751c6a17 | 708 | DriveInfo *dinfo; |
b00052e4 | 709 | |
751c6a17 | 710 | dinfo = drive_get(IF_IDE, 0, 0); |
124386cc | 711 | if (!dinfo || dinfo->media_cd) |
e4bcb14c | 712 | return; |
124386cc MA |
713 | md = dscm1xxxx_init(dinfo); |
714 | pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); | |
b00052e4 AZ |
715 | } |
716 | ||
adb86c37 AZ |
717 | /* Wm8750 and Max7310 on I2C */ |
718 | ||
719 | #define AKITA_MAX_ADDR 0x18 | |
611d7189 AZ |
720 | #define SPITZ_WM_ADDRL 0x1b |
721 | #define SPITZ_WM_ADDRH 0x1a | |
adb86c37 AZ |
722 | |
723 | #define SPITZ_GPIO_WM 5 | |
724 | ||
38641a52 | 725 | static void spitz_wm8750_addr(void *opaque, int line, int level) |
adb86c37 | 726 | { |
9e07bdf8 | 727 | I2CSlave *wm = (I2CSlave *) opaque; |
adb86c37 AZ |
728 | if (level) |
729 | i2c_set_slave_address(wm, SPITZ_WM_ADDRH); | |
730 | else | |
731 | i2c_set_slave_address(wm, SPITZ_WM_ADDRL); | |
732 | } | |
adb86c37 | 733 | |
bc24a225 | 734 | static void spitz_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
735 | { |
736 | /* Attach the CPU on one end of our I2C bus. */ | |
737 | i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); | |
738 | ||
cdbe40ca | 739 | DeviceState *wm; |
adb86c37 | 740 | |
adb86c37 | 741 | /* Attach a WM8750 to the bus */ |
cdbe40ca | 742 | wm = i2c_create_slave(bus, "wm8750", 0); |
adb86c37 | 743 | |
38641a52 | 744 | spitz_wm8750_addr(wm, 0, 0); |
0bb53337 | 745 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, |
38641a52 | 746 | qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]); |
adb86c37 AZ |
747 | /* .. and to the sound interface. */ |
748 | cpu->i2s->opaque = wm; | |
749 | cpu->i2s->codec_out = wm8750_dac_dat; | |
750 | cpu->i2s->codec_in = wm8750_adc_dat; | |
751 | wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); | |
adb86c37 AZ |
752 | } |
753 | ||
bc24a225 | 754 | static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
adb86c37 AZ |
755 | { |
756 | /* Attach a Max7310 to Akita I2C bus. */ | |
6c0bd6bd PB |
757 | i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
758 | AKITA_MAX_ADDR); | |
adb86c37 AZ |
759 | } |
760 | ||
b00052e4 AZ |
761 | /* Other peripherals */ |
762 | ||
38641a52 | 763 | static void spitz_out_switch(void *opaque, int line, int level) |
b00052e4 | 764 | { |
38641a52 AZ |
765 | switch (line) { |
766 | case 0: | |
89cdb6af | 767 | zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
38641a52 AZ |
768 | break; |
769 | case 1: | |
89cdb6af | 770 | zaurus_printf("Discharging %s.\n", level ? "on" : "off"); |
38641a52 AZ |
771 | break; |
772 | case 2: | |
89cdb6af | 773 | zaurus_printf("Green LED %s.\n", level ? "on" : "off"); |
38641a52 AZ |
774 | break; |
775 | case 3: | |
89cdb6af | 776 | zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); |
38641a52 AZ |
777 | break; |
778 | case 4: | |
779 | spitz_bl_bit5(opaque, line, level); | |
780 | break; | |
781 | case 5: | |
782 | spitz_bl_power(opaque, line, level); | |
783 | break; | |
784 | case 6: | |
785 | spitz_adc_temp_on(opaque, line, level); | |
786 | break; | |
787 | } | |
b00052e4 AZ |
788 | } |
789 | ||
790 | #define SPITZ_SCP_LED_GREEN 1 | |
791 | #define SPITZ_SCP_JK_B 2 | |
792 | #define SPITZ_SCP_CHRG_ON 3 | |
793 | #define SPITZ_SCP_MUTE_L 4 | |
794 | #define SPITZ_SCP_MUTE_R 5 | |
795 | #define SPITZ_SCP_CF_POWER 6 | |
796 | #define SPITZ_SCP_LED_ORANGE 7 | |
797 | #define SPITZ_SCP_JK_A 8 | |
798 | #define SPITZ_SCP_ADC_TEMP_ON 9 | |
799 | #define SPITZ_SCP2_IR_ON 1 | |
800 | #define SPITZ_SCP2_AKIN_PULLUP 2 | |
801 | #define SPITZ_SCP2_BACKLIGHT_CONT 7 | |
802 | #define SPITZ_SCP2_BACKLIGHT_ON 8 | |
803 | #define SPITZ_SCP2_MIC_BIAS 9 | |
804 | ||
bc24a225 | 805 | static void spitz_scoop_gpio_setup(PXA2xxState *cpu, |
383d01c6 | 806 | DeviceState *scp0, DeviceState *scp1) |
b00052e4 | 807 | { |
38641a52 AZ |
808 | qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8); |
809 | ||
383d01c6 DES |
810 | qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]); |
811 | qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]); | |
812 | qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]); | |
813 | qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]); | |
b00052e4 | 814 | |
e33d8cdb | 815 | if (scp1) { |
383d01c6 DES |
816 | qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]); |
817 | qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]); | |
b00052e4 AZ |
818 | } |
819 | ||
383d01c6 | 820 | qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]); |
b00052e4 AZ |
821 | } |
822 | ||
823 | #define SPITZ_GPIO_HSYNC 22 | |
824 | #define SPITZ_GPIO_SD_DETECT 9 | |
825 | #define SPITZ_GPIO_SD_WP 81 | |
826 | #define SPITZ_GPIO_ON_RESET 89 | |
827 | #define SPITZ_GPIO_BAT_COVER 90 | |
828 | #define SPITZ_GPIO_CF1_IRQ 105 | |
829 | #define SPITZ_GPIO_CF1_CD 94 | |
830 | #define SPITZ_GPIO_CF2_IRQ 106 | |
831 | #define SPITZ_GPIO_CF2_CD 93 | |
832 | ||
38641a52 | 833 | static int spitz_hsync; |
b00052e4 | 834 | |
38641a52 | 835 | static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
b00052e4 | 836 | { |
bc24a225 | 837 | PXA2xxState *cpu = (PXA2xxState *) opaque; |
0bb53337 | 838 | qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); |
b00052e4 AZ |
839 | spitz_hsync ^= 1; |
840 | } | |
841 | ||
bc24a225 | 842 | static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
b00052e4 | 843 | { |
38641a52 | 844 | qemu_irq lcd_hsync; |
b00052e4 AZ |
845 | /* |
846 | * Bad hack: We toggle the LCD hsync GPIO on every GPIO status | |
847 | * read to satisfy broken guests that poll-wait for hsync. | |
848 | * Simulating a real hsync event would be less practical and | |
849 | * wouldn't guarantee that a guest ever exits the loop. | |
850 | */ | |
851 | spitz_hsync = 0; | |
38641a52 AZ |
852 | lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0]; |
853 | pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); | |
854 | pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); | |
b00052e4 AZ |
855 | |
856 | /* MMC/SD host */ | |
02ce600c | 857 | pxa2xx_mmci_handlers(cpu->mmc, |
0bb53337 DES |
858 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), |
859 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); | |
b00052e4 AZ |
860 | |
861 | /* Battery lock always closed */ | |
0bb53337 | 862 | qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); |
b00052e4 AZ |
863 | |
864 | /* Handle reset */ | |
0bb53337 | 865 | qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset); |
b00052e4 AZ |
866 | |
867 | /* PCMCIA signals: card's IRQ and Card-Detect */ | |
b00052e4 | 868 | if (slots >= 1) |
38641a52 | 869 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], |
0bb53337 DES |
870 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), |
871 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); | |
b00052e4 | 872 | if (slots >= 2) |
38641a52 | 873 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], |
0bb53337 DES |
874 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), |
875 | qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); | |
b00052e4 AZ |
876 | } |
877 | ||
b00052e4 AZ |
878 | /* Board init. */ |
879 | enum spitz_model_e { spitz, akita, borzoi, terrier }; | |
880 | ||
7fb4fdcf AZ |
881 | #define SPITZ_RAM 0x04000000 |
882 | #define SPITZ_ROM 0x00800000 | |
883 | ||
f93eb9ff AZ |
884 | static struct arm_boot_info spitz_binfo = { |
885 | .loader_start = PXA2XX_SDRAM_BASE, | |
886 | .ram_size = 0x04000000, | |
887 | }; | |
888 | ||
72a9f5b7 PM |
889 | static void spitz_common_init(QEMUMachineInitArgs *args, |
890 | enum spitz_model_e model, int arm_id) | |
b00052e4 | 891 | { |
2e7ad760 | 892 | PXA2xxState *mpu; |
383d01c6 | 893 | DeviceState *scp0, *scp1 = NULL; |
a6dc4c2d | 894 | MemoryRegion *address_space_mem = get_system_memory(); |
7cc09e6c | 895 | MemoryRegion *rom = g_new(MemoryRegion, 1); |
72a9f5b7 | 896 | const char *cpu_model = args->cpu_model; |
b00052e4 | 897 | |
4207117c AZ |
898 | if (!cpu_model) |
899 | cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; | |
b00052e4 | 900 | |
d95b2f8d | 901 | /* Setup CPU & memory */ |
2e7ad760 | 902 | mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model); |
b00052e4 | 903 | |
2e7ad760 | 904 | sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
b00052e4 | 905 | |
2c9b15ca | 906 | memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM); |
c5705a77 | 907 | vmstate_register_ram_global(rom); |
7cc09e6c AK |
908 | memory_region_set_readonly(rom, true); |
909 | memory_region_add_subregion(address_space_mem, 0, rom); | |
b00052e4 AZ |
910 | |
911 | /* Setup peripherals */ | |
2e7ad760 | 912 | spitz_keyboard_register(mpu); |
b00052e4 | 913 | |
2e7ad760 | 914 | spitz_ssp_attach(mpu); |
b00052e4 | 915 | |
383d01c6 | 916 | scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); |
e33d8cdb | 917 | if (model != akita) { |
383d01c6 | 918 | scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); |
e33d8cdb | 919 | } |
b00052e4 | 920 | |
2e7ad760 | 921 | spitz_scoop_gpio_setup(mpu, scp0, scp1); |
b00052e4 | 922 | |
2e7ad760 | 923 | spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); |
b00052e4 | 924 | |
2e7ad760 | 925 | spitz_i2c_setup(mpu); |
adb86c37 AZ |
926 | |
927 | if (model == akita) | |
2e7ad760 | 928 | spitz_akita_i2c_setup(mpu); |
adb86c37 | 929 | |
b00052e4 | 930 | if (model == terrier) |
bf5ee248 | 931 | /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ |
2e7ad760 | 932 | spitz_microdrive_attach(mpu, 1); |
b00052e4 | 933 | else if (model != akita) |
15b18ec2 | 934 | /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ |
2e7ad760 | 935 | spitz_microdrive_attach(mpu, 0); |
b00052e4 | 936 | |
72a9f5b7 PM |
937 | spitz_binfo.kernel_filename = args->kernel_filename; |
938 | spitz_binfo.kernel_cmdline = args->kernel_cmdline; | |
939 | spitz_binfo.initrd_filename = args->initrd_filename; | |
f93eb9ff | 940 | spitz_binfo.board_id = arm_id; |
3aaa8dfa | 941 | arm_load_kernel(mpu->cpu, &spitz_binfo); |
f78630ab | 942 | sl_bootparam_write(SL_PXA_PARAM_BASE); |
b00052e4 AZ |
943 | } |
944 | ||
5f072e1f | 945 | static void spitz_init(QEMUMachineInitArgs *args) |
b00052e4 | 946 | { |
72a9f5b7 | 947 | spitz_common_init(args, spitz, 0x2c9); |
b00052e4 AZ |
948 | } |
949 | ||
5f072e1f | 950 | static void borzoi_init(QEMUMachineInitArgs *args) |
b00052e4 | 951 | { |
72a9f5b7 | 952 | spitz_common_init(args, borzoi, 0x33f); |
b00052e4 AZ |
953 | } |
954 | ||
5f072e1f | 955 | static void akita_init(QEMUMachineInitArgs *args) |
b00052e4 | 956 | { |
72a9f5b7 | 957 | spitz_common_init(args, akita, 0x2e8); |
b00052e4 AZ |
958 | } |
959 | ||
5f072e1f | 960 | static void terrier_init(QEMUMachineInitArgs *args) |
b00052e4 | 961 | { |
72a9f5b7 | 962 | spitz_common_init(args, terrier, 0x33f); |
b00052e4 AZ |
963 | } |
964 | ||
11be4b3e | 965 | static QEMUMachine akitapda_machine = { |
4b32e168 AL |
966 | .name = "akita", |
967 | .desc = "Akita PDA (PXA270)", | |
968 | .init = akita_init, | |
e4ada29e | 969 | DEFAULT_MACHINE_OPTIONS, |
b00052e4 AZ |
970 | }; |
971 | ||
f80f9ec9 | 972 | static QEMUMachine spitzpda_machine = { |
4b32e168 AL |
973 | .name = "spitz", |
974 | .desc = "Spitz PDA (PXA270)", | |
975 | .init = spitz_init, | |
e4ada29e | 976 | DEFAULT_MACHINE_OPTIONS, |
b00052e4 AZ |
977 | }; |
978 | ||
f80f9ec9 | 979 | static QEMUMachine borzoipda_machine = { |
4b32e168 AL |
980 | .name = "borzoi", |
981 | .desc = "Borzoi PDA (PXA270)", | |
982 | .init = borzoi_init, | |
e4ada29e | 983 | DEFAULT_MACHINE_OPTIONS, |
b00052e4 AZ |
984 | }; |
985 | ||
f80f9ec9 | 986 | static QEMUMachine terrierpda_machine = { |
4b32e168 AL |
987 | .name = "terrier", |
988 | .desc = "Terrier PDA (PXA270)", | |
989 | .init = terrier_init, | |
e4ada29e | 990 | DEFAULT_MACHINE_OPTIONS, |
b00052e4 | 991 | }; |
a984a69e | 992 | |
f80f9ec9 AL |
993 | static void spitz_machine_init(void) |
994 | { | |
995 | qemu_register_machine(&akitapda_machine); | |
996 | qemu_register_machine(&spitzpda_machine); | |
997 | qemu_register_machine(&borzoipda_machine); | |
998 | qemu_register_machine(&terrierpda_machine); | |
999 | } | |
1000 | ||
1001 | machine_init(spitz_machine_init); | |
1002 | ||
7ef4227b DES |
1003 | static bool is_version_0(void *opaque, int version_id) |
1004 | { | |
1005 | return version_id == 0; | |
1006 | } | |
1007 | ||
34f9f0b5 DES |
1008 | static VMStateDescription vmstate_sl_nand_info = { |
1009 | .name = "sl-nand", | |
1010 | .version_id = 0, | |
1011 | .minimum_version_id = 0, | |
1012 | .minimum_version_id_old = 0, | |
1013 | .fields = (VMStateField []) { | |
1014 | VMSTATE_UINT8(ctl, SLNANDState), | |
1015 | VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), | |
1016 | VMSTATE_END_OF_LIST(), | |
1017 | }, | |
1018 | }; | |
1019 | ||
999e12bb AL |
1020 | static Property sl_nand_properties[] = { |
1021 | DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), | |
1022 | DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), | |
1023 | DEFINE_PROP_END_OF_LIST(), | |
1024 | }; | |
1025 | ||
1026 | static void sl_nand_class_init(ObjectClass *klass, void *data) | |
1027 | { | |
39bffca2 | 1028 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb AL |
1029 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
1030 | ||
1031 | k->init = sl_nand_init; | |
39bffca2 AL |
1032 | dc->vmsd = &vmstate_sl_nand_info; |
1033 | dc->props = sl_nand_properties; | |
999e12bb AL |
1034 | } |
1035 | ||
8c43a6f0 | 1036 | static const TypeInfo sl_nand_info = { |
7eb8104a | 1037 | .name = TYPE_SL_NAND, |
39bffca2 AL |
1038 | .parent = TYPE_SYS_BUS_DEVICE, |
1039 | .instance_size = sizeof(SLNANDState), | |
1040 | .class_init = sl_nand_class_init, | |
34f9f0b5 DES |
1041 | }; |
1042 | ||
7ef4227b DES |
1043 | static VMStateDescription vmstate_spitz_kbd = { |
1044 | .name = "spitz-keyboard", | |
1045 | .version_id = 1, | |
1046 | .minimum_version_id = 0, | |
1047 | .minimum_version_id_old = 0, | |
1048 | .post_load = spitz_keyboard_post_load, | |
1049 | .fields = (VMStateField []) { | |
1050 | VMSTATE_UINT16(sense_state, SpitzKeyboardState), | |
1051 | VMSTATE_UINT16(strobe_state, SpitzKeyboardState), | |
1052 | VMSTATE_UNUSED_TEST(is_version_0, 5), | |
1053 | VMSTATE_END_OF_LIST(), | |
1054 | }, | |
1055 | }; | |
1056 | ||
999e12bb AL |
1057 | static Property spitz_keyboard_properties[] = { |
1058 | DEFINE_PROP_END_OF_LIST(), | |
1059 | }; | |
1060 | ||
1061 | static void spitz_keyboard_class_init(ObjectClass *klass, void *data) | |
1062 | { | |
39bffca2 | 1063 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb AL |
1064 | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
1065 | ||
1066 | k->init = spitz_keyboard_init; | |
39bffca2 AL |
1067 | dc->vmsd = &vmstate_spitz_kbd; |
1068 | dc->props = spitz_keyboard_properties; | |
999e12bb AL |
1069 | } |
1070 | ||
8c43a6f0 | 1071 | static const TypeInfo spitz_keyboard_info = { |
73e9d965 | 1072 | .name = TYPE_SPITZ_KEYBOARD, |
39bffca2 AL |
1073 | .parent = TYPE_SYS_BUS_DEVICE, |
1074 | .instance_size = sizeof(SpitzKeyboardState), | |
1075 | .class_init = spitz_keyboard_class_init, | |
7ef4227b DES |
1076 | }; |
1077 | ||
43842120 DES |
1078 | static const VMStateDescription vmstate_corgi_ssp_regs = { |
1079 | .name = "corgi-ssp", | |
66530953 PC |
1080 | .version_id = 2, |
1081 | .minimum_version_id = 2, | |
1082 | .minimum_version_id_old = 2, | |
43842120 | 1083 | .fields = (VMStateField []) { |
66530953 | 1084 | VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState), |
43842120 DES |
1085 | VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), |
1086 | VMSTATE_END_OF_LIST(), | |
1087 | } | |
1088 | }; | |
1089 | ||
cd6c4cf2 AL |
1090 | static void corgi_ssp_class_init(ObjectClass *klass, void *data) |
1091 | { | |
39bffca2 | 1092 | DeviceClass *dc = DEVICE_CLASS(klass); |
cd6c4cf2 AL |
1093 | SSISlaveClass *k = SSI_SLAVE_CLASS(klass); |
1094 | ||
1095 | k->init = corgi_ssp_init; | |
1096 | k->transfer = corgi_ssp_transfer; | |
39bffca2 | 1097 | dc->vmsd = &vmstate_corgi_ssp_regs; |
cd6c4cf2 AL |
1098 | } |
1099 | ||
8c43a6f0 | 1100 | static const TypeInfo corgi_ssp_info = { |
39bffca2 AL |
1101 | .name = "corgi-ssp", |
1102 | .parent = TYPE_SSI_SLAVE, | |
1103 | .instance_size = sizeof(CorgiSSPState), | |
1104 | .class_init = corgi_ssp_class_init, | |
a984a69e PB |
1105 | }; |
1106 | ||
43842120 DES |
1107 | static const VMStateDescription vmstate_spitz_lcdtg_regs = { |
1108 | .name = "spitz-lcdtg", | |
1109 | .version_id = 1, | |
1110 | .minimum_version_id = 1, | |
1111 | .minimum_version_id_old = 1, | |
1112 | .fields = (VMStateField []) { | |
66530953 | 1113 | VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG), |
43842120 DES |
1114 | VMSTATE_UINT32(bl_intensity, SpitzLCDTG), |
1115 | VMSTATE_UINT32(bl_power, SpitzLCDTG), | |
1116 | VMSTATE_END_OF_LIST(), | |
1117 | } | |
1118 | }; | |
1119 | ||
cd6c4cf2 AL |
1120 | static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) |
1121 | { | |
39bffca2 | 1122 | DeviceClass *dc = DEVICE_CLASS(klass); |
cd6c4cf2 AL |
1123 | SSISlaveClass *k = SSI_SLAVE_CLASS(klass); |
1124 | ||
1125 | k->init = spitz_lcdtg_init; | |
1126 | k->transfer = spitz_lcdtg_transfer; | |
39bffca2 | 1127 | dc->vmsd = &vmstate_spitz_lcdtg_regs; |
cd6c4cf2 AL |
1128 | } |
1129 | ||
8c43a6f0 | 1130 | static const TypeInfo spitz_lcdtg_info = { |
39bffca2 AL |
1131 | .name = "spitz-lcdtg", |
1132 | .parent = TYPE_SSI_SLAVE, | |
1133 | .instance_size = sizeof(SpitzLCDTG), | |
1134 | .class_init = spitz_lcdtg_class_init, | |
a984a69e PB |
1135 | }; |
1136 | ||
83f7d43a | 1137 | static void spitz_register_types(void) |
a984a69e | 1138 | { |
39bffca2 AL |
1139 | type_register_static(&corgi_ssp_info); |
1140 | type_register_static(&spitz_lcdtg_info); | |
1141 | type_register_static(&spitz_keyboard_info); | |
1142 | type_register_static(&sl_nand_info); | |
a984a69e PB |
1143 | } |
1144 | ||
83f7d43a | 1145 | type_init(spitz_register_types) |