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Commit | Line | Data |
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5fafdf24 | 1 | /* |
16406950 PB |
2 | * ARM kernel loader. |
3 | * | |
9ee6e8bb | 4 | * Copyright (c) 2006-2007 CodeSourcery. |
16406950 PB |
5 | * Written by Paul Brook |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GPL. |
16406950 PB |
8 | */ |
9 | ||
87ecb68b PB |
10 | #include "hw.h" |
11 | #include "arm-misc.h" | |
12 | #include "sysemu.h" | |
ca20cf32 BS |
13 | #include "loader.h" |
14 | #include "elf.h" | |
16406950 PB |
15 | |
16 | #define KERNEL_ARGS_ADDR 0x100 | |
17 | #define KERNEL_LOAD_ADDR 0x00010000 | |
756ba3b0 | 18 | #define INITRD_LOAD_ADDR 0x00d00000 |
16406950 PB |
19 | |
20 | /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */ | |
21 | static uint32_t bootloader[] = { | |
22 | 0xe3a00000, /* mov r0, #0 */ | |
23 | 0xe3a01000, /* mov r1, #0x?? */ | |
24 | 0xe3811c00, /* orr r1, r1, #0x??00 */ | |
25 | 0xe59f2000, /* ldr r2, [pc, #0] */ | |
26 | 0xe59ff000, /* ldr pc, [pc, #0] */ | |
27 | 0, /* Address of kernel args. Set by integratorcp_init. */ | |
28 | 0 /* Kernel entry point. Set by integratorcp_init. */ | |
29 | }; | |
30 | ||
9ee6e8bb PB |
31 | /* Entry point for secondary CPUs. Enable interrupt controller and |
32 | Issue WFI until start address is written to system controller. */ | |
33 | static uint32_t smpboot[] = { | |
f7c70325 | 34 | 0xe59f0020, /* ldr r0, privbase */ |
9ee6e8bb PB |
35 | 0xe3a01001, /* mov r1, #1 */ |
36 | 0xe5801100, /* str r1, [r0, #0x100] */ | |
37 | 0xe3a00201, /* mov r0, #0x10000000 */ | |
38 | 0xe3800030, /* orr r0, #0x30 */ | |
39 | 0xe320f003, /* wfi */ | |
40 | 0xe5901000, /* ldr r1, [r0] */ | |
be0f204a PB |
41 | 0xe1110001, /* tst r1, r1 */ |
42 | 0x0afffffb, /* beq <wfi> */ | |
f7c70325 PB |
43 | 0xe12fff11, /* bx r1 */ |
44 | 0 /* privbase: Private memory region base address. */ | |
9ee6e8bb PB |
45 | }; |
46 | ||
52b43737 PB |
47 | #define WRITE_WORD(p, value) do { \ |
48 | stl_phys_notdirty(p, value); \ | |
49 | p += 4; \ | |
50 | } while (0) | |
51 | ||
462a8bc6 | 52 | static void set_kernel_args(const struct arm_boot_info *info, |
c227f099 | 53 | int initrd_size, target_phys_addr_t base) |
16406950 | 54 | { |
c227f099 | 55 | target_phys_addr_t p; |
16406950 | 56 | |
52b43737 | 57 | p = base + KERNEL_ARGS_ADDR; |
16406950 | 58 | /* ATAG_CORE */ |
52b43737 PB |
59 | WRITE_WORD(p, 5); |
60 | WRITE_WORD(p, 0x54410001); | |
61 | WRITE_WORD(p, 1); | |
62 | WRITE_WORD(p, 0x1000); | |
63 | WRITE_WORD(p, 0); | |
16406950 | 64 | /* ATAG_MEM */ |
f93eb9ff | 65 | /* TODO: handle multiple chips on one ATAG list */ |
52b43737 PB |
66 | WRITE_WORD(p, 4); |
67 | WRITE_WORD(p, 0x54410002); | |
68 | WRITE_WORD(p, info->ram_size); | |
69 | WRITE_WORD(p, info->loader_start); | |
16406950 PB |
70 | if (initrd_size) { |
71 | /* ATAG_INITRD2 */ | |
52b43737 PB |
72 | WRITE_WORD(p, 4); |
73 | WRITE_WORD(p, 0x54420005); | |
74 | WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR); | |
75 | WRITE_WORD(p, initrd_size); | |
16406950 | 76 | } |
f93eb9ff | 77 | if (info->kernel_cmdline && *info->kernel_cmdline) { |
16406950 PB |
78 | /* ATAG_CMDLINE */ |
79 | int cmdline_size; | |
80 | ||
f93eb9ff | 81 | cmdline_size = strlen(info->kernel_cmdline); |
52b43737 PB |
82 | cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline, |
83 | cmdline_size + 1); | |
16406950 | 84 | cmdline_size = (cmdline_size >> 2) + 1; |
52b43737 PB |
85 | WRITE_WORD(p, cmdline_size + 2); |
86 | WRITE_WORD(p, 0x54410009); | |
87 | p += cmdline_size * 4; | |
16406950 | 88 | } |
f93eb9ff AZ |
89 | if (info->atag_board) { |
90 | /* ATAG_BOARD */ | |
91 | int atag_board_len; | |
52b43737 | 92 | uint8_t atag_board_buf[0x1000]; |
f93eb9ff | 93 | |
52b43737 PB |
94 | atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3; |
95 | WRITE_WORD(p, (atag_board_len + 8) >> 2); | |
96 | WRITE_WORD(p, 0x414f4d50); | |
97 | cpu_physical_memory_write(p, atag_board_buf, atag_board_len); | |
f93eb9ff AZ |
98 | p += atag_board_len; |
99 | } | |
16406950 | 100 | /* ATAG_END */ |
52b43737 PB |
101 | WRITE_WORD(p, 0); |
102 | WRITE_WORD(p, 0); | |
16406950 PB |
103 | } |
104 | ||
462a8bc6 | 105 | static void set_kernel_args_old(const struct arm_boot_info *info, |
c227f099 | 106 | int initrd_size, target_phys_addr_t base) |
2b8f2d41 | 107 | { |
c227f099 | 108 | target_phys_addr_t p; |
52b43737 PB |
109 | const char *s; |
110 | ||
2b8f2d41 AZ |
111 | |
112 | /* see linux/include/asm-arm/setup.h */ | |
52b43737 | 113 | p = base + KERNEL_ARGS_ADDR; |
2b8f2d41 | 114 | /* page_size */ |
52b43737 | 115 | WRITE_WORD(p, 4096); |
2b8f2d41 | 116 | /* nr_pages */ |
52b43737 | 117 | WRITE_WORD(p, info->ram_size / 4096); |
2b8f2d41 | 118 | /* ramdisk_size */ |
52b43737 | 119 | WRITE_WORD(p, 0); |
2b8f2d41 AZ |
120 | #define FLAG_READONLY 1 |
121 | #define FLAG_RDLOAD 4 | |
122 | #define FLAG_RDPROMPT 8 | |
123 | /* flags */ | |
52b43737 | 124 | WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT); |
2b8f2d41 | 125 | /* rootdev */ |
52b43737 | 126 | WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */ |
2b8f2d41 | 127 | /* video_num_cols */ |
52b43737 | 128 | WRITE_WORD(p, 0); |
2b8f2d41 | 129 | /* video_num_rows */ |
52b43737 | 130 | WRITE_WORD(p, 0); |
2b8f2d41 | 131 | /* video_x */ |
52b43737 | 132 | WRITE_WORD(p, 0); |
2b8f2d41 | 133 | /* video_y */ |
52b43737 | 134 | WRITE_WORD(p, 0); |
2b8f2d41 | 135 | /* memc_control_reg */ |
52b43737 | 136 | WRITE_WORD(p, 0); |
2b8f2d41 AZ |
137 | /* unsigned char sounddefault */ |
138 | /* unsigned char adfsdrives */ | |
139 | /* unsigned char bytes_per_char_h */ | |
140 | /* unsigned char bytes_per_char_v */ | |
52b43737 | 141 | WRITE_WORD(p, 0); |
2b8f2d41 | 142 | /* pages_in_bank[4] */ |
52b43737 PB |
143 | WRITE_WORD(p, 0); |
144 | WRITE_WORD(p, 0); | |
145 | WRITE_WORD(p, 0); | |
146 | WRITE_WORD(p, 0); | |
2b8f2d41 | 147 | /* pages_in_vram */ |
52b43737 | 148 | WRITE_WORD(p, 0); |
2b8f2d41 AZ |
149 | /* initrd_start */ |
150 | if (initrd_size) | |
52b43737 | 151 | WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR); |
2b8f2d41 | 152 | else |
52b43737 | 153 | WRITE_WORD(p, 0); |
2b8f2d41 | 154 | /* initrd_size */ |
52b43737 | 155 | WRITE_WORD(p, initrd_size); |
2b8f2d41 | 156 | /* rd_start */ |
52b43737 | 157 | WRITE_WORD(p, 0); |
2b8f2d41 | 158 | /* system_rev */ |
52b43737 | 159 | WRITE_WORD(p, 0); |
2b8f2d41 | 160 | /* system_serial_low */ |
52b43737 | 161 | WRITE_WORD(p, 0); |
2b8f2d41 | 162 | /* system_serial_high */ |
52b43737 | 163 | WRITE_WORD(p, 0); |
2b8f2d41 | 164 | /* mem_fclk_21285 */ |
52b43737 | 165 | WRITE_WORD(p, 0); |
2b8f2d41 | 166 | /* zero unused fields */ |
52b43737 PB |
167 | while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) { |
168 | WRITE_WORD(p, 0); | |
169 | } | |
170 | s = info->kernel_cmdline; | |
171 | if (s) { | |
172 | cpu_physical_memory_write(p, (void *)s, strlen(s) + 1); | |
173 | } else { | |
174 | WRITE_WORD(p, 0); | |
175 | } | |
2b8f2d41 AZ |
176 | } |
177 | ||
6ed221b6 | 178 | static void do_cpu_reset(void *opaque) |
f2d74978 PB |
179 | { |
180 | CPUState *env = opaque; | |
462a8bc6 | 181 | const struct arm_boot_info *info = env->boot_info; |
f2d74978 PB |
182 | |
183 | cpu_reset(env); | |
184 | if (info) { | |
185 | if (!info->is_linux) { | |
186 | /* Jump to the entry point. */ | |
187 | env->regs[15] = info->entry & 0xfffffffe; | |
188 | env->thumb = info->entry & 1; | |
189 | } else { | |
6ed221b6 AL |
190 | if (env == first_cpu) { |
191 | env->regs[15] = info->loader_start; | |
192 | if (old_param) { | |
193 | set_kernel_args_old(info, info->initrd_size, | |
194 | info->loader_start); | |
195 | } else { | |
196 | set_kernel_args(info, info->initrd_size, | |
f2d74978 | 197 | info->loader_start); |
6ed221b6 | 198 | } |
f2d74978 | 199 | } else { |
6ed221b6 | 200 | env->regs[15] = info->smp_loader_start; |
f2d74978 PB |
201 | } |
202 | } | |
203 | } | |
f2d74978 PB |
204 | } |
205 | ||
f93eb9ff | 206 | void arm_load_kernel(CPUState *env, struct arm_boot_info *info) |
16406950 PB |
207 | { |
208 | int kernel_size; | |
209 | int initrd_size; | |
210 | int n; | |
1c7b3754 PB |
211 | int is_linux = 0; |
212 | uint64_t elf_entry; | |
c227f099 | 213 | target_phys_addr_t entry; |
ca20cf32 | 214 | int big_endian; |
16406950 PB |
215 | |
216 | /* Load the kernel. */ | |
f93eb9ff | 217 | if (!info->kernel_filename) { |
16406950 PB |
218 | fprintf(stderr, "Kernel image must be specified\n"); |
219 | exit(1); | |
220 | } | |
daf90626 | 221 | |
f2d74978 PB |
222 | if (info->nb_cpus == 0) |
223 | info->nb_cpus = 1; | |
f93eb9ff | 224 | |
ca20cf32 BS |
225 | #ifdef TARGET_WORDS_BIGENDIAN |
226 | big_endian = 1; | |
227 | #else | |
228 | big_endian = 0; | |
229 | #endif | |
230 | ||
1c7b3754 | 231 | /* Assume that raw images are linux kernels, and ELF images are not. */ |
409dbce5 AJ |
232 | kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry, |
233 | NULL, NULL, big_endian, ELF_MACHINE, 1); | |
1c7b3754 PB |
234 | entry = elf_entry; |
235 | if (kernel_size < 0) { | |
5a9154e0 AL |
236 | kernel_size = load_uimage(info->kernel_filename, &entry, NULL, |
237 | &is_linux); | |
1c7b3754 PB |
238 | } |
239 | if (kernel_size < 0) { | |
f93eb9ff | 240 | entry = info->loader_start + KERNEL_LOAD_ADDR; |
3b760e04 PB |
241 | kernel_size = load_image_targphys(info->kernel_filename, entry, |
242 | ram_size - KERNEL_LOAD_ADDR); | |
1c7b3754 PB |
243 | is_linux = 1; |
244 | } | |
245 | if (kernel_size < 0) { | |
f93eb9ff AZ |
246 | fprintf(stderr, "qemu: could not load kernel '%s'\n", |
247 | info->kernel_filename); | |
1c7b3754 PB |
248 | exit(1); |
249 | } | |
f2d74978 PB |
250 | info->entry = entry; |
251 | if (is_linux) { | |
f93eb9ff | 252 | if (info->initrd_filename) { |
3b760e04 PB |
253 | initrd_size = load_image_targphys(info->initrd_filename, |
254 | info->loader_start | |
255 | + INITRD_LOAD_ADDR, | |
256 | ram_size - INITRD_LOAD_ADDR); | |
daf90626 PB |
257 | if (initrd_size < 0) { |
258 | fprintf(stderr, "qemu: could not load initrd '%s'\n", | |
f93eb9ff | 259 | info->initrd_filename); |
daf90626 PB |
260 | exit(1); |
261 | } | |
262 | } else { | |
263 | initrd_size = 0; | |
264 | } | |
f93eb9ff AZ |
265 | bootloader[1] |= info->board_id & 0xff; |
266 | bootloader[2] |= (info->board_id >> 8) & 0xff; | |
267 | bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR; | |
1c7b3754 | 268 | bootloader[6] = entry; |
52b43737 | 269 | for (n = 0; n < sizeof(bootloader) / 4; n++) { |
f2d74978 | 270 | bootloader[n] = tswap32(bootloader[n]); |
52b43737 | 271 | } |
f2d74978 PB |
272 | rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader), |
273 | info->loader_start); | |
52b43737 | 274 | if (info->nb_cpus > 1) { |
f7c70325 | 275 | smpboot[10] = info->smp_priv_base; |
52b43737 | 276 | for (n = 0; n < sizeof(smpboot) / 4; n++) { |
f2d74978 | 277 | smpboot[n] = tswap32(smpboot[n]); |
52b43737 | 278 | } |
f2d74978 PB |
279 | rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), |
280 | info->smp_loader_start); | |
52b43737 | 281 | } |
f2d74978 | 282 | info->initrd_size = initrd_size; |
16406950 | 283 | } |
f2d74978 | 284 | info->is_linux = is_linux; |
6ed221b6 AL |
285 | |
286 | for (; env; env = env->next_cpu) { | |
287 | env->boot_info = info; | |
288 | qemu_register_reset(do_cpu_reset, env); | |
289 | } | |
16406950 | 290 | } |