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[mirror_qemu.git] / hw / char / debugcon.c
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1/*
2 * QEMU Bochs-style debug console ("port E9") emulation
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
6 * Copyright (c) Intel Corporation; author: H. Peter Anvin
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
b6a0aa05 27#include "qemu/osdep.h"
da34e65c 28#include "qapi/error.h"
83c9f4ca 29#include "hw/hw.h"
4d43a603 30#include "chardev/char-fe.h"
0d09e41a 31#include "hw/isa/isa.h"
c9f398e5 32
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33#define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon"
34#define ISA_DEBUGCON_DEVICE(obj) \
35 OBJECT_CHECK(ISADebugconState, (obj), TYPE_ISA_DEBUGCON_DEVICE)
36
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37//#define DEBUG_DEBUGCON
38
39typedef struct DebugconState {
e8ba1ce9 40 MemoryRegion io;
becdfa00 41 CharBackend chr;
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42 uint32_t readback;
43} DebugconState;
44
45typedef struct ISADebugconState {
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46 ISADevice parent_obj;
47
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48 uint32_t iobase;
49 DebugconState state;
50} ISADebugconState;
51
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52static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val,
53 unsigned width)
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54{
55 DebugconState *s = opaque;
56 unsigned char ch = val;
57
58#ifdef DEBUG_DEBUGCON
668fca91 59 printf(" [debugcon: write addr=0x%04" HWADDR_PRIx " val=0x%02" PRIx64 "]\n", addr, val);
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60#endif
61
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62 /* XXX this blocks entire thread. Rewrite to use
63 * qemu_chr_fe_write and background I/O callbacks */
5345fdb4 64 qemu_chr_fe_write_all(&s->chr, &ch, 1);
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65}
66
67
e8ba1ce9 68static uint64_t debugcon_ioport_read(void *opaque, hwaddr addr, unsigned width)
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69{
70 DebugconState *s = opaque;
71
72#ifdef DEBUG_DEBUGCON
668fca91 73 printf("debugcon: read addr=0x%04" HWADDR_PRIx "\n", addr);
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74#endif
75
76 return s->readback;
77}
78
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79static const MemoryRegionOps debugcon_ops = {
80 .read = debugcon_ioport_read,
81 .write = debugcon_ioport_write,
82 .valid.min_access_size = 1,
83 .valid.max_access_size = 1,
84 .endianness = DEVICE_LITTLE_ENDIAN,
85};
86
db895a1e 87static void debugcon_realize_core(DebugconState *s, Error **errp)
c9f398e5 88{
30650701 89 if (!qemu_chr_fe_backend_connected(&s->chr)) {
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90 error_setg(errp, "Can't create debugcon device, empty char device");
91 return;
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92 }
93
81517ba3 94 qemu_chr_fe_set_handlers(&s->chr, NULL, NULL, NULL, NULL, s, NULL, true);
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95}
96
db895a1e 97static void debugcon_isa_realizefn(DeviceState *dev, Error **errp)
c9f398e5 98{
db895a1e 99 ISADevice *d = ISA_DEVICE(dev);
e8ba1ce9 100 ISADebugconState *isa = ISA_DEBUGCON_DEVICE(dev);
c9f398e5 101 DebugconState *s = &isa->state;
db895a1e 102 Error *err = NULL;
c9f398e5 103
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104 debugcon_realize_core(s, &err);
105 if (err != NULL) {
106 error_propagate(errp, err);
107 return;
108 }
300b1fc6 109 memory_region_init_io(&s->io, OBJECT(dev), &debugcon_ops, s,
e8ba1ce9 110 TYPE_ISA_DEBUGCON_DEVICE, 1);
db895a1e 111 memory_region_add_subregion(isa_address_space_io(d),
e8ba1ce9 112 isa->iobase, &s->io);
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113}
114
39bffca2 115static Property debugcon_isa_properties[] = {
c7bcc85d 116 DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9),
39bffca2 117 DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
c7bcc85d 118 DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9),
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119 DEFINE_PROP_END_OF_LIST(),
120};
121
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122static void debugcon_isa_class_initfn(ObjectClass *klass, void *data)
123{
39bffca2 124 DeviceClass *dc = DEVICE_CLASS(klass);
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125
126 dc->realize = debugcon_isa_realizefn;
39bffca2 127 dc->props = debugcon_isa_properties;
125ee0ed 128 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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129}
130
8c43a6f0 131static const TypeInfo debugcon_isa_info = {
e8ba1ce9 132 .name = TYPE_ISA_DEBUGCON_DEVICE,
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133 .parent = TYPE_ISA_DEVICE,
134 .instance_size = sizeof(ISADebugconState),
135 .class_init = debugcon_isa_class_initfn,
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136};
137
83f7d43a 138static void debugcon_register_types(void)
c9f398e5 139{
39bffca2 140 type_register_static(&debugcon_isa_info);
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141}
142
83f7d43a 143type_init(debugcon_register_types)