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488cb996 GH |
1 | /* |
2 | * QEMU 16550A UART emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2008 Citrix Systems, Inc. | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
b6a0aa05 | 26 | #include "qemu/osdep.h" |
da34e65c | 27 | #include "qapi/error.h" |
0b8fa32f | 28 | #include "qemu/module.h" |
46517dd4 | 29 | #include "sysemu/sysemu.h" |
0d170dc1 | 30 | #include "hw/acpi/acpi_aml_interface.h" |
0d09e41a PB |
31 | #include "hw/char/serial.h" |
32 | #include "hw/isa/isa.h" | |
a27bd6c7 | 33 | #include "hw/qdev-properties.h" |
d6454270 | 34 | #include "migration/vmstate.h" |
db1015e9 | 35 | #include "qom/object.h" |
488cb996 | 36 | |
8063396b | 37 | OBJECT_DECLARE_SIMPLE_TYPE(ISASerialState, ISA_SERIAL) |
eeceb084 | 38 | |
db1015e9 | 39 | struct ISASerialState { |
eeceb084 AF |
40 | ISADevice parent_obj; |
41 | ||
488cb996 GH |
42 | uint32_t index; |
43 | uint32_t iobase; | |
44 | uint32_t isairq; | |
45 | SerialState state; | |
db1015e9 | 46 | }; |
488cb996 | 47 | |
def337ff | 48 | static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = { |
488cb996 GH |
49 | 0x3f8, 0x2f8, 0x3e8, 0x2e8 |
50 | }; | |
def337ff | 51 | static const int isa_serial_irq[MAX_ISA_SERIAL_PORTS] = { |
488cb996 GH |
52 | 4, 3, 4, 3 |
53 | }; | |
54 | ||
db895a1e | 55 | static void serial_isa_realizefn(DeviceState *dev, Error **errp) |
488cb996 GH |
56 | { |
57 | static int index; | |
db895a1e | 58 | ISADevice *isadev = ISA_DEVICE(dev); |
eeceb084 | 59 | ISASerialState *isa = ISA_SERIAL(dev); |
488cb996 GH |
60 | SerialState *s = &isa->state; |
61 | ||
62 | if (isa->index == -1) { | |
63 | isa->index = index; | |
64 | } | |
def337ff | 65 | if (isa->index >= MAX_ISA_SERIAL_PORTS) { |
db895a1e | 66 | error_setg(errp, "Max. supported number of ISA serial ports is %d.", |
def337ff | 67 | MAX_ISA_SERIAL_PORTS); |
db895a1e | 68 | return; |
488cb996 GH |
69 | } |
70 | if (isa->iobase == -1) { | |
71 | isa->iobase = isa_serial_io[isa->index]; | |
72 | } | |
73 | if (isa->isairq == -1) { | |
74 | isa->isairq = isa_serial_irq[isa->index]; | |
75 | } | |
76 | index++; | |
77 | ||
215caca6 | 78 | s->irq = isa_get_irq(isadev, isa->isairq); |
ce189ab2 | 79 | qdev_realize(DEVICE(s), NULL, errp); |
db895a1e | 80 | qdev_set_legacy_instance_id(dev, isa->iobase, 3); |
488cb996 | 81 | |
300b1fc6 | 82 | memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8); |
db895a1e | 83 | isa_register_ioport(isadev, &s->io, isa->iobase); |
488cb996 GH |
84 | } |
85 | ||
0d170dc1 | 86 | static void serial_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope) |
dcdbfaaf | 87 | { |
0d170dc1 | 88 | ISASerialState *isa = ISA_SERIAL(adev); |
dcdbfaaf GH |
89 | Aml *dev; |
90 | Aml *crs; | |
91 | ||
92 | crs = aml_resource_template(); | |
93 | aml_append(crs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, 0x08)); | |
94 | aml_append(crs, aml_irq_no_flags(isa->isairq)); | |
95 | ||
96 | dev = aml_device("COM%d", isa->index + 1); | |
97 | aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0501"))); | |
98 | aml_append(dev, aml_name_decl("_UID", aml_int(isa->index + 1))); | |
99 | aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); | |
100 | aml_append(dev, aml_name_decl("_CRS", crs)); | |
101 | ||
102 | aml_append(scope, dev); | |
103 | } | |
104 | ||
488cb996 GH |
105 | static const VMStateDescription vmstate_isa_serial = { |
106 | .name = "serial", | |
107 | .version_id = 3, | |
108 | .minimum_version_id = 2, | |
2f6cab05 | 109 | .fields = (const VMStateField[]) { |
488cb996 GH |
110 | VMSTATE_STRUCT(state, ISASerialState, 0, vmstate_serial, SerialState), |
111 | VMSTATE_END_OF_LIST() | |
112 | } | |
113 | }; | |
114 | ||
115 | static Property serial_isa_properties[] = { | |
116 | DEFINE_PROP_UINT32("index", ISASerialState, index, -1), | |
c7bcc85d | 117 | DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1), |
488cb996 | 118 | DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1), |
488cb996 GH |
119 | DEFINE_PROP_END_OF_LIST(), |
120 | }; | |
121 | ||
122 | static void serial_isa_class_initfn(ObjectClass *klass, void *data) | |
123 | { | |
124 | DeviceClass *dc = DEVICE_CLASS(klass); | |
0d170dc1 | 125 | AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); |
db895a1e AF |
126 | |
127 | dc->realize = serial_isa_realizefn; | |
488cb996 | 128 | dc->vmsd = &vmstate_isa_serial; |
0d170dc1 | 129 | adevc->build_dev_aml = serial_isa_build_aml; |
4f67d30b | 130 | device_class_set_props(dc, serial_isa_properties); |
125ee0ed | 131 | set_bit(DEVICE_CATEGORY_INPUT, dc->categories); |
488cb996 GH |
132 | } |
133 | ||
7781b88e MAL |
134 | static void serial_isa_initfn(Object *o) |
135 | { | |
136 | ISASerialState *self = ISA_SERIAL(o); | |
137 | ||
9fc7fc4d | 138 | object_initialize_child(o, "serial", &self->state, TYPE_SERIAL); |
b7dd40d4 PMD |
139 | |
140 | qdev_alias_all_properties(DEVICE(&self->state), o); | |
7781b88e MAL |
141 | } |
142 | ||
8c43a6f0 | 143 | static const TypeInfo serial_isa_info = { |
eeceb084 | 144 | .name = TYPE_ISA_SERIAL, |
488cb996 GH |
145 | .parent = TYPE_ISA_DEVICE, |
146 | .instance_size = sizeof(ISASerialState), | |
7781b88e | 147 | .instance_init = serial_isa_initfn, |
488cb996 | 148 | .class_init = serial_isa_class_initfn, |
0d170dc1 IM |
149 | .interfaces = (InterfaceInfo[]) { |
150 | { TYPE_ACPI_DEV_AML_IF }, | |
151 | { }, | |
152 | }, | |
488cb996 GH |
153 | }; |
154 | ||
155 | static void serial_register_types(void) | |
156 | { | |
157 | type_register_static(&serial_isa_info); | |
158 | } | |
159 | ||
160 | type_init(serial_register_types) | |
161 | ||
0ec7b3e7 | 162 | static void serial_isa_init(ISABus *bus, int index, Chardev *chr) |
488cb996 | 163 | { |
4a17cc4f AF |
164 | DeviceState *dev; |
165 | ISADevice *isadev; | |
488cb996 | 166 | |
96927c74 | 167 | isadev = isa_new(TYPE_ISA_SERIAL); |
4a17cc4f AF |
168 | dev = DEVICE(isadev); |
169 | qdev_prop_set_uint32(dev, "index", index); | |
170 | qdev_prop_set_chr(dev, "chardev", chr); | |
96927c74 | 171 | isa_realize_and_unref(isadev, bus, &error_fatal); |
488cb996 | 172 | } |
b6607a1a | 173 | |
4496dc49 | 174 | void serial_hds_isa_init(ISABus *bus, int from, int to) |
b6607a1a MA |
175 | { |
176 | int i; | |
177 | ||
4496dc49 | 178 | assert(from >= 0); |
def337ff | 179 | assert(to <= MAX_ISA_SERIAL_PORTS); |
b6607a1a | 180 | |
4496dc49 | 181 | for (i = from; i < to; ++i) { |
9bca0edb PM |
182 | if (serial_hd(i)) { |
183 | serial_isa_init(bus, i, serial_hd(i)); | |
b6607a1a MA |
184 | } |
185 | } | |
186 | } | |
7812dbc5 BB |
187 | |
188 | void isa_serial_set_iobase(ISADevice *serial, hwaddr iobase) | |
189 | { | |
190 | ISASerialState *s = ISA_SERIAL(serial); | |
191 | ||
192 | serial->ioport_id = iobase; | |
193 | s->iobase = iobase; | |
194 | memory_region_set_address(&s->state.io, s->iobase); | |
195 | } | |
196 | ||
197 | void isa_serial_set_enabled(ISADevice *serial, bool enabled) | |
198 | { | |
199 | memory_region_set_enabled(&ISA_SERIAL(serial)->state.io, enabled); | |
200 | } |