]>
Commit | Line | Data |
---|---|---|
dd83b06a AF |
1 | /* |
2 | * QEMU CPU model | |
3 | * | |
1590bbcb | 4 | * Copyright (c) 2012-2014 SUSE LINUX Products GmbH |
dd83b06a AF |
5 | * |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see | |
18 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
19 | */ | |
20 | ||
1ef26b1f | 21 | #include "qemu/osdep.h" |
da34e65c | 22 | #include "qapi/error.h" |
2e5b09fd | 23 | #include "hw/core/cpu.h" |
b3946626 | 24 | #include "sysemu/hw_accel.h" |
066e9b27 | 25 | #include "qemu/notify.h" |
91b1df8c | 26 | #include "qemu/log.h" |
db725815 | 27 | #include "qemu/main-loop.h" |
508127e2 | 28 | #include "exec/log.h" |
4a795202 | 29 | #include "exec/cpu-common.h" |
9262685b | 30 | #include "qemu/error-report.h" |
90c84c56 | 31 | #include "qemu/qemu-print.h" |
14a48c1d | 32 | #include "sysemu/tcg.h" |
ed860129 | 33 | #include "hw/boards.h" |
62a48a2a | 34 | #include "hw/qdev-properties.h" |
78f314cf | 35 | #include "trace.h" |
30865f31 | 36 | #include "qemu/plugin.h" |
066e9b27 | 37 | |
5ce46cb3 | 38 | CPUState *cpu_by_arch_id(int64_t id) |
69e5ff06 | 39 | { |
38fcbd3f AF |
40 | CPUState *cpu; |
41 | ||
42 | CPU_FOREACH(cpu) { | |
43 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
69e5ff06 | 44 | |
38fcbd3f | 45 | if (cc->get_arch_id(cpu) == id) { |
5ce46cb3 | 46 | return cpu; |
38fcbd3f AF |
47 | } |
48 | } | |
5ce46cb3 EH |
49 | return NULL; |
50 | } | |
51 | ||
52 | bool cpu_exists(int64_t id) | |
53 | { | |
54 | return !!cpu_by_arch_id(id); | |
69e5ff06 IM |
55 | } |
56 | ||
3c72234c IM |
57 | CPUState *cpu_create(const char *typename) |
58 | { | |
59 | Error *err = NULL; | |
60 | CPUState *cpu = CPU(object_new(typename)); | |
118bfd76 | 61 | if (!qdev_realize(DEVICE(cpu), NULL, &err)) { |
3c72234c IM |
62 | error_report_err(err); |
63 | object_unref(OBJECT(cpu)); | |
4482e05c | 64 | exit(EXIT_FAILURE); |
3c72234c IM |
65 | } |
66 | return cpu; | |
67 | } | |
68 | ||
8d04fb55 JK |
69 | /* Resetting the IRQ comes from across the code base so we take the |
70 | * BQL here if we need to. cpu_interrupt assumes it is held.*/ | |
d8ed887b AF |
71 | void cpu_reset_interrupt(CPUState *cpu, int mask) |
72 | { | |
195801d7 | 73 | bool need_lock = !bql_locked(); |
8d04fb55 JK |
74 | |
75 | if (need_lock) { | |
195801d7 | 76 | bql_lock(); |
8d04fb55 | 77 | } |
d8ed887b | 78 | cpu->interrupt_request &= ~mask; |
8d04fb55 | 79 | if (need_lock) { |
195801d7 | 80 | bql_unlock(); |
8d04fb55 | 81 | } |
d8ed887b AF |
82 | } |
83 | ||
60a3e17a AF |
84 | void cpu_exit(CPUState *cpu) |
85 | { | |
d73415a3 | 86 | qatomic_set(&cpu->exit_request, 1); |
ab096a75 PB |
87 | /* Ensure cpu_exec will see the exit request after TCG has exited. */ |
88 | smp_wmb(); | |
e62de981 | 89 | qatomic_set(&cpu->neg.icount_decr.u16.high, -1); |
60a3e17a AF |
90 | } |
91 | ||
a010bdbe | 92 | static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) |
5b50e790 AF |
93 | { |
94 | return 0; | |
95 | } | |
96 | ||
97 | static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) | |
98 | { | |
99 | return 0; | |
100 | } | |
101 | ||
90c84c56 | 102 | void cpu_dump_state(CPUState *cpu, FILE *f, int flags) |
878096ee AF |
103 | { |
104 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
105 | ||
106 | if (cc->dump_state) { | |
97577fd4 | 107 | cpu_synchronize_state(cpu); |
90c84c56 | 108 | cc->dump_state(cpu, f, flags); |
878096ee AF |
109 | } |
110 | } | |
111 | ||
dd83b06a AF |
112 | void cpu_reset(CPUState *cpu) |
113 | { | |
781c67ca | 114 | device_cold_reset(DEVICE(cpu)); |
2cc2d082 | 115 | |
78f314cf | 116 | trace_cpu_reset(cpu->cpu_index); |
dd83b06a AF |
117 | } |
118 | ||
3b750f1b | 119 | static void cpu_common_reset_hold(Object *obj) |
dd83b06a | 120 | { |
3b750f1b | 121 | CPUState *cpu = CPU(obj); |
91b1df8c AF |
122 | CPUClass *cc = CPU_GET_CLASS(cpu); |
123 | ||
124 | if (qemu_loglevel_mask(CPU_LOG_RESET)) { | |
125 | qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index); | |
126 | log_cpu_state(cpu, cc->reset_dump_flags); | |
127 | } | |
128 | ||
259186a7 | 129 | cpu->interrupt_request = 0; |
6ad1da66 | 130 | cpu->halted = cpu->start_powered_off; |
93afeade | 131 | cpu->mem_io_pc = 0; |
efee7340 | 132 | cpu->icount_extra = 0; |
e62de981 | 133 | qatomic_set(&cpu->neg.icount_decr.u32, 0); |
464dacf6 | 134 | cpu->neg.can_do_io = true; |
f9d8f667 | 135 | cpu->exception_index = -1; |
bac05aa9 | 136 | cpu->crash_occurred = false; |
9b990ee5 | 137 | cpu->cflags_next_tb = -1; |
ce7cf6a9 | 138 | |
1b5120d7 | 139 | cpu_exec_reset_hold(cpu); |
dd83b06a AF |
140 | } |
141 | ||
8c2e1b00 AF |
142 | static bool cpu_common_has_work(CPUState *cs) |
143 | { | |
144 | return false; | |
145 | } | |
146 | ||
2b8c2754 AF |
147 | ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) |
148 | { | |
3a9d0d7b PMD |
149 | ObjectClass *oc; |
150 | CPUClass *cc; | |
151 | ||
152 | oc = object_class_by_name(typename); | |
153 | cc = CPU_CLASS(oc); | |
154 | assert(cc->class_by_name); | |
155 | assert(cpu_model); | |
156 | oc = cc->class_by_name(cpu_model); | |
d5be19f5 PMD |
157 | if (object_class_dynamic_cast(oc, typename) && |
158 | !object_class_is_abstract(oc)) { | |
159 | return oc; | |
3a9d0d7b | 160 | } |
d5be19f5 PMD |
161 | |
162 | return NULL; | |
2b8c2754 AF |
163 | } |
164 | ||
62a48a2a | 165 | static void cpu_common_parse_features(const char *typename, char *features, |
1590bbcb AF |
166 | Error **errp) |
167 | { | |
1590bbcb | 168 | char *val; |
62a48a2a | 169 | static bool cpu_globals_initialized; |
2278b939 IM |
170 | /* Single "key=value" string being parsed */ |
171 | char *featurestr = features ? strtok(features, ",") : NULL; | |
62a48a2a | 172 | |
2278b939 IM |
173 | /* should be called only once, catch invalid users */ |
174 | assert(!cpu_globals_initialized); | |
62a48a2a | 175 | cpu_globals_initialized = true; |
1590bbcb | 176 | |
1590bbcb AF |
177 | while (featurestr) { |
178 | val = strchr(featurestr, '='); | |
179 | if (val) { | |
62a48a2a | 180 | GlobalProperty *prop = g_new0(typeof(*prop), 1); |
1590bbcb AF |
181 | *val = 0; |
182 | val++; | |
62a48a2a IM |
183 | prop->driver = typename; |
184 | prop->property = g_strdup(featurestr); | |
185 | prop->value = g_strdup(val); | |
62a48a2a | 186 | qdev_prop_register_global(prop); |
1590bbcb AF |
187 | } else { |
188 | error_setg(errp, "Expected key=value format, found %s.", | |
189 | featurestr); | |
190 | return; | |
191 | } | |
192 | featurestr = strtok(NULL, ","); | |
193 | } | |
194 | } | |
195 | ||
4f658099 AF |
196 | static void cpu_common_realizefn(DeviceState *dev, Error **errp) |
197 | { | |
13eed94e | 198 | CPUState *cpu = CPU(dev); |
ed860129 PM |
199 | Object *machine = qdev_get_machine(); |
200 | ||
201 | /* qdev_get_machine() can return something that's not TYPE_MACHINE | |
202 | * if this is one of the user-only emulators; in that case there's | |
203 | * no need to check the ignore_memory_transaction_failures board flag. | |
204 | */ | |
205 | if (object_dynamic_cast(machine, TYPE_MACHINE)) { | |
bec552e2 | 206 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
ed860129 PM |
207 | |
208 | if (mc) { | |
209 | cpu->ignore_memory_transaction_failures = | |
210 | mc->ignore_memory_transaction_failures; | |
211 | } | |
212 | } | |
13eed94e IM |
213 | |
214 | if (dev->hotplugged) { | |
215 | cpu_synchronize_post_init(cpu); | |
6afb4721 | 216 | cpu_resume(cpu); |
13eed94e | 217 | } |
2bfe11c8 | 218 | |
b4ff2128 AO |
219 | /* Plugin initialization must wait until the cpu is fully realized. */ |
220 | if (tcg_enabled()) { | |
221 | qemu_plugin_vcpu_init_hook(cpu); | |
222 | } | |
223 | ||
2bfe11c8 | 224 | /* NOTE: latest generic point where the cpu is fully realized */ |
4f658099 AF |
225 | } |
226 | ||
b69c3c21 | 227 | static void cpu_common_unrealizefn(DeviceState *dev) |
7bbc124e LV |
228 | { |
229 | CPUState *cpu = CPU(dev); | |
7df5e3d6 | 230 | |
b4ff2128 AO |
231 | /* Call the plugin hook before clearing the cpu is fully unrealized */ |
232 | if (tcg_enabled()) { | |
233 | qemu_plugin_vcpu_exit_hook(cpu); | |
234 | } | |
235 | ||
82e95ec8 | 236 | /* NOTE: latest generic point before the cpu is fully unrealized */ |
7bbc124e LV |
237 | cpu_exec_unrealizefn(cpu); |
238 | } | |
239 | ||
a0e372f0 AF |
240 | static void cpu_common_initfn(Object *obj) |
241 | { | |
242 | CPUState *cpu = CPU(obj); | |
243 | CPUClass *cc = CPU_GET_CLASS(obj); | |
244 | ||
a07f953e | 245 | cpu->cpu_index = UNASSIGNED_CPU_INDEX; |
7ea7b9ad | 246 | cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX; |
35143f01 | 247 | cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs; |
54b99122 PMD |
248 | /* user-mode doesn't have configurable SMP topology */ |
249 | /* the default value is changed by qemu_init_vcpu() for system-mode */ | |
fa5376dd MAL |
250 | cpu->nr_cores = 1; |
251 | cpu->nr_threads = 1; | |
c8cc6879 | 252 | cpu->cflags_next_tb = -1; |
fa5376dd | 253 | |
376692b9 | 254 | qemu_mutex_init(&cpu->work_mutex); |
bd688fc9 | 255 | qemu_lockcnt_init(&cpu->in_ioctl_lock); |
0c0fcc20 | 256 | QSIMPLEQ_INIT(&cpu->work_list); |
7c39163e EH |
257 | QTAILQ_INIT(&cpu->breakpoints); |
258 | QTAILQ_INIT(&cpu->watchpoints); | |
b7d48952 | 259 | |
39e329e3 | 260 | cpu_exec_initfn(cpu); |
a0e372f0 AF |
261 | } |
262 | ||
b7bca733 BR |
263 | static void cpu_common_finalize(Object *obj) |
264 | { | |
611dbe46 LQ |
265 | CPUState *cpu = CPU(obj); |
266 | ||
bd688fc9 | 267 | qemu_lockcnt_destroy(&cpu->in_ioctl_lock); |
611dbe46 | 268 | qemu_mutex_destroy(&cpu->work_mutex); |
b7bca733 BR |
269 | } |
270 | ||
997395d3 IM |
271 | static int64_t cpu_common_get_arch_id(CPUState *cpu) |
272 | { | |
273 | return cpu->cpu_index; | |
274 | } | |
275 | ||
dd83b06a AF |
276 | static void cpu_class_init(ObjectClass *klass, void *data) |
277 | { | |
961f8395 | 278 | DeviceClass *dc = DEVICE_CLASS(klass); |
3b750f1b | 279 | ResettableClass *rc = RESETTABLE_CLASS(klass); |
dd83b06a AF |
280 | CPUClass *k = CPU_CLASS(klass); |
281 | ||
1590bbcb | 282 | k->parse_features = cpu_common_parse_features; |
997395d3 | 283 | k->get_arch_id = cpu_common_get_arch_id; |
8c2e1b00 | 284 | k->has_work = cpu_common_has_work; |
5b50e790 AF |
285 | k->gdb_read_register = cpu_common_gdb_read_register; |
286 | k->gdb_write_register = cpu_common_gdb_write_register; | |
ba31cc72 | 287 | set_bit(DEVICE_CATEGORY_CPU, dc->categories); |
4f658099 | 288 | dc->realize = cpu_common_realizefn; |
7bbc124e | 289 | dc->unrealize = cpu_common_unrealizefn; |
3b750f1b | 290 | rc->phases.hold = cpu_common_reset_hold; |
995b87de | 291 | cpu_class_init_props(dc); |
ffa95714 MA |
292 | /* |
293 | * Reason: CPUs still need special care by board code: wiring up | |
294 | * IRQs, adding reset handlers, halting non-first CPUs, ... | |
295 | */ | |
e90f2a8c | 296 | dc->user_creatable = false; |
dd83b06a AF |
297 | } |
298 | ||
961f8395 | 299 | static const TypeInfo cpu_type_info = { |
dd83b06a | 300 | .name = TYPE_CPU, |
961f8395 | 301 | .parent = TYPE_DEVICE, |
dd83b06a | 302 | .instance_size = sizeof(CPUState), |
a0e372f0 | 303 | .instance_init = cpu_common_initfn, |
b7bca733 | 304 | .instance_finalize = cpu_common_finalize, |
dd83b06a AF |
305 | .abstract = true, |
306 | .class_size = sizeof(CPUClass), | |
307 | .class_init = cpu_class_init, | |
308 | }; | |
309 | ||
310 | static void cpu_register_types(void) | |
311 | { | |
312 | type_register_static(&cpu_type_info); | |
313 | } | |
314 | ||
315 | type_init(cpu_register_types) |