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Commit | Line | Data |
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36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
6f479566 LX |
14 | #include "qemu/option.h" |
15 | #include "qapi/qmp/qerror.h" | |
16 | #include "sysemu/replay.h" | |
fc6b3cf9 | 17 | #include "qemu/units.h" |
36d20cb2 | 18 | #include "hw/boards.h" |
f66dc873 | 19 | #include "hw/loader.h" |
da34e65c | 20 | #include "qapi/error.h" |
9af23989 | 21 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 22 | #include "qapi/visitor.h" |
33cd52b5 | 23 | #include "hw/sysbus.h" |
f66dc873 | 24 | #include "sysemu/cpus.h" |
33cd52b5 | 25 | #include "sysemu/sysemu.h" |
f66dc873 PB |
26 | #include "sysemu/reset.h" |
27 | #include "sysemu/runstate.h" | |
3bfe5716 | 28 | #include "sysemu/numa.h" |
33cd52b5 | 29 | #include "qemu/error-report.h" |
c6ff347c | 30 | #include "sysemu/qtest.h" |
edc24ccd | 31 | #include "hw/pci/pci.h" |
f6a0d06b | 32 | #include "hw/mem/nvdimm.h" |
f66dc873 | 33 | #include "migration/global_state.h" |
82b911aa | 34 | #include "migration/vmstate.h" |
e0292d7c | 35 | #include "exec/confidential-guest-support.h" |
9f88a7a3 DG |
36 | #include "hw/virtio/virtio.h" |
37 | #include "hw/virtio/virtio-pci.h" | |
6b1b1440 | 38 | |
576a00bd CH |
39 | GlobalProperty hw_compat_5_2[] = {}; |
40 | const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); | |
41 | ||
6a558822 SH |
42 | GlobalProperty hw_compat_5_1[] = { |
43 | { "vhost-scsi", "num_queues", "1"}, | |
a4eef071 | 44 | { "vhost-user-blk", "num-queues", "1"}, |
6a558822 | 45 | { "vhost-user-scsi", "num_queues", "1"}, |
9445e1e1 | 46 | { "virtio-blk-device", "num-queues", "1"}, |
6a558822 | 47 | { "virtio-scsi-device", "num_queues", "1"}, |
6eb7a071 | 48 | { "nvme", "use-intel-id", "on"}, |
b1b0393c | 49 | { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ |
6a558822 | 50 | }; |
3ff3c5d3 CH |
51 | const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); |
52 | ||
7483cbba | 53 | GlobalProperty hw_compat_5_0[] = { |
2ebc2121 | 54 | { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, |
7483cbba | 55 | { "virtio-balloon-device", "page-poison", "false" }, |
f983ff95 PB |
56 | { "vmport", "x-read-set-eax", "off" }, |
57 | { "vmport", "x-signal-unsupported-cmd", "off" }, | |
58 | { "vmport", "x-report-vmx-type", "off" }, | |
59 | { "vmport", "x-cmds-v2", "off" }, | |
d55f5182 | 60 | { "virtio-device", "x-disable-legacy-check", "true" }, |
7483cbba | 61 | }; |
541aaa1d CH |
62 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
63 | ||
5f258577 | 64 | GlobalProperty hw_compat_4_2[] = { |
c9b7d9ec DP |
65 | { "virtio-blk-device", "queue-size", "128"}, |
66 | { "virtio-scsi-device", "virtqueue_size", "128"}, | |
5f258577 | 67 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
1bf8a989 DP |
68 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
69 | { "virtio-scsi-device", "seg_max_adjust", "off"}, | |
70 | { "vhost-blk-device", "seg_max_adjust", "off"}, | |
7bacaf5f | 71 | { "usb-host", "suppress-remote-wake", "off" }, |
32187f3d | 72 | { "usb-redir", "suppress-remote-wake", "off" }, |
ed71c09f GH |
73 | { "qxl", "revision", "4" }, |
74 | { "qxl-vga", "revision", "4" }, | |
394f0f72 | 75 | { "fw_cfg", "acpi-mr-restore", "false" }, |
c126b4c5 | 76 | { "virtio-device", "use-disabled-flag", "false" }, |
5f258577 EY |
77 | }; |
78 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); | |
79 | ||
eb1556c4 JS |
80 | GlobalProperty hw_compat_4_1[] = { |
81 | { "virtio-pci", "x-pcie-flr-init", "off" }, | |
82 | }; | |
9aec2e52 CH |
83 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
84 | ||
8e8cbed0 | 85 | GlobalProperty hw_compat_4_0[] = { |
0a719662 GH |
86 | { "VGA", "edid", "false" }, |
87 | { "secondary-vga", "edid", "false" }, | |
88 | { "bochs-display", "edid", "false" }, | |
89 | { "virtio-vga", "edid", "false" }, | |
02501fc3 | 90 | { "virtio-gpu-device", "edid", "false" }, |
e57f2c31 | 91 | { "virtio-device", "use-started", "false" }, |
2bbadb08 | 92 | { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, |
032cfe6a | 93 | { "pl031", "migrate-tick-offset", "false" }, |
0a719662 | 94 | }; |
9bf2650b CH |
95 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); |
96 | ||
abd93cc7 | 97 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
98 | { "pcie-root-port", "x-speed", "2_5" }, |
99 | { "pcie-root-port", "x-width", "1" }, | |
100 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
101 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
102 | { "tpm-crb", "ppi", "false" }, |
103 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
104 | { "usb-kbd", "serial", "42" }, |
105 | { "usb-mouse", "serial", "42" }, | |
442bac16 | 106 | { "usb-tablet", "serial", "42" }, |
5c81161f SG |
107 | { "virtio-blk-device", "discard", "false" }, |
108 | { "virtio-blk-device", "write-zeroes", "false" }, | |
2bbadb08 | 109 | { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, |
c8557f1b | 110 | { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ |
abd93cc7 MAL |
111 | }; |
112 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
113 | ||
ddb3235d MAL |
114 | GlobalProperty hw_compat_3_0[] = {}; |
115 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
116 | ||
0d47310b | 117 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
118 | { "migration", "decompress-error-check", "off" }, |
119 | { "hda-audio", "use-timer", "false" }, | |
120 | { "cirrus-vga", "global-vmstate", "true" }, | |
121 | { "VGA", "global-vmstate", "true" }, | |
122 | { "vmware-svga", "global-vmstate", "true" }, | |
123 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
124 | }; |
125 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
126 | ||
43df70a9 | 127 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
128 | { "hpet", "hpet-offset-saved", "false" }, |
129 | { "virtio-blk-pci", "vectors", "2" }, | |
130 | { "vhost-user-blk-pci", "vectors", "2" }, | |
131 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
132 | }; |
133 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
134 | ||
503224f4 | 135 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
136 | { "virtio-mouse-device", "wheel-axis", "false" }, |
137 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
138 | }; |
139 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
140 | ||
3e803152 | 141 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
142 | { "pci-bridge", "shpc", "off" }, |
143 | { "intel-iommu", "pt", "off" }, | |
144 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
145 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
146 | }; |
147 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
148 | ||
edc24ccd | 149 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
150 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
151 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
152 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
153 | { "pci-bridge", "shpc", "on" }, | |
154 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
155 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
156 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
157 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
158 | { "cirrus-vga", "vgamem_mb", "8" }, | |
159 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
160 | }; |
161 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
162 | ||
5a995064 | 163 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
164 | { "virtio-pci", "page-per-vq", "on" }, |
165 | { "virtio-serial-device", "emergency-write", "off" }, | |
166 | { "ioapic", "version", "0x11" }, | |
167 | { "intel-iommu", "x-buggy-eim", "true" }, | |
168 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
169 | }; |
170 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
171 | ||
ff8f261f | 172 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 173 | { "virtio-mmio", "format_transport_address", "off" }, |
dd56040d DDAG |
174 | /* Optional because not all virtio-pci devices support legacy mode */ |
175 | { "virtio-pci", "disable-modern", "on", .optional = true }, | |
176 | { "virtio-pci", "disable-legacy", "off", .optional = true }, | |
ff8f261f MAL |
177 | }; |
178 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
179 | ||
fe759610 | 180 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
181 | { "isa-fdc", "fallback", "144" }, |
182 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
183 | { "pvscsi", "x-disable-pcie", "on" }, | |
184 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
185 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
186 | }; |
187 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
188 | ||
2f99b9c2 | 189 | GlobalProperty hw_compat_2_4[] = { |
11a18c84 PMD |
190 | /* Optional because the 'scsi' property is Linux-only */ |
191 | { "virtio-blk-device", "scsi", "true", .optional = true }, | |
6c36bddf EH |
192 | { "e1000", "extra_mac_registers", "off" }, |
193 | { "virtio-pci", "x-disable-pcie", "on" }, | |
194 | { "virtio-pci", "migrate-extra", "off" }, | |
195 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
196 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
197 | }; |
198 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
199 | ||
8995dd90 | 200 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
201 | { "virtio-blk-pci", "any_layout", "off" }, |
202 | { "virtio-balloon-pci", "any_layout", "off" }, | |
203 | { "virtio-serial-pci", "any_layout", "off" }, | |
204 | { "virtio-9p-pci", "any_layout", "off" }, | |
205 | { "virtio-rng-pci", "any_layout", "off" }, | |
206 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
207 | { "migration", "send-configuration", "off" }, | |
208 | { "migration", "send-section-footer", "off" }, | |
209 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
210 | }; |
211 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
212 | ||
1c30044e MAL |
213 | GlobalProperty hw_compat_2_2[] = {}; |
214 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
215 | ||
c4fc5695 | 216 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
217 | { "intel-hda", "old_msi_addr", "on" }, |
218 | { "VGA", "qemu-extended-regs", "off" }, | |
219 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
220 | { "virtio-scsi-pci", "any_layout", "off" }, | |
221 | { "usb-mouse", "usb_version", "1" }, | |
222 | { "usb-kbd", "usb_version", "1" }, | |
223 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
224 | }; |
225 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
226 | ||
c5e3c918 PB |
227 | MachineState *current_machine; |
228 | ||
6b1b1440 MA |
229 | static char *machine_get_kernel(Object *obj, Error **errp) |
230 | { | |
231 | MachineState *ms = MACHINE(obj); | |
232 | ||
233 | return g_strdup(ms->kernel_filename); | |
234 | } | |
235 | ||
236 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
237 | { | |
238 | MachineState *ms = MACHINE(obj); | |
239 | ||
556068ee | 240 | g_free(ms->kernel_filename); |
6b1b1440 MA |
241 | ms->kernel_filename = g_strdup(value); |
242 | } | |
243 | ||
244 | static char *machine_get_initrd(Object *obj, Error **errp) | |
245 | { | |
246 | MachineState *ms = MACHINE(obj); | |
247 | ||
248 | return g_strdup(ms->initrd_filename); | |
249 | } | |
250 | ||
251 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
252 | { | |
253 | MachineState *ms = MACHINE(obj); | |
254 | ||
556068ee | 255 | g_free(ms->initrd_filename); |
6b1b1440 MA |
256 | ms->initrd_filename = g_strdup(value); |
257 | } | |
258 | ||
259 | static char *machine_get_append(Object *obj, Error **errp) | |
260 | { | |
261 | MachineState *ms = MACHINE(obj); | |
262 | ||
263 | return g_strdup(ms->kernel_cmdline); | |
264 | } | |
265 | ||
266 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
267 | { | |
268 | MachineState *ms = MACHINE(obj); | |
269 | ||
556068ee | 270 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
271 | ms->kernel_cmdline = g_strdup(value); |
272 | } | |
273 | ||
274 | static char *machine_get_dtb(Object *obj, Error **errp) | |
275 | { | |
276 | MachineState *ms = MACHINE(obj); | |
277 | ||
278 | return g_strdup(ms->dtb); | |
279 | } | |
280 | ||
281 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
282 | { | |
283 | MachineState *ms = MACHINE(obj); | |
284 | ||
556068ee | 285 | g_free(ms->dtb); |
6b1b1440 MA |
286 | ms->dtb = g_strdup(value); |
287 | } | |
288 | ||
289 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
290 | { | |
291 | MachineState *ms = MACHINE(obj); | |
292 | ||
293 | return g_strdup(ms->dumpdtb); | |
294 | } | |
295 | ||
296 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
297 | { | |
298 | MachineState *ms = MACHINE(obj); | |
299 | ||
556068ee | 300 | g_free(ms->dumpdtb); |
6b1b1440 MA |
301 | ms->dumpdtb = g_strdup(value); |
302 | } | |
303 | ||
304 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
305 | const char *name, void *opaque, |
306 | Error **errp) | |
6b1b1440 MA |
307 | { |
308 | MachineState *ms = MACHINE(obj); | |
309 | int64_t value = ms->phandle_start; | |
310 | ||
51e72bc1 | 311 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
312 | } |
313 | ||
314 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
315 | const char *name, void *opaque, |
316 | Error **errp) | |
6b1b1440 MA |
317 | { |
318 | MachineState *ms = MACHINE(obj); | |
6b1b1440 MA |
319 | int64_t value; |
320 | ||
668f62ec | 321 | if (!visit_type_int(v, name, &value, errp)) { |
6b1b1440 MA |
322 | return; |
323 | } | |
324 | ||
325 | ms->phandle_start = value; | |
326 | } | |
327 | ||
328 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
329 | { | |
330 | MachineState *ms = MACHINE(obj); | |
331 | ||
332 | return g_strdup(ms->dt_compatible); | |
333 | } | |
334 | ||
335 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
336 | { | |
337 | MachineState *ms = MACHINE(obj); | |
338 | ||
556068ee | 339 | g_free(ms->dt_compatible); |
6b1b1440 MA |
340 | ms->dt_compatible = g_strdup(value); |
341 | } | |
342 | ||
343 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
344 | { | |
345 | MachineState *ms = MACHINE(obj); | |
346 | ||
347 | return ms->dump_guest_core; | |
348 | } | |
349 | ||
350 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
351 | { | |
352 | MachineState *ms = MACHINE(obj); | |
353 | ||
354 | ms->dump_guest_core = value; | |
355 | } | |
356 | ||
357 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
358 | { | |
359 | MachineState *ms = MACHINE(obj); | |
360 | ||
361 | return ms->mem_merge; | |
362 | } | |
363 | ||
364 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
365 | { | |
366 | MachineState *ms = MACHINE(obj); | |
367 | ||
368 | ms->mem_merge = value; | |
369 | } | |
370 | ||
371 | static bool machine_get_usb(Object *obj, Error **errp) | |
372 | { | |
373 | MachineState *ms = MACHINE(obj); | |
374 | ||
375 | return ms->usb; | |
376 | } | |
377 | ||
378 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
379 | { | |
380 | MachineState *ms = MACHINE(obj); | |
381 | ||
382 | ms->usb = value; | |
c6e76503 | 383 | ms->usb_disabled = !value; |
6b1b1440 MA |
384 | } |
385 | ||
cfc58cf3 EH |
386 | static bool machine_get_graphics(Object *obj, Error **errp) |
387 | { | |
388 | MachineState *ms = MACHINE(obj); | |
389 | ||
390 | return ms->enable_graphics; | |
391 | } | |
392 | ||
393 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
394 | { | |
395 | MachineState *ms = MACHINE(obj); | |
396 | ||
397 | ms->enable_graphics = value; | |
398 | } | |
399 | ||
6b1b1440 MA |
400 | static char *machine_get_firmware(Object *obj, Error **errp) |
401 | { | |
402 | MachineState *ms = MACHINE(obj); | |
403 | ||
404 | return g_strdup(ms->firmware); | |
405 | } | |
406 | ||
407 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
408 | { | |
409 | MachineState *ms = MACHINE(obj); | |
410 | ||
556068ee | 411 | g_free(ms->firmware); |
6b1b1440 MA |
412 | ms->firmware = g_strdup(value); |
413 | } | |
414 | ||
9850c604 AG |
415 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
416 | { | |
417 | MachineState *ms = MACHINE(obj); | |
418 | ||
419 | ms->suppress_vmdesc = value; | |
420 | } | |
421 | ||
422 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
423 | { | |
424 | MachineState *ms = MACHINE(obj); | |
425 | ||
426 | return ms->suppress_vmdesc; | |
427 | } | |
428 | ||
db588194 BS |
429 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
430 | { | |
431 | MachineState *ms = MACHINE(obj); | |
432 | ||
e0292d7c DG |
433 | if (ms->cgs) { |
434 | return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); | |
435 | } | |
436 | ||
437 | return NULL; | |
db588194 BS |
438 | } |
439 | ||
440 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
441 | Error **errp) | |
442 | { | |
e0292d7c DG |
443 | Object *cgs = |
444 | object_resolve_path_component(object_get_objects_root(), value); | |
445 | ||
446 | if (!cgs) { | |
447 | error_setg(errp, "No such memory encryption object '%s'", value); | |
448 | return; | |
449 | } | |
db588194 | 450 | |
e0292d7c DG |
451 | object_property_set_link(obj, "confidential-guest-support", cgs, errp); |
452 | } | |
453 | ||
454 | static void machine_check_confidential_guest_support(const Object *obj, | |
455 | const char *name, | |
456 | Object *new_target, | |
457 | Error **errp) | |
458 | { | |
459 | /* | |
460 | * So far the only constraint is that the target has the | |
461 | * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked | |
462 | * by the QOM core | |
463 | */ | |
db588194 BS |
464 | } |
465 | ||
f6a0d06b EA |
466 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
467 | { | |
468 | MachineState *ms = MACHINE(obj); | |
469 | ||
470 | return ms->nvdimms_state->is_enabled; | |
471 | } | |
472 | ||
473 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
474 | { | |
475 | MachineState *ms = MACHINE(obj); | |
476 | ||
477 | ms->nvdimms_state->is_enabled = value; | |
478 | } | |
479 | ||
244b3f44 TX |
480 | static bool machine_get_hmat(Object *obj, Error **errp) |
481 | { | |
482 | MachineState *ms = MACHINE(obj); | |
483 | ||
484 | return ms->numa_state->hmat_enabled; | |
485 | } | |
486 | ||
487 | static void machine_set_hmat(Object *obj, bool value, Error **errp) | |
488 | { | |
489 | MachineState *ms = MACHINE(obj); | |
490 | ||
491 | ms->numa_state->hmat_enabled = value; | |
492 | } | |
493 | ||
f6a0d06b EA |
494 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
495 | { | |
496 | MachineState *ms = MACHINE(obj); | |
497 | ||
498 | return g_strdup(ms->nvdimms_state->persistence_string); | |
499 | } | |
500 | ||
501 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
502 | Error **errp) | |
503 | { | |
504 | MachineState *ms = MACHINE(obj); | |
505 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
506 | ||
507 | if (strcmp(value, "cpu") == 0) { | |
508 | nvdimms_state->persistence = 3; | |
509 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
510 | nvdimms_state->persistence = 2; | |
511 | } else { | |
512 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
513 | value); | |
514 | return; | |
515 | } | |
516 | ||
517 | g_free(nvdimms_state->persistence_string); | |
518 | nvdimms_state->persistence_string = g_strdup(value); | |
519 | } | |
520 | ||
0bd1909d | 521 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 522 | { |
54aa3de7 | 523 | QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); |
33cd52b5 AG |
524 | } |
525 | ||
0bd1909d | 526 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 527 | { |
0bd1909d EH |
528 | MachineState *machine = opaque; |
529 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
530 | bool allowed = false; | |
531 | strList *wl; | |
33cd52b5 | 532 | |
0bd1909d EH |
533 | for (wl = mc->allowed_dynamic_sysbus_devices; |
534 | !allowed && wl; | |
535 | wl = wl->next) { | |
536 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
537 | } | |
538 | ||
539 | if (!allowed) { | |
540 | error_report("Option '-device %s' cannot be handled by this machine", | |
541 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
542 | exit(1); | |
33cd52b5 | 543 | } |
0bd1909d EH |
544 | } |
545 | ||
aa8b1839 IM |
546 | static char *machine_get_memdev(Object *obj, Error **errp) |
547 | { | |
548 | MachineState *ms = MACHINE(obj); | |
549 | ||
550 | return g_strdup(ms->ram_memdev_id); | |
551 | } | |
552 | ||
553 | static void machine_set_memdev(Object *obj, const char *value, Error **errp) | |
554 | { | |
555 | MachineState *ms = MACHINE(obj); | |
556 | ||
557 | g_free(ms->ram_memdev_id); | |
558 | ms->ram_memdev_id = g_strdup(value); | |
559 | } | |
560 | ||
561 | ||
0bd1909d EH |
562 | static void machine_init_notify(Notifier *notifier, void *data) |
563 | { | |
564 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
565 | |
566 | /* | |
0bd1909d EH |
567 | * Loop through all dynamically created sysbus devices and check if they are |
568 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 569 | */ |
0bd1909d | 570 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
571 | } |
572 | ||
f2d672c2 IM |
573 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
574 | { | |
575 | int i; | |
f2d672c2 | 576 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
577 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
578 | ||
579 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
580 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 581 | |
f2d672c2 | 582 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 583 | Object *cpu; |
f2d672c2 IM |
584 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); |
585 | ||
d342eb76 | 586 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
587 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
588 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
589 | sizeof(*cpu_item->props)); | |
590 | ||
591 | cpu = machine->possible_cpus->cpus[i].cpu; | |
592 | if (cpu) { | |
593 | cpu_item->has_qom_path = true; | |
594 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
595 | } | |
54aa3de7 | 596 | QAPI_LIST_PREPEND(head, cpu_item); |
f2d672c2 IM |
597 | } |
598 | return head; | |
599 | } | |
600 | ||
7c88e65d IM |
601 | /** |
602 | * machine_set_cpu_numa_node: | |
603 | * @machine: machine object to modify | |
604 | * @props: specifies which cpu objects to assign to | |
605 | * numa node specified by @props.node_id | |
606 | * @errp: if an error occurs, a pointer to an area to store the error | |
607 | * | |
608 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
609 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
610 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
611 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
612 | * | |
613 | * However for CLI convenience it's possible to pass in subset of properties, | |
614 | * which would affect all cpu slots that match it. | |
615 | * Ex for pc machine: | |
616 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
617 | * -numa cpu,node-id=0,socket_id=0 \ | |
618 | * -numa cpu,node-id=1,socket_id=1 | |
619 | * will assign all child cores of socket 0 to node 0 and | |
620 | * of socket 1 to node 1. | |
621 | * | |
622 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
623 | * return error. | |
624 | * Empty subset is disallowed and function will return with error in this case. | |
625 | */ | |
626 | void machine_set_cpu_numa_node(MachineState *machine, | |
627 | const CpuInstanceProperties *props, Error **errp) | |
628 | { | |
629 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
244b3f44 | 630 | NodeInfo *numa_info = machine->numa_state->nodes; |
7c88e65d IM |
631 | bool match = false; |
632 | int i; | |
633 | ||
634 | if (!mc->possible_cpu_arch_ids) { | |
635 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
636 | return; | |
637 | } | |
638 | ||
639 | /* disabling node mapping is not supported, forbid it */ | |
640 | assert(props->has_node_id); | |
641 | ||
642 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
643 | mc->possible_cpu_arch_ids(machine); | |
644 | ||
645 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
646 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
647 | ||
648 | /* reject unsupported by board properties */ | |
649 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
650 | error_setg(errp, "thread-id is not supported"); | |
651 | return; | |
652 | } | |
653 | ||
654 | if (props->has_core_id && !slot->props.has_core_id) { | |
655 | error_setg(errp, "core-id is not supported"); | |
656 | return; | |
657 | } | |
658 | ||
659 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
660 | error_setg(errp, "socket-id is not supported"); | |
661 | return; | |
662 | } | |
663 | ||
176d2cda LX |
664 | if (props->has_die_id && !slot->props.has_die_id) { |
665 | error_setg(errp, "die-id is not supported"); | |
666 | return; | |
667 | } | |
668 | ||
7c88e65d IM |
669 | /* skip slots with explicit mismatch */ |
670 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
671 | continue; | |
672 | } | |
673 | ||
674 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
675 | continue; | |
676 | } | |
677 | ||
176d2cda LX |
678 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
679 | continue; | |
680 | } | |
681 | ||
7c88e65d IM |
682 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
683 | continue; | |
684 | } | |
685 | ||
686 | /* reject assignment if slot is already assigned, for compatibility | |
687 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
688 | * error out if cpu thread and matched core have the same node-id */ | |
689 | if (slot->props.has_node_id && | |
690 | slot->props.node_id != props->node_id) { | |
691 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
692 | slot->props.node_id); | |
693 | return; | |
694 | } | |
695 | ||
696 | /* assign slot to node as it's matched '-numa cpu' key */ | |
697 | match = true; | |
698 | slot->props.node_id = props->node_id; | |
699 | slot->props.has_node_id = props->has_node_id; | |
244b3f44 TX |
700 | |
701 | if (machine->numa_state->hmat_enabled) { | |
702 | if ((numa_info[props->node_id].initiator < MAX_NODES) && | |
703 | (props->node_id != numa_info[props->node_id].initiator)) { | |
704 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 | |
705 | " should be itself", props->node_id); | |
706 | return; | |
707 | } | |
708 | numa_info[props->node_id].has_cpu = true; | |
709 | numa_info[props->node_id].initiator = props->node_id; | |
710 | } | |
7c88e65d IM |
711 | } |
712 | ||
713 | if (!match) { | |
714 | error_setg(errp, "no match found"); | |
715 | } | |
716 | } | |
717 | ||
6f479566 LX |
718 | static void smp_parse(MachineState *ms, QemuOpts *opts) |
719 | { | |
720 | if (opts) { | |
721 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
722 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
723 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); | |
724 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
725 | ||
726 | /* compute missing values, prefer sockets over cores over threads */ | |
727 | if (cpus == 0 || sockets == 0) { | |
728 | cores = cores > 0 ? cores : 1; | |
729 | threads = threads > 0 ? threads : 1; | |
730 | if (cpus == 0) { | |
731 | sockets = sockets > 0 ? sockets : 1; | |
732 | cpus = cores * threads * sockets; | |
733 | } else { | |
734 | ms->smp.max_cpus = | |
735 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
736 | sockets = ms->smp.max_cpus / (cores * threads); | |
737 | } | |
738 | } else if (cores == 0) { | |
739 | threads = threads > 0 ? threads : 1; | |
740 | cores = cpus / (sockets * threads); | |
741 | cores = cores > 0 ? cores : 1; | |
742 | } else if (threads == 0) { | |
743 | threads = cpus / (cores * sockets); | |
744 | threads = threads > 0 ? threads : 1; | |
745 | } else if (sockets * cores * threads < cpus) { | |
746 | error_report("cpu topology: " | |
747 | "sockets (%u) * cores (%u) * threads (%u) < " | |
748 | "smp_cpus (%u)", | |
749 | sockets, cores, threads, cpus); | |
750 | exit(1); | |
751 | } | |
752 | ||
753 | ms->smp.max_cpus = | |
754 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
755 | ||
756 | if (ms->smp.max_cpus < cpus) { | |
757 | error_report("maxcpus must be equal to or greater than smp"); | |
758 | exit(1); | |
759 | } | |
760 | ||
c4332cd1 IM |
761 | if (sockets * cores * threads != ms->smp.max_cpus) { |
762 | error_report("Invalid CPU topology: " | |
763 | "sockets (%u) * cores (%u) * threads (%u) " | |
764 | "!= maxcpus (%u)", | |
6f479566 LX |
765 | sockets, cores, threads, |
766 | ms->smp.max_cpus); | |
767 | exit(1); | |
768 | } | |
769 | ||
6f479566 LX |
770 | ms->smp.cpus = cpus; |
771 | ms->smp.cores = cores; | |
772 | ms->smp.threads = threads; | |
8cb30e3a | 773 | ms->smp.sockets = sockets; |
6f479566 LX |
774 | } |
775 | ||
776 | if (ms->smp.cpus > 1) { | |
777 | Error *blocker = NULL; | |
778 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
779 | replay_add_blocker(blocker); | |
780 | } | |
781 | } | |
782 | ||
076b35b5 ND |
783 | static void machine_class_init(ObjectClass *oc, void *data) |
784 | { | |
785 | MachineClass *mc = MACHINE_CLASS(oc); | |
786 | ||
787 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 788 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 789 | mc->rom_file_has_mr = true; |
6f479566 | 790 | mc->smp_parse = smp_parse; |
26b81df4 | 791 | |
55641213 LV |
792 | /* numa node memory size aligned on 8MB by default. |
793 | * On Linux, each node's border has to be 8MB aligned | |
794 | */ | |
795 | mc->numa_mem_align_shift = 23; | |
796 | ||
26b81df4 | 797 | object_class_property_add_str(oc, "kernel", |
d2623129 | 798 | machine_get_kernel, machine_set_kernel); |
26b81df4 | 799 | object_class_property_set_description(oc, "kernel", |
7eecec7d | 800 | "Linux kernel image file"); |
26b81df4 EH |
801 | |
802 | object_class_property_add_str(oc, "initrd", | |
d2623129 | 803 | machine_get_initrd, machine_set_initrd); |
26b81df4 | 804 | object_class_property_set_description(oc, "initrd", |
7eecec7d | 805 | "Linux initial ramdisk file"); |
26b81df4 EH |
806 | |
807 | object_class_property_add_str(oc, "append", | |
d2623129 | 808 | machine_get_append, machine_set_append); |
26b81df4 | 809 | object_class_property_set_description(oc, "append", |
7eecec7d | 810 | "Linux kernel command line"); |
26b81df4 EH |
811 | |
812 | object_class_property_add_str(oc, "dtb", | |
d2623129 | 813 | machine_get_dtb, machine_set_dtb); |
26b81df4 | 814 | object_class_property_set_description(oc, "dtb", |
7eecec7d | 815 | "Linux kernel device tree file"); |
26b81df4 EH |
816 | |
817 | object_class_property_add_str(oc, "dumpdtb", | |
d2623129 | 818 | machine_get_dumpdtb, machine_set_dumpdtb); |
26b81df4 | 819 | object_class_property_set_description(oc, "dumpdtb", |
7eecec7d | 820 | "Dump current dtb to a file and quit"); |
26b81df4 EH |
821 | |
822 | object_class_property_add(oc, "phandle-start", "int", | |
823 | machine_get_phandle_start, machine_set_phandle_start, | |
d2623129 | 824 | NULL, NULL); |
26b81df4 | 825 | object_class_property_set_description(oc, "phandle-start", |
7eecec7d | 826 | "The first phandle ID we may generate dynamically"); |
26b81df4 EH |
827 | |
828 | object_class_property_add_str(oc, "dt-compatible", | |
d2623129 | 829 | machine_get_dt_compatible, machine_set_dt_compatible); |
26b81df4 | 830 | object_class_property_set_description(oc, "dt-compatible", |
7eecec7d | 831 | "Overrides the \"compatible\" property of the dt root node"); |
26b81df4 EH |
832 | |
833 | object_class_property_add_bool(oc, "dump-guest-core", | |
d2623129 | 834 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
26b81df4 | 835 | object_class_property_set_description(oc, "dump-guest-core", |
7eecec7d | 836 | "Include guest memory in a core dump"); |
26b81df4 EH |
837 | |
838 | object_class_property_add_bool(oc, "mem-merge", | |
d2623129 | 839 | machine_get_mem_merge, machine_set_mem_merge); |
26b81df4 | 840 | object_class_property_set_description(oc, "mem-merge", |
7eecec7d | 841 | "Enable/disable memory merge support"); |
26b81df4 EH |
842 | |
843 | object_class_property_add_bool(oc, "usb", | |
d2623129 | 844 | machine_get_usb, machine_set_usb); |
26b81df4 | 845 | object_class_property_set_description(oc, "usb", |
7eecec7d | 846 | "Set on/off to enable/disable usb"); |
26b81df4 EH |
847 | |
848 | object_class_property_add_bool(oc, "graphics", | |
d2623129 | 849 | machine_get_graphics, machine_set_graphics); |
26b81df4 | 850 | object_class_property_set_description(oc, "graphics", |
7eecec7d | 851 | "Set on/off to enable/disable graphics emulation"); |
26b81df4 | 852 | |
26b81df4 | 853 | object_class_property_add_str(oc, "firmware", |
d2623129 | 854 | machine_get_firmware, machine_set_firmware); |
26b81df4 | 855 | object_class_property_set_description(oc, "firmware", |
7eecec7d | 856 | "Firmware image"); |
26b81df4 EH |
857 | |
858 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
d2623129 | 859 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
26b81df4 | 860 | object_class_property_set_description(oc, "suppress-vmdesc", |
7eecec7d | 861 | "Set on to disable self-describing migration"); |
26b81df4 | 862 | |
e0292d7c DG |
863 | object_class_property_add_link(oc, "confidential-guest-support", |
864 | TYPE_CONFIDENTIAL_GUEST_SUPPORT, | |
865 | offsetof(MachineState, cgs), | |
866 | machine_check_confidential_guest_support, | |
867 | OBJ_PROP_LINK_STRONG); | |
868 | object_class_property_set_description(oc, "confidential-guest-support", | |
869 | "Set confidential guest scheme to support"); | |
870 | ||
871 | /* For compatibility */ | |
db588194 | 872 | object_class_property_add_str(oc, "memory-encryption", |
d2623129 | 873 | machine_get_memory_encryption, machine_set_memory_encryption); |
db588194 | 874 | object_class_property_set_description(oc, "memory-encryption", |
7eecec7d | 875 | "Set memory encryption object to use"); |
acd5b054 EH |
876 | |
877 | object_class_property_add_str(oc, "memory-backend", | |
878 | machine_get_memdev, machine_set_memdev); | |
879 | object_class_property_set_description(oc, "memory-backend", | |
880 | "Set RAM backend" | |
881 | "Valid value is ID of hostmem based backend"); | |
076b35b5 ND |
882 | } |
883 | ||
dcb3d601 EH |
884 | static void machine_class_base_init(ObjectClass *oc, void *data) |
885 | { | |
2c920e45 PB |
886 | MachineClass *mc = MACHINE_CLASS(oc); |
887 | mc->max_cpus = mc->max_cpus ?: 1; | |
888 | mc->min_cpus = mc->min_cpus ?: 1; | |
889 | mc->default_cpus = mc->default_cpus ?: 1; | |
890 | ||
dcb3d601 EH |
891 | if (!object_class_is_abstract(oc)) { |
892 | const char *cname = object_class_get_name(oc); | |
893 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
894 | mc->name = g_strndup(cname, |
895 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 896 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
897 | } |
898 | } | |
899 | ||
6b1b1440 MA |
900 | static void machine_initfn(Object *obj) |
901 | { | |
33cd52b5 | 902 | MachineState *ms = MACHINE(obj); |
b2fc91db | 903 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 904 | |
e0d17dfd PB |
905 | container_get(obj, "/peripheral"); |
906 | container_get(obj, "/peripheral-anon"); | |
907 | ||
47c8ca53 | 908 | ms->dump_guest_core = true; |
75cc7f01 | 909 | ms->mem_merge = true; |
cfc58cf3 | 910 | ms->enable_graphics = true; |
58c91595 | 911 | ms->kernel_cmdline = g_strdup(""); |
d8870d02 | 912 | |
f6a0d06b EA |
913 | if (mc->nvdimm_supported) { |
914 | Object *obj = OBJECT(ms); | |
915 | ||
916 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
917 | object_property_add_bool(obj, "nvdimm", | |
d2623129 | 918 | machine_get_nvdimm, machine_set_nvdimm); |
f6a0d06b EA |
919 | object_property_set_description(obj, "nvdimm", |
920 | "Set on/off to enable/disable " | |
7eecec7d | 921 | "NVDIMM instantiation"); |
f6a0d06b EA |
922 | |
923 | object_property_add_str(obj, "nvdimm-persistence", | |
924 | machine_get_nvdimm_persistence, | |
d2623129 | 925 | machine_set_nvdimm_persistence); |
f6a0d06b EA |
926 | object_property_set_description(obj, "nvdimm-persistence", |
927 | "Set NVDIMM persistence" | |
7eecec7d | 928 | "Valid values are cpu, mem-ctrl"); |
f6a0d06b EA |
929 | } |
930 | ||
fcd3f2cc | 931 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
aa570207 | 932 | ms->numa_state = g_new0(NumaState, 1); |
244b3f44 | 933 | object_property_add_bool(obj, "hmat", |
d2623129 | 934 | machine_get_hmat, machine_set_hmat); |
244b3f44 TX |
935 | object_property_set_description(obj, "hmat", |
936 | "Set on/off to enable/disable " | |
937 | "ACPI Heterogeneous Memory Attribute " | |
7eecec7d | 938 | "Table (HMAT)"); |
aa570207 | 939 | } |
f6a0d06b | 940 | |
33cd52b5 AG |
941 | /* Register notifier when init is done for sysbus sanity checks */ |
942 | ms->sysbus_notifier.notify = machine_init_notify; | |
943 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
8b0e484c PB |
944 | |
945 | /* default to mc->default_cpus */ | |
946 | ms->smp.cpus = mc->default_cpus; | |
947 | ms->smp.max_cpus = mc->default_cpus; | |
948 | ms->smp.cores = 1; | |
949 | ms->smp.threads = 1; | |
950 | ms->smp.sockets = 1; | |
6b1b1440 MA |
951 | } |
952 | ||
953 | static void machine_finalize(Object *obj) | |
954 | { | |
955 | MachineState *ms = MACHINE(obj); | |
956 | ||
6b1b1440 MA |
957 | g_free(ms->kernel_filename); |
958 | g_free(ms->initrd_filename); | |
959 | g_free(ms->kernel_cmdline); | |
960 | g_free(ms->dtb); | |
961 | g_free(ms->dumpdtb); | |
962 | g_free(ms->dt_compatible); | |
963 | g_free(ms->firmware); | |
2ff4f67c | 964 | g_free(ms->device_memory); |
f6a0d06b | 965 | g_free(ms->nvdimms_state); |
aa570207 | 966 | g_free(ms->numa_state); |
6b1b1440 | 967 | } |
36d20cb2 | 968 | |
5e97b623 MA |
969 | bool machine_usb(MachineState *machine) |
970 | { | |
971 | return machine->usb; | |
972 | } | |
973 | ||
6cabe7fa MA |
974 | int machine_phandle_start(MachineState *machine) |
975 | { | |
976 | return machine->phandle_start; | |
977 | } | |
978 | ||
47c8ca53 MA |
979 | bool machine_dump_guest_core(MachineState *machine) |
980 | { | |
981 | return machine->dump_guest_core; | |
982 | } | |
983 | ||
75cc7f01 MA |
984 | bool machine_mem_merge(MachineState *machine) |
985 | { | |
986 | return machine->mem_merge; | |
987 | } | |
988 | ||
ec78f811 IM |
989 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
990 | { | |
991 | GString *s = g_string_new(NULL); | |
992 | if (cpu->props.has_socket_id) { | |
993 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
994 | } | |
176d2cda LX |
995 | if (cpu->props.has_die_id) { |
996 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); | |
997 | } | |
ec78f811 IM |
998 | if (cpu->props.has_core_id) { |
999 | if (s->len) { | |
1000 | g_string_append_printf(s, ", "); | |
1001 | } | |
1002 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
1003 | } | |
1004 | if (cpu->props.has_thread_id) { | |
1005 | if (s->len) { | |
1006 | g_string_append_printf(s, ", "); | |
1007 | } | |
1008 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
1009 | } | |
1010 | return g_string_free(s, false); | |
1011 | } | |
1012 | ||
244b3f44 TX |
1013 | static void numa_validate_initiator(NumaState *numa_state) |
1014 | { | |
1015 | int i; | |
1016 | NodeInfo *numa_info = numa_state->nodes; | |
1017 | ||
1018 | for (i = 0; i < numa_state->num_nodes; i++) { | |
1019 | if (numa_info[i].initiator == MAX_NODES) { | |
1020 | error_report("The initiator of NUMA node %d is missing, use " | |
1021 | "'-numa node,initiator' option to declare it", i); | |
1022 | exit(1); | |
1023 | } | |
1024 | ||
1025 | if (!numa_info[numa_info[i].initiator].present) { | |
1026 | error_report("NUMA node %" PRIu16 " is missing, use " | |
1027 | "'-numa node' option to declare it first", | |
1028 | numa_info[i].initiator); | |
1029 | exit(1); | |
1030 | } | |
1031 | ||
1032 | if (!numa_info[numa_info[i].initiator].has_cpu) { | |
1033 | error_report("The initiator of NUMA node %d is invalid", i); | |
1034 | exit(1); | |
1035 | } | |
1036 | } | |
1037 | } | |
1038 | ||
7a3099fc | 1039 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
1040 | { |
1041 | int i; | |
60bed6a3 | 1042 | bool default_mapping; |
ec78f811 IM |
1043 | GString *s = g_string_new(NULL); |
1044 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
1045 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
1046 | ||
aa570207 | 1047 | assert(machine->numa_state->num_nodes); |
60bed6a3 IM |
1048 | for (i = 0; i < possible_cpus->len; i++) { |
1049 | if (possible_cpus->cpus[i].props.has_node_id) { | |
1050 | break; | |
1051 | } | |
1052 | } | |
1053 | default_mapping = (i == possible_cpus->len); | |
1054 | ||
ec78f811 IM |
1055 | for (i = 0; i < possible_cpus->len; i++) { |
1056 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
1057 | ||
ec78f811 | 1058 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
1059 | /* fetch default mapping from board and enable it */ |
1060 | CpuInstanceProperties props = cpu_slot->props; | |
1061 | ||
79e07936 | 1062 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 1063 | if (!default_mapping) { |
60bed6a3 IM |
1064 | /* record slots with not set mapping, |
1065 | * TODO: make it hard error in future */ | |
1066 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
1067 | g_string_append_printf(s, "%sCPU %d [%s]", | |
1068 | s->len ? ", " : "", i, cpu_str); | |
1069 | g_free(cpu_str); | |
d41f3e75 IM |
1070 | |
1071 | /* non mapped cpus used to fallback to node 0 */ | |
1072 | props.node_id = 0; | |
60bed6a3 | 1073 | } |
d41f3e75 IM |
1074 | |
1075 | props.has_node_id = true; | |
1076 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
1077 | } |
1078 | } | |
244b3f44 TX |
1079 | |
1080 | if (machine->numa_state->hmat_enabled) { | |
1081 | numa_validate_initiator(machine->numa_state); | |
1082 | } | |
1083 | ||
c6ff347c | 1084 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1085 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1086 | s->str); | |
1087 | warn_report("All CPU(s) up to maxcpus should be described " | |
1088 | "in NUMA config, ability to start up with partial NUMA " | |
1089 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1090 | } |
1091 | g_string_free(s, true); | |
1092 | } | |
1093 | ||
82b911aa IM |
1094 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
1095 | HostMemoryBackend *backend) | |
1096 | { | |
1097 | MemoryRegion *ret = host_memory_backend_get_memory(backend); | |
1098 | ||
1099 | if (memory_region_is_mapped(ret)) { | |
7a309cc9 MA |
1100 | error_report("memory backend %s can't be used multiple times.", |
1101 | object_get_canonical_path_component(OBJECT(backend))); | |
82b911aa IM |
1102 | exit(EXIT_FAILURE); |
1103 | } | |
1104 | host_memory_backend_set_mapped(backend, true); | |
1105 | vmstate_register_ram_global(ret); | |
1106 | return ret; | |
1107 | } | |
1108 | ||
3df8c4f3 PB |
1109 | bool machine_smp_parse(MachineState *ms, QemuOpts *opts, Error **errp) |
1110 | { | |
1111 | MachineClass *mc = MACHINE_GET_CLASS(ms); | |
1112 | ||
1113 | mc->smp_parse(ms, opts); | |
1114 | ||
1115 | /* sanity-check smp_cpus and max_cpus against mc */ | |
1116 | if (ms->smp.cpus < mc->min_cpus) { | |
1117 | error_setg(errp, "Invalid SMP CPUs %d. The min CPUs " | |
1118 | "supported by machine '%s' is %d", | |
1119 | ms->smp.cpus, | |
1120 | mc->name, mc->min_cpus); | |
1121 | return false; | |
1122 | } else if (ms->smp.max_cpus > mc->max_cpus) { | |
1123 | error_setg(errp, "Invalid SMP CPUs %d. The max CPUs " | |
1124 | "supported by machine '%s' is %d", | |
1125 | current_machine->smp.max_cpus, | |
1126 | mc->name, mc->max_cpus); | |
1127 | return false; | |
1128 | } | |
1129 | return true; | |
1130 | } | |
1131 | ||
482dfe9a IM |
1132 | void machine_run_board_init(MachineState *machine) |
1133 | { | |
1134 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
61ad65d0 RH |
1135 | ObjectClass *oc = object_class_by_name(machine->cpu_type); |
1136 | CPUClass *cc; | |
ec78f811 | 1137 | |
a3ef9bfb PB |
1138 | /* This checkpoint is required by replay to separate prior clock |
1139 | reading from the other reads, because timer polling functions query | |
1140 | clock values from the log. */ | |
1141 | replay_checkpoint(CHECKPOINT_INIT); | |
1142 | ||
82b911aa IM |
1143 | if (machine->ram_memdev_id) { |
1144 | Object *o; | |
1145 | o = object_resolve_path_type(machine->ram_memdev_id, | |
1146 | TYPE_MEMORY_BACKEND, NULL); | |
1147 | machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); | |
1148 | } | |
1149 | ||
fcd3f2cc | 1150 | if (machine->numa_state) { |
aa570207 TX |
1151 | numa_complete_configuration(machine); |
1152 | if (machine->numa_state->num_nodes) { | |
1153 | machine_numa_finish_cpu_init(machine); | |
1154 | } | |
3aeaac8f | 1155 | } |
c9cf636d AF |
1156 | |
1157 | /* If the machine supports the valid_cpu_types check and the user | |
1158 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1159 | */ | |
1160 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
c9cf636d AF |
1161 | int i; |
1162 | ||
1163 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
61ad65d0 | 1164 | if (object_class_dynamic_cast(oc, |
c9cf636d AF |
1165 | machine_class->valid_cpu_types[i])) { |
1166 | /* The user specificed CPU is in the valid field, we are | |
1167 | * good to go. | |
1168 | */ | |
1169 | break; | |
1170 | } | |
1171 | } | |
1172 | ||
1173 | if (!machine_class->valid_cpu_types[i]) { | |
1174 | /* The user specified CPU is not valid */ | |
1175 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1176 | error_printf("The valid types are: %s", | |
1177 | machine_class->valid_cpu_types[0]); | |
1178 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1179 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1180 | } | |
1181 | error_printf("\n"); | |
1182 | ||
1183 | exit(1); | |
1184 | } | |
1185 | } | |
1186 | ||
61ad65d0 RH |
1187 | /* Check if CPU type is deprecated and warn if so */ |
1188 | cc = CPU_CLASS(oc); | |
1189 | if (cc && cc->deprecation_note) { | |
1190 | warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, | |
1191 | cc->deprecation_note); | |
1192 | } | |
1193 | ||
e0292d7c | 1194 | if (machine->cgs) { |
6e6a6ca7 | 1195 | /* |
e0292d7c | 1196 | * With confidential guests, the host can't see the real |
6e6a6ca7 DG |
1197 | * contents of RAM, so there's no point in it trying to merge |
1198 | * areas. | |
1199 | */ | |
1200 | machine_set_mem_merge(OBJECT(machine), false, &error_abort); | |
9f88a7a3 DG |
1201 | |
1202 | /* | |
1203 | * Virtio devices can't count on directly accessing guest | |
1204 | * memory, so they need iommu_platform=on to use normal DMA | |
1205 | * mechanisms. That requires also disabling legacy virtio | |
1206 | * support for those virtio pci devices which allow it. | |
1207 | */ | |
1208 | object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", | |
1209 | "on", true); | |
1210 | object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", | |
1211 | "on", false); | |
6e6a6ca7 DG |
1212 | } |
1213 | ||
482dfe9a | 1214 | machine_class->init(machine); |
2f181fbd | 1215 | phase_advance(PHASE_MACHINE_INITIALIZED); |
482dfe9a IM |
1216 | } |
1217 | ||
6b21670c PB |
1218 | static NotifierList machine_init_done_notifiers = |
1219 | NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); | |
1220 | ||
6b21670c PB |
1221 | void qemu_add_machine_init_done_notifier(Notifier *notify) |
1222 | { | |
1223 | notifier_list_add(&machine_init_done_notifiers, notify); | |
2f181fbd | 1224 | if (phase_check(PHASE_MACHINE_READY)) { |
6b21670c PB |
1225 | notify->notify(notify, NULL); |
1226 | } | |
1227 | } | |
1228 | ||
1229 | void qemu_remove_machine_init_done_notifier(Notifier *notify) | |
1230 | { | |
1231 | notifier_remove(notify); | |
1232 | } | |
1233 | ||
f66dc873 | 1234 | void qdev_machine_creation_done(void) |
6b21670c | 1235 | { |
f66dc873 PB |
1236 | cpu_synchronize_all_post_init(); |
1237 | ||
1238 | if (current_machine->boot_once) { | |
1239 | qemu_boot_set(current_machine->boot_once, &error_fatal); | |
1240 | qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_order)); | |
1241 | } | |
1242 | ||
1243 | /* | |
1244 | * ok, initial machine setup is done, starting from now we can | |
1245 | * only create hotpluggable devices | |
1246 | */ | |
2f181fbd | 1247 | phase_advance(PHASE_MACHINE_READY); |
f66dc873 PB |
1248 | qdev_assert_realized_properly(); |
1249 | ||
1250 | /* TODO: once all bus devices are qdevified, this should be done | |
1251 | * when bus is created by qdev.c */ | |
1252 | /* | |
1253 | * TODO: If we had a main 'reset container' that the whole system | |
1254 | * lived in, we could reset that using the multi-phase reset | |
1255 | * APIs. For the moment, we just reset the sysbus, which will cause | |
1256 | * all devices hanging off it (and all their child buses, recursively) | |
1257 | * to be reset. Note that this will *not* reset any Device objects | |
1258 | * which are not attached to some part of the qbus tree! | |
1259 | */ | |
1260 | qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default()); | |
1261 | ||
6b21670c | 1262 | notifier_list_notify(&machine_init_done_notifiers, NULL); |
f66dc873 PB |
1263 | |
1264 | if (rom_check_and_register_reset() != 0) { | |
f66dc873 PB |
1265 | exit(1); |
1266 | } | |
1267 | ||
1268 | replay_start(); | |
1269 | ||
1270 | /* This checkpoint is required by replay to separate prior clock | |
1271 | reading from the other reads, because timer polling functions query | |
1272 | clock values from the log. */ | |
1273 | replay_checkpoint(CHECKPOINT_RESET); | |
1274 | qemu_system_reset(SHUTDOWN_CAUSE_NONE); | |
1275 | register_global_state(); | |
6b21670c PB |
1276 | } |
1277 | ||
36d20cb2 MA |
1278 | static const TypeInfo machine_info = { |
1279 | .name = TYPE_MACHINE, | |
1280 | .parent = TYPE_OBJECT, | |
1281 | .abstract = true, | |
1282 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1283 | .class_init = machine_class_init, |
dcb3d601 | 1284 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1285 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1286 | .instance_init = machine_initfn, |
1287 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1288 | }; |
1289 | ||
1290 | static void machine_register_types(void) | |
1291 | { | |
1292 | type_register_static(&machine_info); | |
1293 | } | |
1294 | ||
1295 | type_init(machine_register_types) |