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Commit | Line | Data |
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36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
fc6b3cf9 | 14 | #include "qemu/units.h" |
36d20cb2 | 15 | #include "hw/boards.h" |
da34e65c | 16 | #include "qapi/error.h" |
9af23989 | 17 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 18 | #include "qapi/visitor.h" |
33cd52b5 AG |
19 | #include "hw/sysbus.h" |
20 | #include "sysemu/sysemu.h" | |
3bfe5716 | 21 | #include "sysemu/numa.h" |
33cd52b5 | 22 | #include "qemu/error-report.h" |
c6ff347c | 23 | #include "sysemu/qtest.h" |
edc24ccd | 24 | #include "hw/pci/pci.h" |
f6a0d06b | 25 | #include "hw/mem/nvdimm.h" |
6b1b1440 | 26 | |
9bf2650b CH |
27 | GlobalProperty hw_compat_4_0[] = {}; |
28 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); | |
29 | ||
abd93cc7 | 30 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
31 | { "pcie-root-port", "x-speed", "2_5" }, |
32 | { "pcie-root-port", "x-width", "1" }, | |
33 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
34 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
35 | { "tpm-crb", "ppi", "false" }, |
36 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
37 | { "usb-kbd", "serial", "42" }, |
38 | { "usb-mouse", "serial", "42" }, | |
39 | { "usb-kbd", "serial", "42" }, | |
5c81161f SG |
40 | { "virtio-blk-device", "discard", "false" }, |
41 | { "virtio-blk-device", "write-zeroes", "false" }, | |
abd93cc7 MAL |
42 | }; |
43 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
44 | ||
ddb3235d MAL |
45 | GlobalProperty hw_compat_3_0[] = {}; |
46 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
47 | ||
0d47310b | 48 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
49 | { "migration", "decompress-error-check", "off" }, |
50 | { "hda-audio", "use-timer", "false" }, | |
51 | { "cirrus-vga", "global-vmstate", "true" }, | |
52 | { "VGA", "global-vmstate", "true" }, | |
53 | { "vmware-svga", "global-vmstate", "true" }, | |
54 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
55 | }; |
56 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
57 | ||
43df70a9 | 58 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
59 | { "hpet", "hpet-offset-saved", "false" }, |
60 | { "virtio-blk-pci", "vectors", "2" }, | |
61 | { "vhost-user-blk-pci", "vectors", "2" }, | |
62 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
63 | }; |
64 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
65 | ||
503224f4 | 66 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
67 | { "virtio-mouse-device", "wheel-axis", "false" }, |
68 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
69 | }; |
70 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
71 | ||
3e803152 | 72 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
73 | { "pci-bridge", "shpc", "off" }, |
74 | { "intel-iommu", "pt", "off" }, | |
75 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
76 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
77 | }; |
78 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
79 | ||
edc24ccd | 80 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
81 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
82 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
83 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
84 | { "pci-bridge", "shpc", "on" }, | |
85 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
86 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
87 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
88 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
89 | { "cirrus-vga", "vgamem_mb", "8" }, | |
90 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
91 | }; |
92 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
93 | ||
5a995064 | 94 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
95 | { "virtio-pci", "page-per-vq", "on" }, |
96 | { "virtio-serial-device", "emergency-write", "off" }, | |
97 | { "ioapic", "version", "0x11" }, | |
98 | { "intel-iommu", "x-buggy-eim", "true" }, | |
99 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
100 | }; |
101 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
102 | ||
ff8f261f | 103 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 104 | { "virtio-mmio", "format_transport_address", "off" }, |
f2784eed DB |
105 | /* |
106 | * don't include devices which are modern-only | |
107 | * ie keyboard, mouse, tablet, gpu, vga & crypto | |
108 | */ | |
109 | { "virtio-9p-pci", "disable-modern", "on" }, | |
110 | { "virtio-9p-pci", "disable-legacy", "off" }, | |
111 | { "virtio-balloon-pci", "disable-modern", "on" }, | |
112 | { "virtio-balloon-pci", "disable-legacy", "off" }, | |
113 | { "virtio-blk-pci", "disable-modern", "on" }, | |
114 | { "virtio-blk-pci", "disable-legacy", "off" }, | |
115 | { "virtio-input-host-pci", "disable-modern", "on" }, | |
116 | { "virtio-input-host-pci", "disable-legacy", "off" }, | |
117 | { "virtio-net-pci", "disable-modern", "on" }, | |
118 | { "virtio-net-pci", "disable-legacy", "off" }, | |
119 | { "virtio-rng-pci", "disable-modern", "on" }, | |
120 | { "virtio-rng-pci", "disable-legacy", "off" }, | |
121 | { "virtio-scsi-pci", "disable-modern", "on" }, | |
122 | { "virtio-scsi-pci", "disable-legacy", "off" }, | |
123 | { "virtio-serial-pci", "disable-modern", "on" }, | |
124 | { "virtio-serial-pci", "disable-legacy", "off" }, | |
ff8f261f MAL |
125 | }; |
126 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
127 | ||
fe759610 | 128 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
129 | { "isa-fdc", "fallback", "144" }, |
130 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
131 | { "pvscsi", "x-disable-pcie", "on" }, | |
132 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
133 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
134 | }; |
135 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
136 | ||
2f99b9c2 | 137 | GlobalProperty hw_compat_2_4[] = { |
6c36bddf EH |
138 | { "virtio-blk-device", "scsi", "true" }, |
139 | { "e1000", "extra_mac_registers", "off" }, | |
140 | { "virtio-pci", "x-disable-pcie", "on" }, | |
141 | { "virtio-pci", "migrate-extra", "off" }, | |
142 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
143 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
144 | }; |
145 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
146 | ||
8995dd90 | 147 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
148 | { "virtio-blk-pci", "any_layout", "off" }, |
149 | { "virtio-balloon-pci", "any_layout", "off" }, | |
150 | { "virtio-serial-pci", "any_layout", "off" }, | |
151 | { "virtio-9p-pci", "any_layout", "off" }, | |
152 | { "virtio-rng-pci", "any_layout", "off" }, | |
153 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
154 | { "migration", "send-configuration", "off" }, | |
155 | { "migration", "send-section-footer", "off" }, | |
156 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
157 | }; |
158 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
159 | ||
1c30044e MAL |
160 | GlobalProperty hw_compat_2_2[] = {}; |
161 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
162 | ||
c4fc5695 | 163 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
164 | { "intel-hda", "old_msi_addr", "on" }, |
165 | { "VGA", "qemu-extended-regs", "off" }, | |
166 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
167 | { "virtio-scsi-pci", "any_layout", "off" }, | |
168 | { "usb-mouse", "usb_version", "1" }, | |
169 | { "usb-kbd", "usb_version", "1" }, | |
170 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
171 | }; |
172 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
173 | ||
6b1b1440 MA |
174 | static char *machine_get_accel(Object *obj, Error **errp) |
175 | { | |
176 | MachineState *ms = MACHINE(obj); | |
177 | ||
178 | return g_strdup(ms->accel); | |
179 | } | |
180 | ||
181 | static void machine_set_accel(Object *obj, const char *value, Error **errp) | |
182 | { | |
183 | MachineState *ms = MACHINE(obj); | |
184 | ||
556068ee | 185 | g_free(ms->accel); |
6b1b1440 MA |
186 | ms->accel = g_strdup(value); |
187 | } | |
188 | ||
32c18a2d | 189 | static void machine_set_kernel_irqchip(Object *obj, Visitor *v, |
d7bce999 | 190 | const char *name, void *opaque, |
32c18a2d | 191 | Error **errp) |
6b1b1440 | 192 | { |
32c18a2d | 193 | Error *err = NULL; |
6b1b1440 | 194 | MachineState *ms = MACHINE(obj); |
32c18a2d | 195 | OnOffSplit mode; |
6b1b1440 | 196 | |
51e72bc1 | 197 | visit_type_OnOffSplit(v, name, &mode, &err); |
32c18a2d MG |
198 | if (err) { |
199 | error_propagate(errp, err); | |
200 | return; | |
201 | } else { | |
202 | switch (mode) { | |
203 | case ON_OFF_SPLIT_ON: | |
204 | ms->kernel_irqchip_allowed = true; | |
205 | ms->kernel_irqchip_required = true; | |
206 | ms->kernel_irqchip_split = false; | |
207 | break; | |
208 | case ON_OFF_SPLIT_OFF: | |
209 | ms->kernel_irqchip_allowed = false; | |
210 | ms->kernel_irqchip_required = false; | |
211 | ms->kernel_irqchip_split = false; | |
212 | break; | |
213 | case ON_OFF_SPLIT_SPLIT: | |
214 | ms->kernel_irqchip_allowed = true; | |
215 | ms->kernel_irqchip_required = true; | |
216 | ms->kernel_irqchip_split = true; | |
217 | break; | |
218 | default: | |
78a39306 GK |
219 | /* The value was checked in visit_type_OnOffSplit() above. If |
220 | * we get here, then something is wrong in QEMU. | |
221 | */ | |
32c18a2d MG |
222 | abort(); |
223 | } | |
224 | } | |
6b1b1440 MA |
225 | } |
226 | ||
227 | static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v, | |
d7bce999 | 228 | const char *name, void *opaque, |
6b1b1440 MA |
229 | Error **errp) |
230 | { | |
231 | MachineState *ms = MACHINE(obj); | |
232 | int64_t value = ms->kvm_shadow_mem; | |
233 | ||
51e72bc1 | 234 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
235 | } |
236 | ||
237 | static void machine_set_kvm_shadow_mem(Object *obj, Visitor *v, | |
d7bce999 | 238 | const char *name, void *opaque, |
6b1b1440 MA |
239 | Error **errp) |
240 | { | |
241 | MachineState *ms = MACHINE(obj); | |
242 | Error *error = NULL; | |
243 | int64_t value; | |
244 | ||
51e72bc1 | 245 | visit_type_int(v, name, &value, &error); |
6b1b1440 MA |
246 | if (error) { |
247 | error_propagate(errp, error); | |
248 | return; | |
249 | } | |
250 | ||
251 | ms->kvm_shadow_mem = value; | |
252 | } | |
253 | ||
254 | static char *machine_get_kernel(Object *obj, Error **errp) | |
255 | { | |
256 | MachineState *ms = MACHINE(obj); | |
257 | ||
258 | return g_strdup(ms->kernel_filename); | |
259 | } | |
260 | ||
261 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
262 | { | |
263 | MachineState *ms = MACHINE(obj); | |
264 | ||
556068ee | 265 | g_free(ms->kernel_filename); |
6b1b1440 MA |
266 | ms->kernel_filename = g_strdup(value); |
267 | } | |
268 | ||
269 | static char *machine_get_initrd(Object *obj, Error **errp) | |
270 | { | |
271 | MachineState *ms = MACHINE(obj); | |
272 | ||
273 | return g_strdup(ms->initrd_filename); | |
274 | } | |
275 | ||
276 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
277 | { | |
278 | MachineState *ms = MACHINE(obj); | |
279 | ||
556068ee | 280 | g_free(ms->initrd_filename); |
6b1b1440 MA |
281 | ms->initrd_filename = g_strdup(value); |
282 | } | |
283 | ||
284 | static char *machine_get_append(Object *obj, Error **errp) | |
285 | { | |
286 | MachineState *ms = MACHINE(obj); | |
287 | ||
288 | return g_strdup(ms->kernel_cmdline); | |
289 | } | |
290 | ||
291 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
292 | { | |
293 | MachineState *ms = MACHINE(obj); | |
294 | ||
556068ee | 295 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
296 | ms->kernel_cmdline = g_strdup(value); |
297 | } | |
298 | ||
299 | static char *machine_get_dtb(Object *obj, Error **errp) | |
300 | { | |
301 | MachineState *ms = MACHINE(obj); | |
302 | ||
303 | return g_strdup(ms->dtb); | |
304 | } | |
305 | ||
306 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
307 | { | |
308 | MachineState *ms = MACHINE(obj); | |
309 | ||
556068ee | 310 | g_free(ms->dtb); |
6b1b1440 MA |
311 | ms->dtb = g_strdup(value); |
312 | } | |
313 | ||
314 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
315 | { | |
316 | MachineState *ms = MACHINE(obj); | |
317 | ||
318 | return g_strdup(ms->dumpdtb); | |
319 | } | |
320 | ||
321 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
322 | { | |
323 | MachineState *ms = MACHINE(obj); | |
324 | ||
556068ee | 325 | g_free(ms->dumpdtb); |
6b1b1440 MA |
326 | ms->dumpdtb = g_strdup(value); |
327 | } | |
328 | ||
329 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
330 | const char *name, void *opaque, |
331 | Error **errp) | |
6b1b1440 MA |
332 | { |
333 | MachineState *ms = MACHINE(obj); | |
334 | int64_t value = ms->phandle_start; | |
335 | ||
51e72bc1 | 336 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
337 | } |
338 | ||
339 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
340 | const char *name, void *opaque, |
341 | Error **errp) | |
6b1b1440 MA |
342 | { |
343 | MachineState *ms = MACHINE(obj); | |
344 | Error *error = NULL; | |
345 | int64_t value; | |
346 | ||
51e72bc1 | 347 | visit_type_int(v, name, &value, &error); |
6b1b1440 MA |
348 | if (error) { |
349 | error_propagate(errp, error); | |
350 | return; | |
351 | } | |
352 | ||
353 | ms->phandle_start = value; | |
354 | } | |
355 | ||
356 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
357 | { | |
358 | MachineState *ms = MACHINE(obj); | |
359 | ||
360 | return g_strdup(ms->dt_compatible); | |
361 | } | |
362 | ||
363 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
364 | { | |
365 | MachineState *ms = MACHINE(obj); | |
366 | ||
556068ee | 367 | g_free(ms->dt_compatible); |
6b1b1440 MA |
368 | ms->dt_compatible = g_strdup(value); |
369 | } | |
370 | ||
371 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
372 | { | |
373 | MachineState *ms = MACHINE(obj); | |
374 | ||
375 | return ms->dump_guest_core; | |
376 | } | |
377 | ||
378 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
379 | { | |
380 | MachineState *ms = MACHINE(obj); | |
381 | ||
382 | ms->dump_guest_core = value; | |
383 | } | |
384 | ||
385 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
386 | { | |
387 | MachineState *ms = MACHINE(obj); | |
388 | ||
389 | return ms->mem_merge; | |
390 | } | |
391 | ||
392 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
393 | { | |
394 | MachineState *ms = MACHINE(obj); | |
395 | ||
396 | ms->mem_merge = value; | |
397 | } | |
398 | ||
399 | static bool machine_get_usb(Object *obj, Error **errp) | |
400 | { | |
401 | MachineState *ms = MACHINE(obj); | |
402 | ||
403 | return ms->usb; | |
404 | } | |
405 | ||
406 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
407 | { | |
408 | MachineState *ms = MACHINE(obj); | |
409 | ||
410 | ms->usb = value; | |
c6e76503 | 411 | ms->usb_disabled = !value; |
6b1b1440 MA |
412 | } |
413 | ||
cfc58cf3 EH |
414 | static bool machine_get_graphics(Object *obj, Error **errp) |
415 | { | |
416 | MachineState *ms = MACHINE(obj); | |
417 | ||
418 | return ms->enable_graphics; | |
419 | } | |
420 | ||
421 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
422 | { | |
423 | MachineState *ms = MACHINE(obj); | |
424 | ||
425 | ms->enable_graphics = value; | |
426 | } | |
427 | ||
79814179 TC |
428 | static bool machine_get_igd_gfx_passthru(Object *obj, Error **errp) |
429 | { | |
430 | MachineState *ms = MACHINE(obj); | |
431 | ||
432 | return ms->igd_gfx_passthru; | |
433 | } | |
434 | ||
435 | static void machine_set_igd_gfx_passthru(Object *obj, bool value, Error **errp) | |
436 | { | |
437 | MachineState *ms = MACHINE(obj); | |
438 | ||
439 | ms->igd_gfx_passthru = value; | |
440 | } | |
441 | ||
6b1b1440 MA |
442 | static char *machine_get_firmware(Object *obj, Error **errp) |
443 | { | |
444 | MachineState *ms = MACHINE(obj); | |
445 | ||
446 | return g_strdup(ms->firmware); | |
447 | } | |
448 | ||
449 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
450 | { | |
451 | MachineState *ms = MACHINE(obj); | |
452 | ||
556068ee | 453 | g_free(ms->firmware); |
6b1b1440 MA |
454 | ms->firmware = g_strdup(value); |
455 | } | |
456 | ||
9850c604 AG |
457 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
458 | { | |
459 | MachineState *ms = MACHINE(obj); | |
460 | ||
461 | ms->suppress_vmdesc = value; | |
462 | } | |
463 | ||
464 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
465 | { | |
466 | MachineState *ms = MACHINE(obj); | |
467 | ||
468 | return ms->suppress_vmdesc; | |
469 | } | |
470 | ||
902c053d GK |
471 | static void machine_set_enforce_config_section(Object *obj, bool value, |
472 | Error **errp) | |
473 | { | |
474 | MachineState *ms = MACHINE(obj); | |
475 | ||
91c082ad TH |
476 | warn_report("enforce-config-section is deprecated, please use " |
477 | "-global migration.send-configuration=on|off instead"); | |
478 | ||
902c053d GK |
479 | ms->enforce_config_section = value; |
480 | } | |
481 | ||
482 | static bool machine_get_enforce_config_section(Object *obj, Error **errp) | |
483 | { | |
484 | MachineState *ms = MACHINE(obj); | |
485 | ||
486 | return ms->enforce_config_section; | |
487 | } | |
488 | ||
db588194 BS |
489 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
490 | { | |
491 | MachineState *ms = MACHINE(obj); | |
492 | ||
493 | return g_strdup(ms->memory_encryption); | |
494 | } | |
495 | ||
496 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
497 | Error **errp) | |
498 | { | |
499 | MachineState *ms = MACHINE(obj); | |
500 | ||
501 | g_free(ms->memory_encryption); | |
502 | ms->memory_encryption = g_strdup(value); | |
503 | } | |
504 | ||
f6a0d06b EA |
505 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
506 | { | |
507 | MachineState *ms = MACHINE(obj); | |
508 | ||
509 | return ms->nvdimms_state->is_enabled; | |
510 | } | |
511 | ||
512 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
513 | { | |
514 | MachineState *ms = MACHINE(obj); | |
515 | ||
516 | ms->nvdimms_state->is_enabled = value; | |
517 | } | |
518 | ||
519 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) | |
520 | { | |
521 | MachineState *ms = MACHINE(obj); | |
522 | ||
523 | return g_strdup(ms->nvdimms_state->persistence_string); | |
524 | } | |
525 | ||
526 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
527 | Error **errp) | |
528 | { | |
529 | MachineState *ms = MACHINE(obj); | |
530 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
531 | ||
532 | if (strcmp(value, "cpu") == 0) { | |
533 | nvdimms_state->persistence = 3; | |
534 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
535 | nvdimms_state->persistence = 2; | |
536 | } else { | |
537 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
538 | value); | |
539 | return; | |
540 | } | |
541 | ||
542 | g_free(nvdimms_state->persistence_string); | |
543 | nvdimms_state->persistence_string = g_strdup(value); | |
544 | } | |
545 | ||
0bd1909d | 546 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 547 | { |
0bd1909d EH |
548 | strList *item = g_new0(strList, 1); |
549 | ||
550 | item->value = g_strdup(type); | |
551 | item->next = mc->allowed_dynamic_sysbus_devices; | |
552 | mc->allowed_dynamic_sysbus_devices = item; | |
33cd52b5 AG |
553 | } |
554 | ||
0bd1909d | 555 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 556 | { |
0bd1909d EH |
557 | MachineState *machine = opaque; |
558 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
559 | bool allowed = false; | |
560 | strList *wl; | |
33cd52b5 | 561 | |
0bd1909d EH |
562 | for (wl = mc->allowed_dynamic_sysbus_devices; |
563 | !allowed && wl; | |
564 | wl = wl->next) { | |
565 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
566 | } | |
567 | ||
568 | if (!allowed) { | |
569 | error_report("Option '-device %s' cannot be handled by this machine", | |
570 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
571 | exit(1); | |
33cd52b5 | 572 | } |
0bd1909d EH |
573 | } |
574 | ||
575 | static void machine_init_notify(Notifier *notifier, void *data) | |
576 | { | |
577 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
578 | |
579 | /* | |
0bd1909d EH |
580 | * Loop through all dynamically created sysbus devices and check if they are |
581 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 582 | */ |
0bd1909d | 583 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
584 | } |
585 | ||
f2d672c2 IM |
586 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
587 | { | |
588 | int i; | |
f2d672c2 | 589 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
590 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
591 | ||
592 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
593 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 594 | |
f2d672c2 | 595 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 596 | Object *cpu; |
f2d672c2 IM |
597 | HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); |
598 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); | |
599 | ||
d342eb76 | 600 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
601 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
602 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
603 | sizeof(*cpu_item->props)); | |
604 | ||
605 | cpu = machine->possible_cpus->cpus[i].cpu; | |
606 | if (cpu) { | |
607 | cpu_item->has_qom_path = true; | |
608 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
609 | } | |
610 | list_item->value = cpu_item; | |
611 | list_item->next = head; | |
612 | head = list_item; | |
613 | } | |
614 | return head; | |
615 | } | |
616 | ||
7c88e65d IM |
617 | /** |
618 | * machine_set_cpu_numa_node: | |
619 | * @machine: machine object to modify | |
620 | * @props: specifies which cpu objects to assign to | |
621 | * numa node specified by @props.node_id | |
622 | * @errp: if an error occurs, a pointer to an area to store the error | |
623 | * | |
624 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
625 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
626 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
627 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
628 | * | |
629 | * However for CLI convenience it's possible to pass in subset of properties, | |
630 | * which would affect all cpu slots that match it. | |
631 | * Ex for pc machine: | |
632 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
633 | * -numa cpu,node-id=0,socket_id=0 \ | |
634 | * -numa cpu,node-id=1,socket_id=1 | |
635 | * will assign all child cores of socket 0 to node 0 and | |
636 | * of socket 1 to node 1. | |
637 | * | |
638 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
639 | * return error. | |
640 | * Empty subset is disallowed and function will return with error in this case. | |
641 | */ | |
642 | void machine_set_cpu_numa_node(MachineState *machine, | |
643 | const CpuInstanceProperties *props, Error **errp) | |
644 | { | |
645 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
646 | bool match = false; | |
647 | int i; | |
648 | ||
649 | if (!mc->possible_cpu_arch_ids) { | |
650 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
651 | return; | |
652 | } | |
653 | ||
654 | /* disabling node mapping is not supported, forbid it */ | |
655 | assert(props->has_node_id); | |
656 | ||
657 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
658 | mc->possible_cpu_arch_ids(machine); | |
659 | ||
660 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
661 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
662 | ||
663 | /* reject unsupported by board properties */ | |
664 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
665 | error_setg(errp, "thread-id is not supported"); | |
666 | return; | |
667 | } | |
668 | ||
669 | if (props->has_core_id && !slot->props.has_core_id) { | |
670 | error_setg(errp, "core-id is not supported"); | |
671 | return; | |
672 | } | |
673 | ||
674 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
675 | error_setg(errp, "socket-id is not supported"); | |
676 | return; | |
677 | } | |
678 | ||
679 | /* skip slots with explicit mismatch */ | |
680 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
681 | continue; | |
682 | } | |
683 | ||
684 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
685 | continue; | |
686 | } | |
687 | ||
688 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { | |
689 | continue; | |
690 | } | |
691 | ||
692 | /* reject assignment if slot is already assigned, for compatibility | |
693 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
694 | * error out if cpu thread and matched core have the same node-id */ | |
695 | if (slot->props.has_node_id && | |
696 | slot->props.node_id != props->node_id) { | |
697 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
698 | slot->props.node_id); | |
699 | return; | |
700 | } | |
701 | ||
702 | /* assign slot to node as it's matched '-numa cpu' key */ | |
703 | match = true; | |
704 | slot->props.node_id = props->node_id; | |
705 | slot->props.has_node_id = props->has_node_id; | |
706 | } | |
707 | ||
708 | if (!match) { | |
709 | error_setg(errp, "no match found"); | |
710 | } | |
711 | } | |
712 | ||
076b35b5 ND |
713 | static void machine_class_init(ObjectClass *oc, void *data) |
714 | { | |
715 | MachineClass *mc = MACHINE_CLASS(oc); | |
716 | ||
717 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 718 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 719 | mc->rom_file_has_mr = true; |
26b81df4 | 720 | |
55641213 LV |
721 | /* numa node memory size aligned on 8MB by default. |
722 | * On Linux, each node's border has to be 8MB aligned | |
723 | */ | |
724 | mc->numa_mem_align_shift = 23; | |
3bfe5716 | 725 | mc->numa_auto_assign_ram = numa_default_auto_assign_ram; |
55641213 | 726 | |
26b81df4 EH |
727 | object_class_property_add_str(oc, "accel", |
728 | machine_get_accel, machine_set_accel, &error_abort); | |
729 | object_class_property_set_description(oc, "accel", | |
730 | "Accelerator list", &error_abort); | |
731 | ||
e80200c5 | 732 | object_class_property_add(oc, "kernel-irqchip", "on|off|split", |
26b81df4 EH |
733 | NULL, machine_set_kernel_irqchip, |
734 | NULL, NULL, &error_abort); | |
735 | object_class_property_set_description(oc, "kernel-irqchip", | |
736 | "Configure KVM in-kernel irqchip", &error_abort); | |
737 | ||
738 | object_class_property_add(oc, "kvm-shadow-mem", "int", | |
739 | machine_get_kvm_shadow_mem, machine_set_kvm_shadow_mem, | |
740 | NULL, NULL, &error_abort); | |
741 | object_class_property_set_description(oc, "kvm-shadow-mem", | |
742 | "KVM shadow MMU size", &error_abort); | |
743 | ||
744 | object_class_property_add_str(oc, "kernel", | |
745 | machine_get_kernel, machine_set_kernel, &error_abort); | |
746 | object_class_property_set_description(oc, "kernel", | |
747 | "Linux kernel image file", &error_abort); | |
748 | ||
749 | object_class_property_add_str(oc, "initrd", | |
750 | machine_get_initrd, machine_set_initrd, &error_abort); | |
751 | object_class_property_set_description(oc, "initrd", | |
752 | "Linux initial ramdisk file", &error_abort); | |
753 | ||
754 | object_class_property_add_str(oc, "append", | |
755 | machine_get_append, machine_set_append, &error_abort); | |
756 | object_class_property_set_description(oc, "append", | |
757 | "Linux kernel command line", &error_abort); | |
758 | ||
759 | object_class_property_add_str(oc, "dtb", | |
760 | machine_get_dtb, machine_set_dtb, &error_abort); | |
761 | object_class_property_set_description(oc, "dtb", | |
762 | "Linux kernel device tree file", &error_abort); | |
763 | ||
764 | object_class_property_add_str(oc, "dumpdtb", | |
765 | machine_get_dumpdtb, machine_set_dumpdtb, &error_abort); | |
766 | object_class_property_set_description(oc, "dumpdtb", | |
767 | "Dump current dtb to a file and quit", &error_abort); | |
768 | ||
769 | object_class_property_add(oc, "phandle-start", "int", | |
770 | machine_get_phandle_start, machine_set_phandle_start, | |
771 | NULL, NULL, &error_abort); | |
772 | object_class_property_set_description(oc, "phandle-start", | |
773 | "The first phandle ID we may generate dynamically", &error_abort); | |
774 | ||
775 | object_class_property_add_str(oc, "dt-compatible", | |
776 | machine_get_dt_compatible, machine_set_dt_compatible, &error_abort); | |
777 | object_class_property_set_description(oc, "dt-compatible", | |
778 | "Overrides the \"compatible\" property of the dt root node", | |
779 | &error_abort); | |
780 | ||
781 | object_class_property_add_bool(oc, "dump-guest-core", | |
782 | machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort); | |
783 | object_class_property_set_description(oc, "dump-guest-core", | |
097f699c | 784 | "Include guest memory in a core dump", &error_abort); |
26b81df4 EH |
785 | |
786 | object_class_property_add_bool(oc, "mem-merge", | |
787 | machine_get_mem_merge, machine_set_mem_merge, &error_abort); | |
788 | object_class_property_set_description(oc, "mem-merge", | |
789 | "Enable/disable memory merge support", &error_abort); | |
790 | ||
791 | object_class_property_add_bool(oc, "usb", | |
792 | machine_get_usb, machine_set_usb, &error_abort); | |
793 | object_class_property_set_description(oc, "usb", | |
794 | "Set on/off to enable/disable usb", &error_abort); | |
795 | ||
796 | object_class_property_add_bool(oc, "graphics", | |
797 | machine_get_graphics, machine_set_graphics, &error_abort); | |
798 | object_class_property_set_description(oc, "graphics", | |
799 | "Set on/off to enable/disable graphics emulation", &error_abort); | |
800 | ||
801 | object_class_property_add_bool(oc, "igd-passthru", | |
802 | machine_get_igd_gfx_passthru, machine_set_igd_gfx_passthru, | |
803 | &error_abort); | |
804 | object_class_property_set_description(oc, "igd-passthru", | |
805 | "Set on/off to enable/disable igd passthrou", &error_abort); | |
806 | ||
807 | object_class_property_add_str(oc, "firmware", | |
808 | machine_get_firmware, machine_set_firmware, | |
809 | &error_abort); | |
810 | object_class_property_set_description(oc, "firmware", | |
811 | "Firmware image", &error_abort); | |
812 | ||
813 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
814 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc, | |
815 | &error_abort); | |
816 | object_class_property_set_description(oc, "suppress-vmdesc", | |
817 | "Set on to disable self-describing migration", &error_abort); | |
818 | ||
819 | object_class_property_add_bool(oc, "enforce-config-section", | |
820 | machine_get_enforce_config_section, machine_set_enforce_config_section, | |
821 | &error_abort); | |
822 | object_class_property_set_description(oc, "enforce-config-section", | |
823 | "Set on to enforce configuration section migration", &error_abort); | |
db588194 BS |
824 | |
825 | object_class_property_add_str(oc, "memory-encryption", | |
826 | machine_get_memory_encryption, machine_set_memory_encryption, | |
827 | &error_abort); | |
828 | object_class_property_set_description(oc, "memory-encryption", | |
bfec23a0 | 829 | "Set memory encryption object to use", &error_abort); |
076b35b5 ND |
830 | } |
831 | ||
dcb3d601 EH |
832 | static void machine_class_base_init(ObjectClass *oc, void *data) |
833 | { | |
834 | if (!object_class_is_abstract(oc)) { | |
98cec76a | 835 | MachineClass *mc = MACHINE_CLASS(oc); |
dcb3d601 EH |
836 | const char *cname = object_class_get_name(oc); |
837 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
838 | mc->name = g_strndup(cname, |
839 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 840 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
841 | } |
842 | } | |
843 | ||
6b1b1440 MA |
844 | static void machine_initfn(Object *obj) |
845 | { | |
33cd52b5 | 846 | MachineState *ms = MACHINE(obj); |
b2fc91db | 847 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 848 | |
d8870d02 | 849 | ms->kernel_irqchip_allowed = true; |
b2fc91db | 850 | ms->kernel_irqchip_split = mc->default_kernel_irqchip_split; |
4689b77b | 851 | ms->kvm_shadow_mem = -1; |
47c8ca53 | 852 | ms->dump_guest_core = true; |
75cc7f01 | 853 | ms->mem_merge = true; |
cfc58cf3 | 854 | ms->enable_graphics = true; |
d8870d02 | 855 | |
f6a0d06b EA |
856 | if (mc->nvdimm_supported) { |
857 | Object *obj = OBJECT(ms); | |
858 | ||
859 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
860 | object_property_add_bool(obj, "nvdimm", | |
861 | machine_get_nvdimm, machine_set_nvdimm, | |
862 | &error_abort); | |
863 | object_property_set_description(obj, "nvdimm", | |
864 | "Set on/off to enable/disable " | |
865 | "NVDIMM instantiation", NULL); | |
866 | ||
867 | object_property_add_str(obj, "nvdimm-persistence", | |
868 | machine_get_nvdimm_persistence, | |
869 | machine_set_nvdimm_persistence, | |
870 | &error_abort); | |
871 | object_property_set_description(obj, "nvdimm-persistence", | |
872 | "Set NVDIMM persistence" | |
873 | "Valid values are cpu, mem-ctrl", | |
874 | NULL); | |
875 | } | |
876 | ||
877 | ||
33cd52b5 AG |
878 | /* Register notifier when init is done for sysbus sanity checks */ |
879 | ms->sysbus_notifier.notify = machine_init_notify; | |
880 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
6b1b1440 MA |
881 | } |
882 | ||
883 | static void machine_finalize(Object *obj) | |
884 | { | |
885 | MachineState *ms = MACHINE(obj); | |
886 | ||
887 | g_free(ms->accel); | |
888 | g_free(ms->kernel_filename); | |
889 | g_free(ms->initrd_filename); | |
890 | g_free(ms->kernel_cmdline); | |
891 | g_free(ms->dtb); | |
892 | g_free(ms->dumpdtb); | |
893 | g_free(ms->dt_compatible); | |
894 | g_free(ms->firmware); | |
2ff4f67c | 895 | g_free(ms->device_memory); |
f6a0d06b | 896 | g_free(ms->nvdimms_state); |
6b1b1440 | 897 | } |
36d20cb2 | 898 | |
5e97b623 MA |
899 | bool machine_usb(MachineState *machine) |
900 | { | |
901 | return machine->usb; | |
902 | } | |
903 | ||
d8870d02 MA |
904 | bool machine_kernel_irqchip_allowed(MachineState *machine) |
905 | { | |
906 | return machine->kernel_irqchip_allowed; | |
907 | } | |
908 | ||
909 | bool machine_kernel_irqchip_required(MachineState *machine) | |
910 | { | |
911 | return machine->kernel_irqchip_required; | |
912 | } | |
913 | ||
32c18a2d MG |
914 | bool machine_kernel_irqchip_split(MachineState *machine) |
915 | { | |
916 | return machine->kernel_irqchip_split; | |
917 | } | |
918 | ||
4689b77b MA |
919 | int machine_kvm_shadow_mem(MachineState *machine) |
920 | { | |
921 | return machine->kvm_shadow_mem; | |
922 | } | |
923 | ||
6cabe7fa MA |
924 | int machine_phandle_start(MachineState *machine) |
925 | { | |
926 | return machine->phandle_start; | |
927 | } | |
928 | ||
47c8ca53 MA |
929 | bool machine_dump_guest_core(MachineState *machine) |
930 | { | |
931 | return machine->dump_guest_core; | |
932 | } | |
933 | ||
75cc7f01 MA |
934 | bool machine_mem_merge(MachineState *machine) |
935 | { | |
936 | return machine->mem_merge; | |
937 | } | |
938 | ||
ec78f811 IM |
939 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
940 | { | |
941 | GString *s = g_string_new(NULL); | |
942 | if (cpu->props.has_socket_id) { | |
943 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
944 | } | |
945 | if (cpu->props.has_core_id) { | |
946 | if (s->len) { | |
947 | g_string_append_printf(s, ", "); | |
948 | } | |
949 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
950 | } | |
951 | if (cpu->props.has_thread_id) { | |
952 | if (s->len) { | |
953 | g_string_append_printf(s, ", "); | |
954 | } | |
955 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
956 | } | |
957 | return g_string_free(s, false); | |
958 | } | |
959 | ||
7a3099fc | 960 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
961 | { |
962 | int i; | |
60bed6a3 | 963 | bool default_mapping; |
ec78f811 IM |
964 | GString *s = g_string_new(NULL); |
965 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
966 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
967 | ||
968 | assert(nb_numa_nodes); | |
60bed6a3 IM |
969 | for (i = 0; i < possible_cpus->len; i++) { |
970 | if (possible_cpus->cpus[i].props.has_node_id) { | |
971 | break; | |
972 | } | |
973 | } | |
974 | default_mapping = (i == possible_cpus->len); | |
975 | ||
ec78f811 IM |
976 | for (i = 0; i < possible_cpus->len; i++) { |
977 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
978 | ||
ec78f811 | 979 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
980 | /* fetch default mapping from board and enable it */ |
981 | CpuInstanceProperties props = cpu_slot->props; | |
982 | ||
79e07936 | 983 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 984 | if (!default_mapping) { |
60bed6a3 IM |
985 | /* record slots with not set mapping, |
986 | * TODO: make it hard error in future */ | |
987 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
988 | g_string_append_printf(s, "%sCPU %d [%s]", | |
989 | s->len ? ", " : "", i, cpu_str); | |
990 | g_free(cpu_str); | |
d41f3e75 IM |
991 | |
992 | /* non mapped cpus used to fallback to node 0 */ | |
993 | props.node_id = 0; | |
60bed6a3 | 994 | } |
d41f3e75 IM |
995 | |
996 | props.has_node_id = true; | |
997 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
998 | } |
999 | } | |
c6ff347c | 1000 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1001 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1002 | s->str); | |
1003 | warn_report("All CPU(s) up to maxcpus should be described " | |
1004 | "in NUMA config, ability to start up with partial NUMA " | |
1005 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1006 | } |
1007 | g_string_free(s, true); | |
1008 | } | |
1009 | ||
482dfe9a IM |
1010 | void machine_run_board_init(MachineState *machine) |
1011 | { | |
1012 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
ec78f811 | 1013 | |
7747abf1 | 1014 | numa_complete_configuration(machine); |
3aeaac8f | 1015 | if (nb_numa_nodes) { |
7a3099fc | 1016 | machine_numa_finish_cpu_init(machine); |
3aeaac8f | 1017 | } |
c9cf636d AF |
1018 | |
1019 | /* If the machine supports the valid_cpu_types check and the user | |
1020 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1021 | */ | |
1022 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
1023 | ObjectClass *class = object_class_by_name(machine->cpu_type); | |
1024 | int i; | |
1025 | ||
1026 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
1027 | if (object_class_dynamic_cast(class, | |
1028 | machine_class->valid_cpu_types[i])) { | |
1029 | /* The user specificed CPU is in the valid field, we are | |
1030 | * good to go. | |
1031 | */ | |
1032 | break; | |
1033 | } | |
1034 | } | |
1035 | ||
1036 | if (!machine_class->valid_cpu_types[i]) { | |
1037 | /* The user specified CPU is not valid */ | |
1038 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1039 | error_printf("The valid types are: %s", | |
1040 | machine_class->valid_cpu_types[0]); | |
1041 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1042 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1043 | } | |
1044 | error_printf("\n"); | |
1045 | ||
1046 | exit(1); | |
1047 | } | |
1048 | } | |
1049 | ||
482dfe9a IM |
1050 | machine_class->init(machine); |
1051 | } | |
1052 | ||
36d20cb2 MA |
1053 | static const TypeInfo machine_info = { |
1054 | .name = TYPE_MACHINE, | |
1055 | .parent = TYPE_OBJECT, | |
1056 | .abstract = true, | |
1057 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1058 | .class_init = machine_class_init, |
dcb3d601 | 1059 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1060 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1061 | .instance_init = machine_initfn, |
1062 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1063 | }; |
1064 | ||
1065 | static void machine_register_types(void) | |
1066 | { | |
1067 | type_register_static(&machine_info); | |
1068 | } | |
1069 | ||
1070 | type_init(machine_register_types) |