]>
Commit | Line | Data |
---|---|---|
36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
6f479566 | 14 | #include "qemu/option.h" |
cc6ff741 | 15 | #include "qemu/accel.h" |
6f479566 | 16 | #include "sysemu/replay.h" |
fc6b3cf9 | 17 | #include "qemu/units.h" |
36d20cb2 | 18 | #include "hw/boards.h" |
f66dc873 | 19 | #include "hw/loader.h" |
da34e65c | 20 | #include "qapi/error.h" |
9af23989 | 21 | #include "qapi/qapi-visit-common.h" |
fe68090e | 22 | #include "qapi/qapi-visit-machine.h" |
6b1b1440 | 23 | #include "qapi/visitor.h" |
fb56b7a0 | 24 | #include "qom/object_interfaces.h" |
33cd52b5 | 25 | #include "hw/sysbus.h" |
f66dc873 | 26 | #include "sysemu/cpus.h" |
33cd52b5 | 27 | #include "sysemu/sysemu.h" |
f66dc873 PB |
28 | #include "sysemu/reset.h" |
29 | #include "sysemu/runstate.h" | |
3bfe5716 | 30 | #include "sysemu/numa.h" |
fb56b7a0 | 31 | #include "sysemu/xen.h" |
33cd52b5 | 32 | #include "qemu/error-report.h" |
c6ff347c | 33 | #include "sysemu/qtest.h" |
edc24ccd | 34 | #include "hw/pci/pci.h" |
f6a0d06b | 35 | #include "hw/mem/nvdimm.h" |
f66dc873 | 36 | #include "migration/global_state.h" |
82b911aa | 37 | #include "migration/vmstate.h" |
e0292d7c | 38 | #include "exec/confidential-guest-support.h" |
9f88a7a3 DG |
39 | #include "hw/virtio/virtio.h" |
40 | #include "hw/virtio/virtio-pci.h" | |
53da8b5a | 41 | #include "hw/virtio/virtio-net.h" |
7a2c7da6 | 42 | #include "audio/audio.h" |
6b1b1440 | 43 | |
95f5c89e CH |
44 | GlobalProperty hw_compat_8_1[] = {}; |
45 | const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); | |
46 | ||
77c259a4 JQ |
47 | GlobalProperty hw_compat_8_0[] = { |
48 | { "migration", "multifd-flush-after-each-section", "on"}, | |
7c228c5f | 49 | { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" }, |
53da8b5a YB |
50 | { TYPE_VIRTIO_NET, "host_uso", "off"}, |
51 | { TYPE_VIRTIO_NET, "guest_uso4", "off"}, | |
52 | { TYPE_VIRTIO_NET, "guest_uso6", "off"}, | |
77c259a4 | 53 | }; |
f9be4771 CH |
54 | const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); |
55 | ||
3b95a71b | 56 | GlobalProperty hw_compat_7_2[] = { |
5fb7d149 | 57 | { "e1000e", "migrate-timadj", "off" }, |
3b95a71b | 58 | { "virtio-mem", "x-early-migration", "false" }, |
6621883f | 59 | { "migration", "x-preempt-pre-7-2", "true" }, |
5ed3dabe | 60 | { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" }, |
3b95a71b | 61 | }; |
db723c80 CH |
62 | const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); |
63 | ||
69e1c14a KX |
64 | GlobalProperty hw_compat_7_1[] = { |
65 | { "virtio-device", "queue_reset", "false" }, | |
bad9c5a5 | 66 | { "virtio-rng-pci", "vectors", "0" }, |
62bdb887 DDAG |
67 | { "virtio-rng-pci-transitional", "vectors", "0" }, |
68 | { "virtio-rng-pci-non-transitional", "vectors", "0" }, | |
69e1c14a | 69 | }; |
f514e147 CH |
70 | const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); |
71 | ||
39f29e59 PM |
72 | GlobalProperty hw_compat_7_0[] = { |
73 | { "arm-gicv3-common", "force-8-bit-prio", "on" }, | |
36d83272 | 74 | { "nvme-ns", "eui64-default", "on"}, |
39f29e59 | 75 | }; |
0ca70366 CH |
76 | const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); |
77 | ||
a83c2844 DDAG |
78 | GlobalProperty hw_compat_6_2[] = { |
79 | { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, | |
80 | }; | |
01854af2 CH |
81 | const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); |
82 | ||
46ce0171 SG |
83 | GlobalProperty hw_compat_6_1[] = { |
84 | { "vhost-user-vsock-device", "seqpacket", "off" }, | |
916b0f0b | 85 | { "nvme-ns", "shared", "off" }, |
46ce0171 | 86 | }; |
52e64f5b YW |
87 | const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); |
88 | ||
a6091108 PM |
89 | GlobalProperty hw_compat_6_0[] = { |
90 | { "gpex-pcihost", "allow-unmapped-accesses", "false" }, | |
ff6e1624 | 91 | { "i8042", "extended-state", "false"}, |
3276dde4 | 92 | { "nvme-ns", "eui64-default", "off"}, |
a1d7e475 | 93 | { "e1000", "init-vet", "off" }, |
d8970569 | 94 | { "e1000e", "init-vet", "off" }, |
d6a9378f | 95 | { "vhost-vsock-device", "seqpacket", "off" }, |
a6091108 | 96 | }; |
da7e13c0 CH |
97 | const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); |
98 | ||
6be8cf56 IY |
99 | GlobalProperty hw_compat_5_2[] = { |
100 | { "ICH9-LPC", "smm-compat", "on"}, | |
101 | { "PIIX4_PM", "smm-compat", "on"}, | |
fb0b154c | 102 | { "virtio-blk-device", "report-discard-granularity", "off" }, |
3fd641ac | 103 | { "virtio-net-pci-base", "vectors", "3"}, |
6be8cf56 | 104 | }; |
576a00bd CH |
105 | const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); |
106 | ||
6a558822 SH |
107 | GlobalProperty hw_compat_5_1[] = { |
108 | { "vhost-scsi", "num_queues", "1"}, | |
a4eef071 | 109 | { "vhost-user-blk", "num-queues", "1"}, |
6a558822 | 110 | { "vhost-user-scsi", "num_queues", "1"}, |
9445e1e1 | 111 | { "virtio-blk-device", "num-queues", "1"}, |
6a558822 | 112 | { "virtio-scsi-device", "num_queues", "1"}, |
6eb7a071 | 113 | { "nvme", "use-intel-id", "on"}, |
b1b0393c | 114 | { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ |
e6fa978d | 115 | { "pl011", "migrate-clk", "off" }, |
d83f46d1 | 116 | { "virtio-pci", "x-ats-page-aligned", "off"}, |
6a558822 | 117 | }; |
3ff3c5d3 CH |
118 | const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); |
119 | ||
7483cbba | 120 | GlobalProperty hw_compat_5_0[] = { |
2ebc2121 | 121 | { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, |
7483cbba | 122 | { "virtio-balloon-device", "page-poison", "false" }, |
f983ff95 PB |
123 | { "vmport", "x-read-set-eax", "off" }, |
124 | { "vmport", "x-signal-unsupported-cmd", "off" }, | |
125 | { "vmport", "x-report-vmx-type", "off" }, | |
126 | { "vmport", "x-cmds-v2", "off" }, | |
d55f5182 | 127 | { "virtio-device", "x-disable-legacy-check", "true" }, |
7483cbba | 128 | }; |
541aaa1d CH |
129 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
130 | ||
5f258577 | 131 | GlobalProperty hw_compat_4_2[] = { |
c9b7d9ec DP |
132 | { "virtio-blk-device", "queue-size", "128"}, |
133 | { "virtio-scsi-device", "virtqueue_size", "128"}, | |
5f258577 | 134 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
1bf8a989 DP |
135 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
136 | { "virtio-scsi-device", "seg_max_adjust", "off"}, | |
137 | { "vhost-blk-device", "seg_max_adjust", "off"}, | |
7bacaf5f | 138 | { "usb-host", "suppress-remote-wake", "off" }, |
32187f3d | 139 | { "usb-redir", "suppress-remote-wake", "off" }, |
ed71c09f GH |
140 | { "qxl", "revision", "4" }, |
141 | { "qxl-vga", "revision", "4" }, | |
394f0f72 | 142 | { "fw_cfg", "acpi-mr-restore", "false" }, |
c126b4c5 | 143 | { "virtio-device", "use-disabled-flag", "false" }, |
5f258577 EY |
144 | }; |
145 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); | |
146 | ||
eb1556c4 JS |
147 | GlobalProperty hw_compat_4_1[] = { |
148 | { "virtio-pci", "x-pcie-flr-init", "off" }, | |
149 | }; | |
9aec2e52 CH |
150 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
151 | ||
8e8cbed0 | 152 | GlobalProperty hw_compat_4_0[] = { |
0a719662 GH |
153 | { "VGA", "edid", "false" }, |
154 | { "secondary-vga", "edid", "false" }, | |
155 | { "bochs-display", "edid", "false" }, | |
156 | { "virtio-vga", "edid", "false" }, | |
02501fc3 | 157 | { "virtio-gpu-device", "edid", "false" }, |
e57f2c31 | 158 | { "virtio-device", "use-started", "false" }, |
2bbadb08 | 159 | { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, |
032cfe6a | 160 | { "pl031", "migrate-tick-offset", "false" }, |
0a719662 | 161 | }; |
9bf2650b CH |
162 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); |
163 | ||
abd93cc7 | 164 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
165 | { "pcie-root-port", "x-speed", "2_5" }, |
166 | { "pcie-root-port", "x-width", "1" }, | |
167 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
168 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
169 | { "tpm-crb", "ppi", "false" }, |
170 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
171 | { "usb-kbd", "serial", "42" }, |
172 | { "usb-mouse", "serial", "42" }, | |
442bac16 | 173 | { "usb-tablet", "serial", "42" }, |
5c81161f SG |
174 | { "virtio-blk-device", "discard", "false" }, |
175 | { "virtio-blk-device", "write-zeroes", "false" }, | |
2bbadb08 | 176 | { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, |
c8557f1b | 177 | { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ |
abd93cc7 MAL |
178 | }; |
179 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
180 | ||
ddb3235d MAL |
181 | GlobalProperty hw_compat_3_0[] = {}; |
182 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
183 | ||
0d47310b | 184 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
185 | { "migration", "decompress-error-check", "off" }, |
186 | { "hda-audio", "use-timer", "false" }, | |
187 | { "cirrus-vga", "global-vmstate", "true" }, | |
188 | { "VGA", "global-vmstate", "true" }, | |
189 | { "vmware-svga", "global-vmstate", "true" }, | |
190 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
191 | }; |
192 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
193 | ||
43df70a9 | 194 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
195 | { "hpet", "hpet-offset-saved", "false" }, |
196 | { "virtio-blk-pci", "vectors", "2" }, | |
197 | { "vhost-user-blk-pci", "vectors", "2" }, | |
198 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
199 | }; |
200 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
201 | ||
503224f4 | 202 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
203 | { "virtio-mouse-device", "wheel-axis", "false" }, |
204 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
205 | }; |
206 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
207 | ||
3e803152 | 208 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
209 | { "pci-bridge", "shpc", "off" }, |
210 | { "intel-iommu", "pt", "off" }, | |
211 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
212 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
213 | }; |
214 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
215 | ||
edc24ccd | 216 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
217 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
218 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
219 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
220 | { "pci-bridge", "shpc", "on" }, | |
221 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
222 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
223 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
224 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
225 | { "cirrus-vga", "vgamem_mb", "8" }, | |
226 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
227 | }; |
228 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
229 | ||
5a995064 | 230 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
231 | { "virtio-pci", "page-per-vq", "on" }, |
232 | { "virtio-serial-device", "emergency-write", "off" }, | |
233 | { "ioapic", "version", "0x11" }, | |
234 | { "intel-iommu", "x-buggy-eim", "true" }, | |
235 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
236 | }; |
237 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
238 | ||
ff8f261f | 239 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 240 | { "virtio-mmio", "format_transport_address", "off" }, |
dd56040d DDAG |
241 | /* Optional because not all virtio-pci devices support legacy mode */ |
242 | { "virtio-pci", "disable-modern", "on", .optional = true }, | |
243 | { "virtio-pci", "disable-legacy", "off", .optional = true }, | |
ff8f261f MAL |
244 | }; |
245 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
246 | ||
fe759610 | 247 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
248 | { "isa-fdc", "fallback", "144" }, |
249 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
250 | { "pvscsi", "x-disable-pcie", "on" }, | |
251 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
252 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
253 | }; |
254 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
255 | ||
2f99b9c2 | 256 | GlobalProperty hw_compat_2_4[] = { |
11a18c84 PMD |
257 | /* Optional because the 'scsi' property is Linux-only */ |
258 | { "virtio-blk-device", "scsi", "true", .optional = true }, | |
6c36bddf EH |
259 | { "e1000", "extra_mac_registers", "off" }, |
260 | { "virtio-pci", "x-disable-pcie", "on" }, | |
261 | { "virtio-pci", "migrate-extra", "off" }, | |
262 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
263 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
264 | }; |
265 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
266 | ||
8995dd90 | 267 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
268 | { "virtio-blk-pci", "any_layout", "off" }, |
269 | { "virtio-balloon-pci", "any_layout", "off" }, | |
270 | { "virtio-serial-pci", "any_layout", "off" }, | |
271 | { "virtio-9p-pci", "any_layout", "off" }, | |
272 | { "virtio-rng-pci", "any_layout", "off" }, | |
273 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
274 | { "migration", "send-configuration", "off" }, | |
275 | { "migration", "send-section-footer", "off" }, | |
276 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
277 | }; |
278 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
279 | ||
1c30044e MAL |
280 | GlobalProperty hw_compat_2_2[] = {}; |
281 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
282 | ||
c4fc5695 | 283 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
284 | { "intel-hda", "old_msi_addr", "on" }, |
285 | { "VGA", "qemu-extended-regs", "off" }, | |
286 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
287 | { "virtio-scsi-pci", "any_layout", "off" }, | |
288 | { "usb-mouse", "usb_version", "1" }, | |
289 | { "usb-kbd", "usb_version", "1" }, | |
290 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
291 | }; |
292 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
293 | ||
c5e3c918 PB |
294 | MachineState *current_machine; |
295 | ||
6b1b1440 MA |
296 | static char *machine_get_kernel(Object *obj, Error **errp) |
297 | { | |
298 | MachineState *ms = MACHINE(obj); | |
299 | ||
300 | return g_strdup(ms->kernel_filename); | |
301 | } | |
302 | ||
303 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
304 | { | |
305 | MachineState *ms = MACHINE(obj); | |
306 | ||
556068ee | 307 | g_free(ms->kernel_filename); |
6b1b1440 MA |
308 | ms->kernel_filename = g_strdup(value); |
309 | } | |
310 | ||
311 | static char *machine_get_initrd(Object *obj, Error **errp) | |
312 | { | |
313 | MachineState *ms = MACHINE(obj); | |
314 | ||
315 | return g_strdup(ms->initrd_filename); | |
316 | } | |
317 | ||
318 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
319 | { | |
320 | MachineState *ms = MACHINE(obj); | |
321 | ||
556068ee | 322 | g_free(ms->initrd_filename); |
6b1b1440 MA |
323 | ms->initrd_filename = g_strdup(value); |
324 | } | |
325 | ||
326 | static char *machine_get_append(Object *obj, Error **errp) | |
327 | { | |
328 | MachineState *ms = MACHINE(obj); | |
329 | ||
330 | return g_strdup(ms->kernel_cmdline); | |
331 | } | |
332 | ||
333 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
334 | { | |
335 | MachineState *ms = MACHINE(obj); | |
336 | ||
556068ee | 337 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
338 | ms->kernel_cmdline = g_strdup(value); |
339 | } | |
340 | ||
341 | static char *machine_get_dtb(Object *obj, Error **errp) | |
342 | { | |
343 | MachineState *ms = MACHINE(obj); | |
344 | ||
345 | return g_strdup(ms->dtb); | |
346 | } | |
347 | ||
348 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
349 | { | |
350 | MachineState *ms = MACHINE(obj); | |
351 | ||
556068ee | 352 | g_free(ms->dtb); |
6b1b1440 MA |
353 | ms->dtb = g_strdup(value); |
354 | } | |
355 | ||
356 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
357 | { | |
358 | MachineState *ms = MACHINE(obj); | |
359 | ||
360 | return g_strdup(ms->dumpdtb); | |
361 | } | |
362 | ||
363 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
364 | { | |
365 | MachineState *ms = MACHINE(obj); | |
366 | ||
556068ee | 367 | g_free(ms->dumpdtb); |
6b1b1440 MA |
368 | ms->dumpdtb = g_strdup(value); |
369 | } | |
370 | ||
371 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
372 | const char *name, void *opaque, |
373 | Error **errp) | |
6b1b1440 MA |
374 | { |
375 | MachineState *ms = MACHINE(obj); | |
376 | int64_t value = ms->phandle_start; | |
377 | ||
51e72bc1 | 378 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
379 | } |
380 | ||
381 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
382 | const char *name, void *opaque, |
383 | Error **errp) | |
6b1b1440 MA |
384 | { |
385 | MachineState *ms = MACHINE(obj); | |
6b1b1440 MA |
386 | int64_t value; |
387 | ||
668f62ec | 388 | if (!visit_type_int(v, name, &value, errp)) { |
6b1b1440 MA |
389 | return; |
390 | } | |
391 | ||
392 | ms->phandle_start = value; | |
393 | } | |
394 | ||
395 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
396 | { | |
397 | MachineState *ms = MACHINE(obj); | |
398 | ||
399 | return g_strdup(ms->dt_compatible); | |
400 | } | |
401 | ||
402 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
403 | { | |
404 | MachineState *ms = MACHINE(obj); | |
405 | ||
556068ee | 406 | g_free(ms->dt_compatible); |
6b1b1440 MA |
407 | ms->dt_compatible = g_strdup(value); |
408 | } | |
409 | ||
410 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
411 | { | |
412 | MachineState *ms = MACHINE(obj); | |
413 | ||
414 | return ms->dump_guest_core; | |
415 | } | |
416 | ||
417 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
418 | { | |
419 | MachineState *ms = MACHINE(obj); | |
420 | ||
421 | ms->dump_guest_core = value; | |
422 | } | |
423 | ||
424 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
425 | { | |
426 | MachineState *ms = MACHINE(obj); | |
427 | ||
428 | return ms->mem_merge; | |
429 | } | |
430 | ||
431 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
432 | { | |
433 | MachineState *ms = MACHINE(obj); | |
434 | ||
435 | ms->mem_merge = value; | |
436 | } | |
437 | ||
438 | static bool machine_get_usb(Object *obj, Error **errp) | |
439 | { | |
440 | MachineState *ms = MACHINE(obj); | |
441 | ||
442 | return ms->usb; | |
443 | } | |
444 | ||
445 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
446 | { | |
447 | MachineState *ms = MACHINE(obj); | |
448 | ||
449 | ms->usb = value; | |
c6e76503 | 450 | ms->usb_disabled = !value; |
6b1b1440 MA |
451 | } |
452 | ||
cfc58cf3 EH |
453 | static bool machine_get_graphics(Object *obj, Error **errp) |
454 | { | |
455 | MachineState *ms = MACHINE(obj); | |
456 | ||
457 | return ms->enable_graphics; | |
458 | } | |
459 | ||
460 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
461 | { | |
462 | MachineState *ms = MACHINE(obj); | |
463 | ||
464 | ms->enable_graphics = value; | |
465 | } | |
466 | ||
6b1b1440 MA |
467 | static char *machine_get_firmware(Object *obj, Error **errp) |
468 | { | |
469 | MachineState *ms = MACHINE(obj); | |
470 | ||
471 | return g_strdup(ms->firmware); | |
472 | } | |
473 | ||
474 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
475 | { | |
476 | MachineState *ms = MACHINE(obj); | |
477 | ||
556068ee | 478 | g_free(ms->firmware); |
6b1b1440 MA |
479 | ms->firmware = g_strdup(value); |
480 | } | |
481 | ||
9850c604 AG |
482 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
483 | { | |
484 | MachineState *ms = MACHINE(obj); | |
485 | ||
486 | ms->suppress_vmdesc = value; | |
487 | } | |
488 | ||
489 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
490 | { | |
491 | MachineState *ms = MACHINE(obj); | |
492 | ||
493 | return ms->suppress_vmdesc; | |
494 | } | |
495 | ||
db588194 BS |
496 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
497 | { | |
498 | MachineState *ms = MACHINE(obj); | |
499 | ||
e0292d7c DG |
500 | if (ms->cgs) { |
501 | return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); | |
502 | } | |
503 | ||
504 | return NULL; | |
db588194 BS |
505 | } |
506 | ||
507 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
508 | Error **errp) | |
509 | { | |
e0292d7c DG |
510 | Object *cgs = |
511 | object_resolve_path_component(object_get_objects_root(), value); | |
512 | ||
513 | if (!cgs) { | |
514 | error_setg(errp, "No such memory encryption object '%s'", value); | |
515 | return; | |
516 | } | |
db588194 | 517 | |
e0292d7c DG |
518 | object_property_set_link(obj, "confidential-guest-support", cgs, errp); |
519 | } | |
520 | ||
521 | static void machine_check_confidential_guest_support(const Object *obj, | |
522 | const char *name, | |
523 | Object *new_target, | |
524 | Error **errp) | |
525 | { | |
526 | /* | |
527 | * So far the only constraint is that the target has the | |
528 | * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked | |
529 | * by the QOM core | |
530 | */ | |
db588194 BS |
531 | } |
532 | ||
f6a0d06b EA |
533 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
534 | { | |
535 | MachineState *ms = MACHINE(obj); | |
536 | ||
537 | return ms->nvdimms_state->is_enabled; | |
538 | } | |
539 | ||
540 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
541 | { | |
542 | MachineState *ms = MACHINE(obj); | |
543 | ||
544 | ms->nvdimms_state->is_enabled = value; | |
545 | } | |
546 | ||
244b3f44 TX |
547 | static bool machine_get_hmat(Object *obj, Error **errp) |
548 | { | |
549 | MachineState *ms = MACHINE(obj); | |
550 | ||
551 | return ms->numa_state->hmat_enabled; | |
552 | } | |
553 | ||
554 | static void machine_set_hmat(Object *obj, bool value, Error **errp) | |
555 | { | |
556 | MachineState *ms = MACHINE(obj); | |
557 | ||
558 | ms->numa_state->hmat_enabled = value; | |
559 | } | |
560 | ||
ce9d03fb PB |
561 | static void machine_get_mem(Object *obj, Visitor *v, const char *name, |
562 | void *opaque, Error **errp) | |
563 | { | |
564 | MachineState *ms = MACHINE(obj); | |
565 | MemorySizeConfiguration mem = { | |
566 | .has_size = true, | |
567 | .size = ms->ram_size, | |
568 | .has_max_size = !!ms->ram_slots, | |
569 | .max_size = ms->maxram_size, | |
570 | .has_slots = !!ms->ram_slots, | |
571 | .slots = ms->ram_slots, | |
572 | }; | |
573 | MemorySizeConfiguration *p_mem = &mem; | |
574 | ||
575 | visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); | |
576 | } | |
577 | ||
578 | static void machine_set_mem(Object *obj, Visitor *v, const char *name, | |
579 | void *opaque, Error **errp) | |
580 | { | |
05e385d2 | 581 | ERRP_GUARD(); |
ce9d03fb PB |
582 | MachineState *ms = MACHINE(obj); |
583 | MachineClass *mc = MACHINE_GET_CLASS(obj); | |
584 | MemorySizeConfiguration *mem; | |
585 | ||
ce9d03fb PB |
586 | if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { |
587 | return; | |
588 | } | |
589 | ||
590 | if (!mem->has_size) { | |
591 | mem->has_size = true; | |
592 | mem->size = mc->default_ram_size; | |
593 | } | |
594 | mem->size = QEMU_ALIGN_UP(mem->size, 8192); | |
595 | if (mc->fixup_ram_size) { | |
596 | mem->size = mc->fixup_ram_size(mem->size); | |
597 | } | |
598 | if ((ram_addr_t)mem->size != mem->size) { | |
599 | error_setg(errp, "ram size too large"); | |
600 | goto out_free; | |
601 | } | |
602 | ||
603 | if (mem->has_max_size) { | |
604 | if (mem->max_size < mem->size) { | |
605 | error_setg(errp, "invalid value of maxmem: " | |
606 | "maximum memory size (0x%" PRIx64 ") must be at least " | |
607 | "the initial memory size (0x%" PRIx64 ")", | |
608 | mem->max_size, mem->size); | |
609 | goto out_free; | |
610 | } | |
611 | if (mem->has_slots && mem->slots && mem->max_size == mem->size) { | |
612 | error_setg(errp, "invalid value of maxmem: " | |
613 | "memory slots were specified but maximum memory size " | |
614 | "(0x%" PRIx64 ") is equal to the initial memory size " | |
615 | "(0x%" PRIx64 ")", mem->max_size, mem->size); | |
616 | goto out_free; | |
617 | } | |
618 | ms->maxram_size = mem->max_size; | |
619 | } else { | |
620 | if (mem->has_slots) { | |
621 | error_setg(errp, "slots specified but no max-size"); | |
622 | goto out_free; | |
623 | } | |
624 | ms->maxram_size = mem->size; | |
625 | } | |
626 | ms->ram_size = mem->size; | |
627 | ms->ram_slots = mem->has_slots ? mem->slots : 0; | |
628 | out_free: | |
629 | qapi_free_MemorySizeConfiguration(mem); | |
630 | } | |
631 | ||
f6a0d06b EA |
632 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
633 | { | |
634 | MachineState *ms = MACHINE(obj); | |
635 | ||
636 | return g_strdup(ms->nvdimms_state->persistence_string); | |
637 | } | |
638 | ||
639 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
640 | Error **errp) | |
641 | { | |
642 | MachineState *ms = MACHINE(obj); | |
643 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
644 | ||
645 | if (strcmp(value, "cpu") == 0) { | |
646 | nvdimms_state->persistence = 3; | |
647 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
648 | nvdimms_state->persistence = 2; | |
649 | } else { | |
650 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
651 | value); | |
652 | return; | |
653 | } | |
654 | ||
655 | g_free(nvdimms_state->persistence_string); | |
656 | nvdimms_state->persistence_string = g_strdup(value); | |
657 | } | |
658 | ||
0bd1909d | 659 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 660 | { |
54aa3de7 | 661 | QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); |
33cd52b5 AG |
662 | } |
663 | ||
0fb124db | 664 | bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) |
33cd52b5 | 665 | { |
0fb124db PM |
666 | Object *obj = OBJECT(dev); |
667 | ||
668 | if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { | |
669 | return false; | |
670 | } | |
33cd52b5 | 671 | |
b5fdf410 DH |
672 | return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); |
673 | } | |
674 | ||
675 | bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) | |
676 | { | |
677 | bool allowed = false; | |
678 | strList *wl; | |
679 | ObjectClass *klass = object_class_by_name(type); | |
680 | ||
0bd1909d EH |
681 | for (wl = mc->allowed_dynamic_sysbus_devices; |
682 | !allowed && wl; | |
683 | wl = wl->next) { | |
b5fdf410 | 684 | allowed |= !!object_class_dynamic_cast(klass, wl->value); |
0bd1909d EH |
685 | } |
686 | ||
0fb124db PM |
687 | return allowed; |
688 | } | |
689 | ||
7a2c7da6 MK |
690 | static char *machine_get_audiodev(Object *obj, Error **errp) |
691 | { | |
692 | MachineState *ms = MACHINE(obj); | |
693 | ||
694 | return g_strdup(ms->audiodev); | |
695 | } | |
696 | ||
697 | static void machine_set_audiodev(Object *obj, const char *value, | |
698 | Error **errp) | |
699 | { | |
700 | MachineState *ms = MACHINE(obj); | |
701 | ||
702 | if (!audio_state_by_name(value, errp)) { | |
703 | return; | |
704 | } | |
705 | ||
706 | g_free(ms->audiodev); | |
707 | ms->audiodev = g_strdup(value); | |
708 | } | |
709 | ||
f2d672c2 IM |
710 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
711 | { | |
712 | int i; | |
f2d672c2 | 713 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
714 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
715 | ||
716 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
717 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 718 | |
f2d672c2 | 719 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 720 | Object *cpu; |
f2d672c2 IM |
721 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); |
722 | ||
d342eb76 | 723 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
724 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
725 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
726 | sizeof(*cpu_item->props)); | |
727 | ||
728 | cpu = machine->possible_cpus->cpus[i].cpu; | |
729 | if (cpu) { | |
f2d672c2 IM |
730 | cpu_item->qom_path = object_get_canonical_path(cpu); |
731 | } | |
54aa3de7 | 732 | QAPI_LIST_PREPEND(head, cpu_item); |
f2d672c2 IM |
733 | } |
734 | return head; | |
735 | } | |
736 | ||
7c88e65d IM |
737 | /** |
738 | * machine_set_cpu_numa_node: | |
739 | * @machine: machine object to modify | |
740 | * @props: specifies which cpu objects to assign to | |
741 | * numa node specified by @props.node_id | |
742 | * @errp: if an error occurs, a pointer to an area to store the error | |
743 | * | |
744 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
745 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
746 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
747 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
748 | * | |
749 | * However for CLI convenience it's possible to pass in subset of properties, | |
750 | * which would affect all cpu slots that match it. | |
751 | * Ex for pc machine: | |
752 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
753 | * -numa cpu,node-id=0,socket_id=0 \ | |
754 | * -numa cpu,node-id=1,socket_id=1 | |
755 | * will assign all child cores of socket 0 to node 0 and | |
756 | * of socket 1 to node 1. | |
757 | * | |
758 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
759 | * return error. | |
760 | * Empty subset is disallowed and function will return with error in this case. | |
761 | */ | |
762 | void machine_set_cpu_numa_node(MachineState *machine, | |
763 | const CpuInstanceProperties *props, Error **errp) | |
764 | { | |
765 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
244b3f44 | 766 | NodeInfo *numa_info = machine->numa_state->nodes; |
7c88e65d IM |
767 | bool match = false; |
768 | int i; | |
769 | ||
770 | if (!mc->possible_cpu_arch_ids) { | |
771 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
772 | return; | |
773 | } | |
774 | ||
775 | /* disabling node mapping is not supported, forbid it */ | |
776 | assert(props->has_node_id); | |
777 | ||
778 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
779 | mc->possible_cpu_arch_ids(machine); | |
780 | ||
781 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
782 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
783 | ||
784 | /* reject unsupported by board properties */ | |
785 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
786 | error_setg(errp, "thread-id is not supported"); | |
787 | return; | |
788 | } | |
789 | ||
790 | if (props->has_core_id && !slot->props.has_core_id) { | |
791 | error_setg(errp, "core-id is not supported"); | |
792 | return; | |
793 | } | |
794 | ||
1dcf7001 GS |
795 | if (props->has_cluster_id && !slot->props.has_cluster_id) { |
796 | error_setg(errp, "cluster-id is not supported"); | |
797 | return; | |
798 | } | |
799 | ||
7c88e65d IM |
800 | if (props->has_socket_id && !slot->props.has_socket_id) { |
801 | error_setg(errp, "socket-id is not supported"); | |
802 | return; | |
803 | } | |
804 | ||
176d2cda LX |
805 | if (props->has_die_id && !slot->props.has_die_id) { |
806 | error_setg(errp, "die-id is not supported"); | |
807 | return; | |
808 | } | |
809 | ||
7c88e65d IM |
810 | /* skip slots with explicit mismatch */ |
811 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
812 | continue; | |
813 | } | |
814 | ||
815 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
816 | continue; | |
817 | } | |
818 | ||
1dcf7001 GS |
819 | if (props->has_cluster_id && |
820 | props->cluster_id != slot->props.cluster_id) { | |
821 | continue; | |
822 | } | |
823 | ||
176d2cda LX |
824 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
825 | continue; | |
826 | } | |
827 | ||
7c88e65d IM |
828 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
829 | continue; | |
830 | } | |
831 | ||
832 | /* reject assignment if slot is already assigned, for compatibility | |
833 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
834 | * error out if cpu thread and matched core have the same node-id */ | |
835 | if (slot->props.has_node_id && | |
836 | slot->props.node_id != props->node_id) { | |
837 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
838 | slot->props.node_id); | |
839 | return; | |
840 | } | |
841 | ||
842 | /* assign slot to node as it's matched '-numa cpu' key */ | |
843 | match = true; | |
844 | slot->props.node_id = props->node_id; | |
845 | slot->props.has_node_id = props->has_node_id; | |
244b3f44 TX |
846 | |
847 | if (machine->numa_state->hmat_enabled) { | |
848 | if ((numa_info[props->node_id].initiator < MAX_NODES) && | |
849 | (props->node_id != numa_info[props->node_id].initiator)) { | |
850 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 | |
f74d339c MP |
851 | " should be itself (got %" PRIu16 ")", |
852 | props->node_id, numa_info[props->node_id].initiator); | |
244b3f44 TX |
853 | return; |
854 | } | |
855 | numa_info[props->node_id].has_cpu = true; | |
856 | numa_info[props->node_id].initiator = props->node_id; | |
857 | } | |
7c88e65d IM |
858 | } |
859 | ||
860 | if (!match) { | |
861 | error_setg(errp, "no match found"); | |
862 | } | |
863 | } | |
864 | ||
fe68090e PB |
865 | static void machine_get_smp(Object *obj, Visitor *v, const char *name, |
866 | void *opaque, Error **errp) | |
867 | { | |
868 | MachineState *ms = MACHINE(obj); | |
869 | SMPConfiguration *config = &(SMPConfiguration){ | |
003f230e | 870 | .has_cpus = true, .cpus = ms->smp.cpus, |
fe68090e PB |
871 | .has_sockets = true, .sockets = ms->smp.sockets, |
872 | .has_dies = true, .dies = ms->smp.dies, | |
864c3b5c | 873 | .has_clusters = true, .clusters = ms->smp.clusters, |
003f230e | 874 | .has_cores = true, .cores = ms->smp.cores, |
fe68090e | 875 | .has_threads = true, .threads = ms->smp.threads, |
fe68090e PB |
876 | .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, |
877 | }; | |
864c3b5c | 878 | |
fe68090e PB |
879 | if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { |
880 | return; | |
881 | } | |
882 | } | |
883 | ||
884 | static void machine_set_smp(Object *obj, Visitor *v, const char *name, | |
885 | void *opaque, Error **errp) | |
886 | { | |
fe68090e | 887 | MachineState *ms = MACHINE(obj); |
e7f944bb | 888 | g_autoptr(SMPConfiguration) config = NULL; |
fe68090e PB |
889 | |
890 | if (!visit_type_SMPConfiguration(v, name, &config, errp)) { | |
891 | return; | |
892 | } | |
893 | ||
3e2f1498 | 894 | machine_parse_smp_config(ms, config, errp); |
fe68090e PB |
895 | } |
896 | ||
8c4da4b5 PB |
897 | static void machine_get_boot(Object *obj, Visitor *v, const char *name, |
898 | void *opaque, Error **errp) | |
899 | { | |
900 | MachineState *ms = MACHINE(obj); | |
901 | BootConfiguration *config = &ms->boot_config; | |
902 | visit_type_BootConfiguration(v, name, &config, &error_abort); | |
903 | } | |
904 | ||
905 | static void machine_free_boot_config(MachineState *ms) | |
906 | { | |
907 | g_free(ms->boot_config.order); | |
908 | g_free(ms->boot_config.once); | |
909 | g_free(ms->boot_config.splash); | |
910 | } | |
911 | ||
912 | static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) | |
97ec4d21 PB |
913 | { |
914 | MachineClass *machine_class = MACHINE_GET_CLASS(ms); | |
8c4da4b5 PB |
915 | |
916 | machine_free_boot_config(ms); | |
917 | ms->boot_config = *config; | |
fe8ac1fa | 918 | if (!config->order) { |
8c4da4b5 PB |
919 | ms->boot_config.order = g_strdup(machine_class->default_boot_order); |
920 | } | |
921 | } | |
922 | ||
923 | static void machine_set_boot(Object *obj, Visitor *v, const char *name, | |
924 | void *opaque, Error **errp) | |
925 | { | |
97ec4d21 | 926 | ERRP_GUARD(); |
8c4da4b5 PB |
927 | MachineState *ms = MACHINE(obj); |
928 | BootConfiguration *config = NULL; | |
97ec4d21 | 929 | |
8c4da4b5 | 930 | if (!visit_type_BootConfiguration(v, name, &config, errp)) { |
97ec4d21 PB |
931 | return; |
932 | } | |
fe8ac1fa | 933 | if (config->order) { |
8c4da4b5 | 934 | validate_bootdevices(config->order, errp); |
97ec4d21 | 935 | if (*errp) { |
8c4da4b5 | 936 | goto out_free; |
97ec4d21 | 937 | } |
97ec4d21 | 938 | } |
fe8ac1fa | 939 | if (config->once) { |
8c4da4b5 | 940 | validate_bootdevices(config->once, errp); |
97ec4d21 | 941 | if (*errp) { |
8c4da4b5 | 942 | goto out_free; |
97ec4d21 | 943 | } |
97ec4d21 PB |
944 | } |
945 | ||
8c4da4b5 PB |
946 | machine_copy_boot_config(ms, config); |
947 | /* Strings live in ms->boot_config. */ | |
948 | free(config); | |
949 | return; | |
97ec4d21 | 950 | |
8c4da4b5 PB |
951 | out_free: |
952 | qapi_free_BootConfiguration(config); | |
97ec4d21 PB |
953 | } |
954 | ||
7a2c7da6 MK |
955 | void machine_add_audiodev_property(MachineClass *mc) |
956 | { | |
957 | ObjectClass *oc = OBJECT_CLASS(mc); | |
958 | ||
959 | object_class_property_add_str(oc, "audiodev", | |
960 | machine_get_audiodev, | |
961 | machine_set_audiodev); | |
962 | object_class_property_set_description(oc, "audiodev", | |
963 | "Audiodev to use for default machine devices"); | |
964 | } | |
965 | ||
076b35b5 ND |
966 | static void machine_class_init(ObjectClass *oc, void *data) |
967 | { | |
968 | MachineClass *mc = MACHINE_CLASS(oc); | |
969 | ||
970 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 971 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 972 | mc->rom_file_has_mr = true; |
26b81df4 | 973 | |
55641213 LV |
974 | /* numa node memory size aligned on 8MB by default. |
975 | * On Linux, each node's border has to be 8MB aligned | |
976 | */ | |
977 | mc->numa_mem_align_shift = 23; | |
978 | ||
26b81df4 | 979 | object_class_property_add_str(oc, "kernel", |
d2623129 | 980 | machine_get_kernel, machine_set_kernel); |
26b81df4 | 981 | object_class_property_set_description(oc, "kernel", |
7eecec7d | 982 | "Linux kernel image file"); |
26b81df4 EH |
983 | |
984 | object_class_property_add_str(oc, "initrd", | |
d2623129 | 985 | machine_get_initrd, machine_set_initrd); |
26b81df4 | 986 | object_class_property_set_description(oc, "initrd", |
7eecec7d | 987 | "Linux initial ramdisk file"); |
26b81df4 EH |
988 | |
989 | object_class_property_add_str(oc, "append", | |
d2623129 | 990 | machine_get_append, machine_set_append); |
26b81df4 | 991 | object_class_property_set_description(oc, "append", |
7eecec7d | 992 | "Linux kernel command line"); |
26b81df4 EH |
993 | |
994 | object_class_property_add_str(oc, "dtb", | |
d2623129 | 995 | machine_get_dtb, machine_set_dtb); |
26b81df4 | 996 | object_class_property_set_description(oc, "dtb", |
7eecec7d | 997 | "Linux kernel device tree file"); |
26b81df4 EH |
998 | |
999 | object_class_property_add_str(oc, "dumpdtb", | |
d2623129 | 1000 | machine_get_dumpdtb, machine_set_dumpdtb); |
26b81df4 | 1001 | object_class_property_set_description(oc, "dumpdtb", |
7eecec7d | 1002 | "Dump current dtb to a file and quit"); |
26b81df4 | 1003 | |
8c4da4b5 PB |
1004 | object_class_property_add(oc, "boot", "BootConfiguration", |
1005 | machine_get_boot, machine_set_boot, | |
1006 | NULL, NULL); | |
1007 | object_class_property_set_description(oc, "boot", | |
1008 | "Boot configuration"); | |
1009 | ||
fe68090e PB |
1010 | object_class_property_add(oc, "smp", "SMPConfiguration", |
1011 | machine_get_smp, machine_set_smp, | |
1012 | NULL, NULL); | |
1013 | object_class_property_set_description(oc, "smp", | |
1014 | "CPU topology"); | |
1015 | ||
26b81df4 EH |
1016 | object_class_property_add(oc, "phandle-start", "int", |
1017 | machine_get_phandle_start, machine_set_phandle_start, | |
d2623129 | 1018 | NULL, NULL); |
26b81df4 | 1019 | object_class_property_set_description(oc, "phandle-start", |
7eecec7d | 1020 | "The first phandle ID we may generate dynamically"); |
26b81df4 EH |
1021 | |
1022 | object_class_property_add_str(oc, "dt-compatible", | |
d2623129 | 1023 | machine_get_dt_compatible, machine_set_dt_compatible); |
26b81df4 | 1024 | object_class_property_set_description(oc, "dt-compatible", |
7eecec7d | 1025 | "Overrides the \"compatible\" property of the dt root node"); |
26b81df4 EH |
1026 | |
1027 | object_class_property_add_bool(oc, "dump-guest-core", | |
d2623129 | 1028 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
26b81df4 | 1029 | object_class_property_set_description(oc, "dump-guest-core", |
7eecec7d | 1030 | "Include guest memory in a core dump"); |
26b81df4 EH |
1031 | |
1032 | object_class_property_add_bool(oc, "mem-merge", | |
d2623129 | 1033 | machine_get_mem_merge, machine_set_mem_merge); |
26b81df4 | 1034 | object_class_property_set_description(oc, "mem-merge", |
7eecec7d | 1035 | "Enable/disable memory merge support"); |
26b81df4 EH |
1036 | |
1037 | object_class_property_add_bool(oc, "usb", | |
d2623129 | 1038 | machine_get_usb, machine_set_usb); |
26b81df4 | 1039 | object_class_property_set_description(oc, "usb", |
7eecec7d | 1040 | "Set on/off to enable/disable usb"); |
26b81df4 EH |
1041 | |
1042 | object_class_property_add_bool(oc, "graphics", | |
d2623129 | 1043 | machine_get_graphics, machine_set_graphics); |
26b81df4 | 1044 | object_class_property_set_description(oc, "graphics", |
7eecec7d | 1045 | "Set on/off to enable/disable graphics emulation"); |
26b81df4 | 1046 | |
26b81df4 | 1047 | object_class_property_add_str(oc, "firmware", |
d2623129 | 1048 | machine_get_firmware, machine_set_firmware); |
26b81df4 | 1049 | object_class_property_set_description(oc, "firmware", |
7eecec7d | 1050 | "Firmware image"); |
26b81df4 EH |
1051 | |
1052 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
d2623129 | 1053 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
26b81df4 | 1054 | object_class_property_set_description(oc, "suppress-vmdesc", |
7eecec7d | 1055 | "Set on to disable self-describing migration"); |
26b81df4 | 1056 | |
e0292d7c DG |
1057 | object_class_property_add_link(oc, "confidential-guest-support", |
1058 | TYPE_CONFIDENTIAL_GUEST_SUPPORT, | |
1059 | offsetof(MachineState, cgs), | |
1060 | machine_check_confidential_guest_support, | |
1061 | OBJ_PROP_LINK_STRONG); | |
1062 | object_class_property_set_description(oc, "confidential-guest-support", | |
1063 | "Set confidential guest scheme to support"); | |
1064 | ||
1065 | /* For compatibility */ | |
db588194 | 1066 | object_class_property_add_str(oc, "memory-encryption", |
d2623129 | 1067 | machine_get_memory_encryption, machine_set_memory_encryption); |
db588194 | 1068 | object_class_property_set_description(oc, "memory-encryption", |
7eecec7d | 1069 | "Set memory encryption object to use"); |
acd5b054 | 1070 | |
26f88d84 PB |
1071 | object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, |
1072 | offsetof(MachineState, memdev), object_property_allow_set_link, | |
1073 | OBJ_PROP_LINK_STRONG); | |
acd5b054 EH |
1074 | object_class_property_set_description(oc, "memory-backend", |
1075 | "Set RAM backend" | |
1076 | "Valid value is ID of hostmem based backend"); | |
ce9d03fb PB |
1077 | |
1078 | object_class_property_add(oc, "memory", "MemorySizeConfiguration", | |
1079 | machine_get_mem, machine_set_mem, | |
1080 | NULL, NULL); | |
1081 | object_class_property_set_description(oc, "memory", | |
1082 | "Memory size configuration"); | |
076b35b5 ND |
1083 | } |
1084 | ||
dcb3d601 EH |
1085 | static void machine_class_base_init(ObjectClass *oc, void *data) |
1086 | { | |
2c920e45 PB |
1087 | MachineClass *mc = MACHINE_CLASS(oc); |
1088 | mc->max_cpus = mc->max_cpus ?: 1; | |
1089 | mc->min_cpus = mc->min_cpus ?: 1; | |
1090 | mc->default_cpus = mc->default_cpus ?: 1; | |
1091 | ||
dcb3d601 EH |
1092 | if (!object_class_is_abstract(oc)) { |
1093 | const char *cname = object_class_get_name(oc); | |
1094 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
1095 | mc->name = g_strndup(cname, |
1096 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 1097 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
1098 | } |
1099 | } | |
1100 | ||
6b1b1440 MA |
1101 | static void machine_initfn(Object *obj) |
1102 | { | |
33cd52b5 | 1103 | MachineState *ms = MACHINE(obj); |
b2fc91db | 1104 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 1105 | |
e0d17dfd PB |
1106 | container_get(obj, "/peripheral"); |
1107 | container_get(obj, "/peripheral-anon"); | |
1108 | ||
47c8ca53 | 1109 | ms->dump_guest_core = true; |
75cc7f01 | 1110 | ms->mem_merge = true; |
cfc58cf3 | 1111 | ms->enable_graphics = true; |
58c91595 | 1112 | ms->kernel_cmdline = g_strdup(""); |
ce9d03fb PB |
1113 | ms->ram_size = mc->default_ram_size; |
1114 | ms->maxram_size = mc->default_ram_size; | |
d8870d02 | 1115 | |
f6a0d06b EA |
1116 | if (mc->nvdimm_supported) { |
1117 | Object *obj = OBJECT(ms); | |
1118 | ||
1119 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
1120 | object_property_add_bool(obj, "nvdimm", | |
d2623129 | 1121 | machine_get_nvdimm, machine_set_nvdimm); |
f6a0d06b EA |
1122 | object_property_set_description(obj, "nvdimm", |
1123 | "Set on/off to enable/disable " | |
7eecec7d | 1124 | "NVDIMM instantiation"); |
f6a0d06b EA |
1125 | |
1126 | object_property_add_str(obj, "nvdimm-persistence", | |
1127 | machine_get_nvdimm_persistence, | |
d2623129 | 1128 | machine_set_nvdimm_persistence); |
f6a0d06b EA |
1129 | object_property_set_description(obj, "nvdimm-persistence", |
1130 | "Set NVDIMM persistence" | |
7eecec7d | 1131 | "Valid values are cpu, mem-ctrl"); |
f6a0d06b EA |
1132 | } |
1133 | ||
fcd3f2cc | 1134 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
aa570207 | 1135 | ms->numa_state = g_new0(NumaState, 1); |
244b3f44 | 1136 | object_property_add_bool(obj, "hmat", |
d2623129 | 1137 | machine_get_hmat, machine_set_hmat); |
244b3f44 TX |
1138 | object_property_set_description(obj, "hmat", |
1139 | "Set on/off to enable/disable " | |
1140 | "ACPI Heterogeneous Memory Attribute " | |
7eecec7d | 1141 | "Table (HMAT)"); |
aa570207 | 1142 | } |
f6a0d06b | 1143 | |
8b0e484c PB |
1144 | /* default to mc->default_cpus */ |
1145 | ms->smp.cpus = mc->default_cpus; | |
1146 | ms->smp.max_cpus = mc->default_cpus; | |
003f230e | 1147 | ms->smp.sockets = 1; |
67872eb8 | 1148 | ms->smp.dies = 1; |
864c3b5c | 1149 | ms->smp.clusters = 1; |
003f230e | 1150 | ms->smp.cores = 1; |
8b0e484c | 1151 | ms->smp.threads = 1; |
8c4da4b5 PB |
1152 | |
1153 | machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); | |
6b1b1440 MA |
1154 | } |
1155 | ||
1156 | static void machine_finalize(Object *obj) | |
1157 | { | |
1158 | MachineState *ms = MACHINE(obj); | |
1159 | ||
8c4da4b5 | 1160 | machine_free_boot_config(ms); |
6b1b1440 MA |
1161 | g_free(ms->kernel_filename); |
1162 | g_free(ms->initrd_filename); | |
1163 | g_free(ms->kernel_cmdline); | |
1164 | g_free(ms->dtb); | |
1165 | g_free(ms->dumpdtb); | |
1166 | g_free(ms->dt_compatible); | |
1167 | g_free(ms->firmware); | |
2ff4f67c | 1168 | g_free(ms->device_memory); |
f6a0d06b | 1169 | g_free(ms->nvdimms_state); |
aa570207 | 1170 | g_free(ms->numa_state); |
7a2c7da6 | 1171 | g_free(ms->audiodev); |
6b1b1440 | 1172 | } |
36d20cb2 | 1173 | |
5e97b623 MA |
1174 | bool machine_usb(MachineState *machine) |
1175 | { | |
1176 | return machine->usb; | |
1177 | } | |
1178 | ||
6cabe7fa MA |
1179 | int machine_phandle_start(MachineState *machine) |
1180 | { | |
1181 | return machine->phandle_start; | |
1182 | } | |
1183 | ||
47c8ca53 MA |
1184 | bool machine_dump_guest_core(MachineState *machine) |
1185 | { | |
1186 | return machine->dump_guest_core; | |
1187 | } | |
1188 | ||
75cc7f01 MA |
1189 | bool machine_mem_merge(MachineState *machine) |
1190 | { | |
1191 | return machine->mem_merge; | |
1192 | } | |
1193 | ||
ec78f811 IM |
1194 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
1195 | { | |
1196 | GString *s = g_string_new(NULL); | |
1197 | if (cpu->props.has_socket_id) { | |
1198 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
1199 | } | |
176d2cda | 1200 | if (cpu->props.has_die_id) { |
3a23a0c0 YW |
1201 | if (s->len) { |
1202 | g_string_append_printf(s, ", "); | |
1203 | } | |
176d2cda LX |
1204 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); |
1205 | } | |
1dcf7001 GS |
1206 | if (cpu->props.has_cluster_id) { |
1207 | if (s->len) { | |
1208 | g_string_append_printf(s, ", "); | |
1209 | } | |
1210 | g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); | |
1211 | } | |
ec78f811 IM |
1212 | if (cpu->props.has_core_id) { |
1213 | if (s->len) { | |
1214 | g_string_append_printf(s, ", "); | |
1215 | } | |
1216 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
1217 | } | |
1218 | if (cpu->props.has_thread_id) { | |
1219 | if (s->len) { | |
1220 | g_string_append_printf(s, ", "); | |
1221 | } | |
1222 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
1223 | } | |
1224 | return g_string_free(s, false); | |
1225 | } | |
1226 | ||
244b3f44 TX |
1227 | static void numa_validate_initiator(NumaState *numa_state) |
1228 | { | |
1229 | int i; | |
1230 | NodeInfo *numa_info = numa_state->nodes; | |
1231 | ||
1232 | for (i = 0; i < numa_state->num_nodes; i++) { | |
1233 | if (numa_info[i].initiator == MAX_NODES) { | |
83bcae98 | 1234 | continue; |
244b3f44 TX |
1235 | } |
1236 | ||
1237 | if (!numa_info[numa_info[i].initiator].present) { | |
1238 | error_report("NUMA node %" PRIu16 " is missing, use " | |
1239 | "'-numa node' option to declare it first", | |
1240 | numa_info[i].initiator); | |
1241 | exit(1); | |
1242 | } | |
1243 | ||
1244 | if (!numa_info[numa_info[i].initiator].has_cpu) { | |
1245 | error_report("The initiator of NUMA node %d is invalid", i); | |
1246 | exit(1); | |
1247 | } | |
1248 | } | |
1249 | } | |
1250 | ||
7a3099fc | 1251 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
1252 | { |
1253 | int i; | |
60bed6a3 | 1254 | bool default_mapping; |
ec78f811 IM |
1255 | GString *s = g_string_new(NULL); |
1256 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
1257 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
1258 | ||
aa570207 | 1259 | assert(machine->numa_state->num_nodes); |
60bed6a3 IM |
1260 | for (i = 0; i < possible_cpus->len; i++) { |
1261 | if (possible_cpus->cpus[i].props.has_node_id) { | |
1262 | break; | |
1263 | } | |
1264 | } | |
1265 | default_mapping = (i == possible_cpus->len); | |
1266 | ||
ec78f811 IM |
1267 | for (i = 0; i < possible_cpus->len; i++) { |
1268 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
1269 | ||
ec78f811 | 1270 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
1271 | /* fetch default mapping from board and enable it */ |
1272 | CpuInstanceProperties props = cpu_slot->props; | |
1273 | ||
79e07936 | 1274 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 1275 | if (!default_mapping) { |
60bed6a3 IM |
1276 | /* record slots with not set mapping, |
1277 | * TODO: make it hard error in future */ | |
1278 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
1279 | g_string_append_printf(s, "%sCPU %d [%s]", | |
1280 | s->len ? ", " : "", i, cpu_str); | |
1281 | g_free(cpu_str); | |
d41f3e75 IM |
1282 | |
1283 | /* non mapped cpus used to fallback to node 0 */ | |
1284 | props.node_id = 0; | |
60bed6a3 | 1285 | } |
d41f3e75 IM |
1286 | |
1287 | props.has_node_id = true; | |
1288 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
1289 | } |
1290 | } | |
244b3f44 TX |
1291 | |
1292 | if (machine->numa_state->hmat_enabled) { | |
1293 | numa_validate_initiator(machine->numa_state); | |
1294 | } | |
1295 | ||
c6ff347c | 1296 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1297 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1298 | s->str); | |
1299 | warn_report("All CPU(s) up to maxcpus should be described " | |
1300 | "in NUMA config, ability to start up with partial NUMA " | |
1301 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1302 | } |
1303 | g_string_free(s, true); | |
1304 | } | |
1305 | ||
a494fdb7 GS |
1306 | static void validate_cpu_cluster_to_numa_boundary(MachineState *ms) |
1307 | { | |
1308 | MachineClass *mc = MACHINE_GET_CLASS(ms); | |
1309 | NumaState *state = ms->numa_state; | |
1310 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); | |
1311 | const CPUArchId *cpus = possible_cpus->cpus; | |
1312 | int i, j; | |
1313 | ||
1314 | if (state->num_nodes <= 1 || possible_cpus->len <= 1) { | |
1315 | return; | |
1316 | } | |
1317 | ||
1318 | /* | |
1319 | * The Linux scheduling domain can't be parsed when the multiple CPUs | |
1320 | * in one cluster have been associated with different NUMA nodes. However, | |
1321 | * it's fine to associate one NUMA node with CPUs in different clusters. | |
1322 | */ | |
1323 | for (i = 0; i < possible_cpus->len; i++) { | |
1324 | for (j = i + 1; j < possible_cpus->len; j++) { | |
1325 | if (cpus[i].props.has_socket_id && | |
1326 | cpus[i].props.has_cluster_id && | |
1327 | cpus[i].props.has_node_id && | |
1328 | cpus[j].props.has_socket_id && | |
1329 | cpus[j].props.has_cluster_id && | |
1330 | cpus[j].props.has_node_id && | |
1331 | cpus[i].props.socket_id == cpus[j].props.socket_id && | |
1332 | cpus[i].props.cluster_id == cpus[j].props.cluster_id && | |
1333 | cpus[i].props.node_id != cpus[j].props.node_id) { | |
1334 | warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64 | |
1335 | " have been associated with node-%" PRId64 " and node-%" PRId64 | |
1336 | " respectively. It can cause OSes like Linux to" | |
1337 | " misbehave", i, j, cpus[i].props.socket_id, | |
1338 | cpus[i].props.cluster_id, cpus[i].props.node_id, | |
1339 | cpus[j].props.node_id); | |
1340 | } | |
1341 | } | |
1342 | } | |
1343 | } | |
1344 | ||
82b911aa IM |
1345 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
1346 | HostMemoryBackend *backend) | |
1347 | { | |
1348 | MemoryRegion *ret = host_memory_backend_get_memory(backend); | |
1349 | ||
eef3a7ab | 1350 | if (host_memory_backend_is_mapped(backend)) { |
7a309cc9 MA |
1351 | error_report("memory backend %s can't be used multiple times.", |
1352 | object_get_canonical_path_component(OBJECT(backend))); | |
82b911aa IM |
1353 | exit(EXIT_FAILURE); |
1354 | } | |
1355 | host_memory_backend_set_mapped(backend, true); | |
1356 | vmstate_register_ram_global(ret); | |
1357 | return ret; | |
1358 | } | |
1359 | ||
26f88d84 PB |
1360 | static bool create_default_memdev(MachineState *ms, const char *path, Error **errp) |
1361 | { | |
1362 | Object *obj; | |
1363 | MachineClass *mc = MACHINE_GET_CLASS(ms); | |
1364 | bool r = false; | |
1365 | ||
1366 | obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); | |
1367 | if (path) { | |
1368 | if (!object_property_set_str(obj, "mem-path", path, errp)) { | |
1369 | goto out; | |
1370 | } | |
1371 | } | |
1372 | if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { | |
1373 | goto out; | |
1374 | } | |
1375 | object_property_add_child(object_get_objects_root(), mc->default_ram_id, | |
1376 | obj); | |
1377 | /* Ensure backend's memory region name is equal to mc->default_ram_id */ | |
1378 | if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", | |
1379 | false, errp)) { | |
1380 | goto out; | |
1381 | } | |
1382 | if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { | |
1383 | goto out; | |
1384 | } | |
1385 | r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); | |
1386 | ||
1387 | out: | |
1388 | object_unref(obj); | |
1389 | return r; | |
1390 | } | |
1391 | ||
1392 | ||
1393 | void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) | |
482dfe9a | 1394 | { |
41ddcd23 | 1395 | ERRP_GUARD(); |
482dfe9a | 1396 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); |
61ad65d0 RH |
1397 | ObjectClass *oc = object_class_by_name(machine->cpu_type); |
1398 | CPUClass *cc; | |
ec78f811 | 1399 | |
a3ef9bfb PB |
1400 | /* This checkpoint is required by replay to separate prior clock |
1401 | reading from the other reads, because timer polling functions query | |
1402 | clock values from the log. */ | |
1403 | replay_checkpoint(CHECKPOINT_INIT); | |
1404 | ||
fb56b7a0 PB |
1405 | if (!xen_enabled()) { |
1406 | /* On 32-bit hosts, QEMU is limited by virtual address space */ | |
1407 | if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { | |
1408 | error_setg(errp, "at most 2047 MB RAM can be simulated"); | |
1409 | return; | |
1410 | } | |
1411 | } | |
1412 | ||
1413 | if (machine->memdev) { | |
1414 | ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), | |
1415 | "size", &error_abort); | |
1416 | if (backend_size != machine->ram_size) { | |
1417 | error_setg(errp, "Machine memory size does not match the size of the memory backend"); | |
1418 | return; | |
1419 | } | |
1420 | } else if (machine_class->default_ram_id && machine->ram_size && | |
1421 | numa_uses_legacy_mem()) { | |
a37531f2 IM |
1422 | if (object_property_find(object_get_objects_root(), |
1423 | machine_class->default_ram_id)) { | |
41ddcd23 DH |
1424 | error_setg(errp, "object's id '%s' is reserved for the default" |
1425 | " RAM backend, it can't be used for any other purposes", | |
1426 | machine_class->default_ram_id); | |
1427 | error_append_hint(errp, | |
1428 | "Change the object's 'id' to something else or disable" | |
1429 | " automatic creation of the default RAM backend by setting" | |
1430 | " 'memory-backend=%s' with '-machine'.\n", | |
a37531f2 IM |
1431 | machine_class->default_ram_id); |
1432 | return; | |
1433 | } | |
26f88d84 PB |
1434 | if (!create_default_memdev(current_machine, mem_path, errp)) { |
1435 | return; | |
1436 | } | |
82b911aa IM |
1437 | } |
1438 | ||
fcd3f2cc | 1439 | if (machine->numa_state) { |
aa570207 TX |
1440 | numa_complete_configuration(machine); |
1441 | if (machine->numa_state->num_nodes) { | |
1442 | machine_numa_finish_cpu_init(machine); | |
a494fdb7 GS |
1443 | if (machine_class->cpu_cluster_has_numa_boundary) { |
1444 | validate_cpu_cluster_to_numa_boundary(machine); | |
1445 | } | |
aa570207 | 1446 | } |
3aeaac8f | 1447 | } |
c9cf636d | 1448 | |
26f88d84 PB |
1449 | if (!machine->ram && machine->memdev) { |
1450 | machine->ram = machine_consume_memdev(machine, machine->memdev); | |
1451 | } | |
1452 | ||
c9cf636d AF |
1453 | /* If the machine supports the valid_cpu_types check and the user |
1454 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1455 | */ | |
1456 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
c9cf636d AF |
1457 | int i; |
1458 | ||
1459 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
61ad65d0 | 1460 | if (object_class_dynamic_cast(oc, |
c9cf636d | 1461 | machine_class->valid_cpu_types[i])) { |
9b4b4e51 | 1462 | /* The user specified CPU is in the valid field, we are |
c9cf636d AF |
1463 | * good to go. |
1464 | */ | |
1465 | break; | |
1466 | } | |
1467 | } | |
1468 | ||
1469 | if (!machine_class->valid_cpu_types[i]) { | |
1470 | /* The user specified CPU is not valid */ | |
1471 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1472 | error_printf("The valid types are: %s", | |
1473 | machine_class->valid_cpu_types[0]); | |
1474 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1475 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1476 | } | |
1477 | error_printf("\n"); | |
1478 | ||
1479 | exit(1); | |
1480 | } | |
1481 | } | |
1482 | ||
61ad65d0 RH |
1483 | /* Check if CPU type is deprecated and warn if so */ |
1484 | cc = CPU_CLASS(oc); | |
1485 | if (cc && cc->deprecation_note) { | |
1486 | warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, | |
1487 | cc->deprecation_note); | |
1488 | } | |
1489 | ||
e0292d7c | 1490 | if (machine->cgs) { |
6e6a6ca7 | 1491 | /* |
e0292d7c | 1492 | * With confidential guests, the host can't see the real |
6e6a6ca7 DG |
1493 | * contents of RAM, so there's no point in it trying to merge |
1494 | * areas. | |
1495 | */ | |
1496 | machine_set_mem_merge(OBJECT(machine), false, &error_abort); | |
9f88a7a3 DG |
1497 | |
1498 | /* | |
1499 | * Virtio devices can't count on directly accessing guest | |
1500 | * memory, so they need iommu_platform=on to use normal DMA | |
1501 | * mechanisms. That requires also disabling legacy virtio | |
1502 | * support for those virtio pci devices which allow it. | |
1503 | */ | |
1504 | object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", | |
1505 | "on", true); | |
1506 | object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", | |
1507 | "on", false); | |
6e6a6ca7 DG |
1508 | } |
1509 | ||
92242f34 | 1510 | accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); |
482dfe9a | 1511 | machine_class->init(machine); |
2f181fbd | 1512 | phase_advance(PHASE_MACHINE_INITIALIZED); |
482dfe9a IM |
1513 | } |
1514 | ||
6b21670c PB |
1515 | static NotifierList machine_init_done_notifiers = |
1516 | NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); | |
1517 | ||
6b21670c PB |
1518 | void qemu_add_machine_init_done_notifier(Notifier *notify) |
1519 | { | |
1520 | notifier_list_add(&machine_init_done_notifiers, notify); | |
2f181fbd | 1521 | if (phase_check(PHASE_MACHINE_READY)) { |
6b21670c PB |
1522 | notify->notify(notify, NULL); |
1523 | } | |
1524 | } | |
1525 | ||
1526 | void qemu_remove_machine_init_done_notifier(Notifier *notify) | |
1527 | { | |
1528 | notifier_remove(notify); | |
1529 | } | |
1530 | ||
f66dc873 | 1531 | void qdev_machine_creation_done(void) |
6b21670c | 1532 | { |
f66dc873 PB |
1533 | cpu_synchronize_all_post_init(); |
1534 | ||
fe8ac1fa | 1535 | if (current_machine->boot_config.once) { |
97ec4d21 PB |
1536 | qemu_boot_set(current_machine->boot_config.once, &error_fatal); |
1537 | qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); | |
f66dc873 PB |
1538 | } |
1539 | ||
1540 | /* | |
1541 | * ok, initial machine setup is done, starting from now we can | |
1542 | * only create hotpluggable devices | |
1543 | */ | |
2f181fbd | 1544 | phase_advance(PHASE_MACHINE_READY); |
f66dc873 PB |
1545 | qdev_assert_realized_properly(); |
1546 | ||
1547 | /* TODO: once all bus devices are qdevified, this should be done | |
1548 | * when bus is created by qdev.c */ | |
1549 | /* | |
1550 | * TODO: If we had a main 'reset container' that the whole system | |
1551 | * lived in, we could reset that using the multi-phase reset | |
1552 | * APIs. For the moment, we just reset the sysbus, which will cause | |
1553 | * all devices hanging off it (and all their child buses, recursively) | |
1554 | * to be reset. Note that this will *not* reset any Device objects | |
1555 | * which are not attached to some part of the qbus tree! | |
1556 | */ | |
1557 | qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default()); | |
1558 | ||
6b21670c | 1559 | notifier_list_notify(&machine_init_done_notifiers, NULL); |
f66dc873 PB |
1560 | |
1561 | if (rom_check_and_register_reset() != 0) { | |
f66dc873 PB |
1562 | exit(1); |
1563 | } | |
1564 | ||
1565 | replay_start(); | |
1566 | ||
1567 | /* This checkpoint is required by replay to separate prior clock | |
1568 | reading from the other reads, because timer polling functions query | |
1569 | clock values from the log. */ | |
1570 | replay_checkpoint(CHECKPOINT_RESET); | |
1571 | qemu_system_reset(SHUTDOWN_CAUSE_NONE); | |
1572 | register_global_state(); | |
6b21670c PB |
1573 | } |
1574 | ||
36d20cb2 MA |
1575 | static const TypeInfo machine_info = { |
1576 | .name = TYPE_MACHINE, | |
1577 | .parent = TYPE_OBJECT, | |
1578 | .abstract = true, | |
1579 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1580 | .class_init = machine_class_init, |
dcb3d601 | 1581 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1582 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1583 | .instance_init = machine_initfn, |
1584 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1585 | }; |
1586 | ||
1587 | static void machine_register_types(void) | |
1588 | { | |
1589 | type_register_static(&machine_info); | |
1590 | } | |
1591 | ||
1592 | type_init(machine_register_types) |