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1
2/*
3 * QEMU model of the Milkymist VGA framebuffer.
4 *
a3b6181e 5 * Copyright (c) 2010-2012 Michael Walle <michael@walle.cc>
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6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 *
20 *
21 * Specification available at:
6dbbe243 22 * http://milkymist.walle.cc/socdoc/vgafb.pdf
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23 */
24
ea99dde1 25#include "qemu/osdep.h"
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26#include "hw/hw.h"
27#include "hw/sysbus.h"
d23948b1 28#include "trace.h"
28ecbaee 29#include "ui/console.h"
47b43a1f 30#include "framebuffer.h"
28ecbaee 31#include "ui/pixel_ops.h"
1de7afc9 32#include "qemu/error-report.h"
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33
34#define BITS 8
47b43a1f 35#include "milkymist-vgafb_template.h"
d23948b1 36#define BITS 15
47b43a1f 37#include "milkymist-vgafb_template.h"
d23948b1 38#define BITS 16
47b43a1f 39#include "milkymist-vgafb_template.h"
d23948b1 40#define BITS 24
47b43a1f 41#include "milkymist-vgafb_template.h"
d23948b1 42#define BITS 32
47b43a1f 43#include "milkymist-vgafb_template.h"
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44
45enum {
46 R_CTRL = 0,
47 R_HRES,
48 R_HSYNC_START,
49 R_HSYNC_END,
50 R_HSCAN,
51 R_VRES,
52 R_VSYNC_START,
53 R_VSYNC_END,
54 R_VSCAN,
55 R_BASEADDRESS,
56 R_BASEADDRESS_ACT,
57 R_BURST_COUNT,
a3b6181e 58 R_DDC,
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59 R_SOURCE_CLOCK,
60 R_MAX
61};
62
63enum {
64 CTRL_RESET = (1<<0),
65};
66
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67#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
68#define MILKYMIST_VGAFB(obj) \
69 OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)
70
d23948b1 71struct MilkymistVgafbState {
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72 SysBusDevice parent_obj;
73
883abf8d 74 MemoryRegion regs_region;
c1076c3e 75 MemoryRegionSection fbsection;
c78f7137 76 QemuConsole *con;
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77
78 int invalidate;
79 uint32_t fb_offset;
80 uint32_t fb_mask;
81
82 uint32_t regs[R_MAX];
83};
84typedef struct MilkymistVgafbState MilkymistVgafbState;
85
86static int vgafb_enabled(MilkymistVgafbState *s)
87{
88 return !(s->regs[R_CTRL] & CTRL_RESET);
89}
90
91static void vgafb_update_display(void *opaque)
92{
93 MilkymistVgafbState *s = opaque;
54df97bb 94 SysBusDevice *sbd;
c78f7137 95 DisplaySurface *surface = qemu_console_surface(s->con);
c1076c3e 96 int src_width;
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97 int first = 0;
98 int last = 0;
99 drawfn fn;
100
101 if (!vgafb_enabled(s)) {
102 return;
103 }
104
54df97bb 105 sbd = SYS_BUS_DEVICE(s);
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106 int dest_width = s->regs[R_HRES];
107
c78f7137 108 switch (surface_bits_per_pixel(surface)) {
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109 case 0:
110 return;
111 case 8:
112 fn = draw_line_8;
113 break;
114 case 15:
115 fn = draw_line_15;
116 dest_width *= 2;
117 break;
118 case 16:
119 fn = draw_line_16;
120 dest_width *= 2;
121 break;
122 case 24:
123 fn = draw_line_24;
124 dest_width *= 3;
125 break;
126 case 32:
127 fn = draw_line_32;
128 dest_width *= 4;
129 break;
130 default:
131 hw_error("milkymist_vgafb: bad color depth\n");
132 break;
133 }
134
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135 src_width = s->regs[R_HRES] * 2;
136 if (s->invalidate) {
137 framebuffer_update_memory_section(&s->fbsection,
138 sysbus_address_space(sbd),
139 s->regs[R_BASEADDRESS] + s->fb_offset,
140 s->regs[R_VRES], src_width);
141 }
142
143 framebuffer_update_display(surface, &s->fbsection,
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144 s->regs[R_HRES],
145 s->regs[R_VRES],
c1076c3e 146 src_width,
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147 dest_width,
148 0,
149 s->invalidate,
150 fn,
151 NULL,
152 &first, &last);
153
154 if (first >= 0) {
c78f7137 155 dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
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156 }
157 s->invalidate = 0;
158}
159
160static void vgafb_invalidate_display(void *opaque)
161{
162 MilkymistVgafbState *s = opaque;
163 s->invalidate = 1;
164}
165
166static void vgafb_resize(MilkymistVgafbState *s)
167{
168 if (!vgafb_enabled(s)) {
169 return;
170 }
171
c78f7137 172 qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
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173 s->invalidate = 1;
174}
175
a8170e5e 176static uint64_t vgafb_read(void *opaque, hwaddr addr,
883abf8d 177 unsigned size)
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178{
179 MilkymistVgafbState *s = opaque;
180 uint32_t r = 0;
181
182 addr >>= 2;
183 switch (addr) {
184 case R_CTRL:
185 case R_HRES:
186 case R_HSYNC_START:
187 case R_HSYNC_END:
188 case R_HSCAN:
189 case R_VRES:
190 case R_VSYNC_START:
191 case R_VSYNC_END:
192 case R_VSCAN:
193 case R_BASEADDRESS:
194 case R_BURST_COUNT:
a3b6181e 195 case R_DDC:
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196 case R_SOURCE_CLOCK:
197 r = s->regs[addr];
198 break;
199 case R_BASEADDRESS_ACT:
200 r = s->regs[R_BASEADDRESS];
201 break;
202
203 default:
204 error_report("milkymist_vgafb: read access to unknown register 0x"
205 TARGET_FMT_plx, addr << 2);
206 break;
207 }
208
209 trace_milkymist_vgafb_memory_read(addr << 2, r);
210
211 return r;
212}
213
a8170e5e 214static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
883abf8d 215 unsigned size)
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216{
217 MilkymistVgafbState *s = opaque;
218
219 trace_milkymist_vgafb_memory_write(addr, value);
220
221 addr >>= 2;
222 switch (addr) {
223 case R_CTRL:
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224 s->regs[addr] = value;
225 vgafb_resize(s);
226 break;
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227 case R_HSYNC_START:
228 case R_HSYNC_END:
229 case R_HSCAN:
230 case R_VSYNC_START:
231 case R_VSYNC_END:
232 case R_VSCAN:
233 case R_BURST_COUNT:
a3b6181e 234 case R_DDC:
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235 case R_SOURCE_CLOCK:
236 s->regs[addr] = value;
237 break;
238 case R_BASEADDRESS:
239 if (value & 0x1f) {
240 error_report("milkymist_vgafb: framebuffer base address have to "
241 "be 32 byte aligned");
242 break;
243 }
244 s->regs[addr] = value & s->fb_mask;
245 s->invalidate = 1;
246 break;
247 case R_HRES:
248 case R_VRES:
249 s->regs[addr] = value;
250 vgafb_resize(s);
251 break;
252 case R_BASEADDRESS_ACT:
253 error_report("milkymist_vgafb: write to read-only register 0x"
254 TARGET_FMT_plx, addr << 2);
255 break;
256
257 default:
258 error_report("milkymist_vgafb: write access to unknown register 0x"
259 TARGET_FMT_plx, addr << 2);
260 break;
261 }
262}
263
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264static const MemoryRegionOps vgafb_mmio_ops = {
265 .read = vgafb_read,
266 .write = vgafb_write,
267 .valid = {
268 .min_access_size = 4,
269 .max_access_size = 4,
270 },
271 .endianness = DEVICE_NATIVE_ENDIAN,
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272};
273
274static void milkymist_vgafb_reset(DeviceState *d)
275{
54df97bb 276 MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
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277 int i;
278
279 for (i = 0; i < R_MAX; i++) {
280 s->regs[i] = 0;
281 }
282
283 /* defaults */
284 s->regs[R_CTRL] = CTRL_RESET;
285 s->regs[R_HRES] = 640;
286 s->regs[R_VRES] = 480;
287 s->regs[R_BASEADDRESS] = 0;
288}
289
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290static const GraphicHwOps vgafb_ops = {
291 .invalidate = vgafb_invalidate_display,
292 .gfx_update = vgafb_update_display,
293};
294
165b244b 295static void milkymist_vgafb_init(Object *obj)
d23948b1 296{
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297 MilkymistVgafbState *s = MILKYMIST_VGAFB(obj);
298 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
d23948b1 299
3eadad55 300 memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
883abf8d 301 "milkymist-vgafb", R_MAX * 4);
750ecd44 302 sysbus_init_mmio(dev, &s->regs_region);
165b244b 303}
d23948b1 304
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305static void milkymist_vgafb_realize(DeviceState *dev, Error **errp)
306{
307 MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);
d23948b1 308
165b244b 309 s->con = graphic_console_init(dev, 0, &vgafb_ops, s);
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310}
311
312static int vgafb_post_load(void *opaque, int version_id)
313{
314 vgafb_invalidate_display(opaque);
315 return 0;
316}
317
318static const VMStateDescription vmstate_milkymist_vgafb = {
319 .name = "milkymist-vgafb",
320 .version_id = 1,
321 .minimum_version_id = 1,
d23948b1 322 .post_load = vgafb_post_load,
35d08458 323 .fields = (VMStateField[]) {
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324 VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
325 VMSTATE_END_OF_LIST()
326 }
327};
328
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329static Property milkymist_vgafb_properties[] = {
330 DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
331 DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
332 DEFINE_PROP_END_OF_LIST(),
333};
334
335static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
336{
39bffca2 337 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 338
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339 dc->reset = milkymist_vgafb_reset;
340 dc->vmsd = &vmstate_milkymist_vgafb;
341 dc->props = milkymist_vgafb_properties;
165b244b 342 dc->realize = milkymist_vgafb_realize;
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343}
344
8c43a6f0 345static const TypeInfo milkymist_vgafb_info = {
54df97bb 346 .name = TYPE_MILKYMIST_VGAFB,
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347 .parent = TYPE_SYS_BUS_DEVICE,
348 .instance_size = sizeof(MilkymistVgafbState),
165b244b 349 .instance_init = milkymist_vgafb_init,
39bffca2 350 .class_init = milkymist_vgafb_class_init,
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351};
352
83f7d43a 353static void milkymist_vgafb_register_types(void)
d23948b1 354{
39bffca2 355 type_register_static(&milkymist_vgafb_info);
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356}
357
83f7d43a 358type_init(milkymist_vgafb_register_types)