[mirror_qemu.git] / hw / display / milkymist-vgafb.c


/*
 *  QEMU model of the Milkymist VGA framebuffer.
 *
 *  Copyright (c) 2010-2012 Michael Walle <michael@walle.cc>
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 *
 *
 * Specification available at:
 *   http://milkymist.walle.cc/socdoc/vgafb.pdf
 */

#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "trace.h"
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
#include "qemu/error-report.h"
#include "qemu/module.h"

#define BITS 8
#include "milkymist-vgafb_template.h"
#define BITS 15
#include "milkymist-vgafb_template.h"
#define BITS 16
#include "milkymist-vgafb_template.h"
#define BITS 24
#include "milkymist-vgafb_template.h"
#define BITS 32
#include "milkymist-vgafb_template.h"

enum {
    R_CTRL = 0,
    R_HRES,
    R_HSYNC_START,
    R_HSYNC_END,
    R_HSCAN,
    R_VRES,
    R_VSYNC_START,
    R_VSYNC_END,
    R_VSCAN,
    R_BASEADDRESS,
    R_BASEADDRESS_ACT,
    R_BURST_COUNT,
    R_DDC,
    R_SOURCE_CLOCK,
    R_MAX
};

enum {
    CTRL_RESET = (1<<0),
};

#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
#define MILKYMIST_VGAFB(obj) \
    OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)

struct MilkymistVgafbState {
    SysBusDevice parent_obj;

    MemoryRegion regs_region;
    MemoryRegionSection fbsection;
    QemuConsole *con;

    int invalidate;
    uint32_t fb_offset;
    uint32_t fb_mask;

    uint32_t regs[R_MAX];
};
typedef struct MilkymistVgafbState MilkymistVgafbState;

static int vgafb_enabled(MilkymistVgafbState *s)
{
    return !(s->regs[R_CTRL] & CTRL_RESET);
}

static void vgafb_update_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    SysBusDevice *sbd;
    DisplaySurface *surface = qemu_console_surface(s->con);
    int src_width;
    int first = 0;
    int last = 0;
    drawfn fn;

    if (!vgafb_enabled(s)) {
        return;
    }

    sbd = SYS_BUS_DEVICE(s);
    int dest_width = s->regs[R_HRES];

    switch (surface_bits_per_pixel(surface)) {
    case 0:
        return;
    case 8:
        fn = draw_line_8;
        break;
    case 15:
        fn = draw_line_15;
        dest_width *= 2;
        break;
    case 16:
        fn = draw_line_16;
        dest_width *= 2;
        break;
    case 24:
        fn = draw_line_24;
        dest_width *= 3;
        break;
    case 32:
        fn = draw_line_32;
        dest_width *= 4;
        break;
    default:
        hw_error("milkymist_vgafb: bad color depth\n");
        break;
    }

    src_width = s->regs[R_HRES] * 2;
    if (s->invalidate) {
        framebuffer_update_memory_section(&s->fbsection,
                                          sysbus_address_space(sbd),
                                          s->regs[R_BASEADDRESS] + s->fb_offset,
                                          s->regs[R_VRES], src_width);
    }

    framebuffer_update_display(surface, &s->fbsection,
                               s->regs[R_HRES],
                               s->regs[R_VRES],
                               src_width,
                               dest_width,
                               0,
                               s->invalidate,
                               fn,
                               NULL,
                               &first, &last);

    if (first >= 0) {
        dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
    }
    s->invalidate = 0;
}

static void vgafb_invalidate_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    s->invalidate = 1;
}

static void vgafb_resize(MilkymistVgafbState *s)
{
    if (!vgafb_enabled(s)) {
        return;
    }

    qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
    s->invalidate = 1;
}

static uint64_t vgafb_read(void *opaque, hwaddr addr,
                           unsigned size)
{
    MilkymistVgafbState *s = opaque;
    uint32_t r = 0;

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
    case R_HRES:
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VRES:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BASEADDRESS:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        r = s->regs[addr];
    break;
    case R_BASEADDRESS_ACT:
        r = s->regs[R_BASEADDRESS];
    break;

    default:
        error_report("milkymist_vgafb: read access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }

    trace_milkymist_vgafb_memory_read(addr << 2, r);

    return r;
}

static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
                        unsigned size)
{
    MilkymistVgafbState *s = opaque;

    trace_milkymist_vgafb_memory_write(addr, value);

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        s->regs[addr] = value;
        break;
    case R_BASEADDRESS:
        if (value & 0x1f) {
            error_report("milkymist_vgafb: framebuffer base address have to "
                     "be 32 byte aligned");
            break;
        }
        s->regs[addr] = value & s->fb_mask;
        s->invalidate = 1;
        break;
    case R_HRES:
    case R_VRES:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_BASEADDRESS_ACT:
        error_report("milkymist_vgafb: write to read-only register 0x"
                TARGET_FMT_plx, addr << 2);
        break;

    default:
        error_report("milkymist_vgafb: write access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }
}

static const MemoryRegionOps vgafb_mmio_ops = {
    .read = vgafb_read,
    .write = vgafb_write,
    .valid = {
        .min_access_size = 4,
        .max_access_size = 4,
    },
    .endianness = DEVICE_NATIVE_ENDIAN,
};

static void milkymist_vgafb_reset(DeviceState *d)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
    int i;

    for (i = 0; i < R_MAX; i++) {
        s->regs[i] = 0;
    }

    /* defaults */
    s->regs[R_CTRL] = CTRL_RESET;
    s->regs[R_HRES] = 640;
    s->regs[R_VRES] = 480;
    s->regs[R_BASEADDRESS] = 0;
}

static const GraphicHwOps vgafb_ops = {
    .invalidate  = vgafb_invalidate_display,
    .gfx_update  = vgafb_update_display,
};

static void milkymist_vgafb_init(Object *obj)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(obj);
    SysBusDevice *dev = SYS_BUS_DEVICE(obj);

    memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
            "milkymist-vgafb", R_MAX * 4);
    sysbus_init_mmio(dev, &s->regs_region);
}

static void milkymist_vgafb_realize(DeviceState *dev, Error **errp)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);

    s->con = graphic_console_init(dev, 0, &vgafb_ops, s);
}

static int vgafb_post_load(void *opaque, int version_id)
{
    vgafb_invalidate_display(opaque);
    return 0;
}

static const VMStateDescription vmstate_milkymist_vgafb = {
    .name = "milkymist-vgafb",
    .version_id = 1,
    .minimum_version_id = 1,
    .post_load = vgafb_post_load,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
        VMSTATE_END_OF_LIST()
    }
};

static Property milkymist_vgafb_properties[] = {
    DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
    DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
    DEFINE_PROP_END_OF_LIST(),
};

static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);

    dc->reset = milkymist_vgafb_reset;
    dc->vmsd = &vmstate_milkymist_vgafb;
    dc->props = milkymist_vgafb_properties;
    dc->realize = milkymist_vgafb_realize;
}

static const TypeInfo milkymist_vgafb_info = {
    .name          = TYPE_MILKYMIST_VGAFB,
    .parent        = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(MilkymistVgafbState),
    .instance_init = milkymist_vgafb_init,
    .class_init    = milkymist_vgafb_class_init,
};

static void milkymist_vgafb_register_types(void)
{
    type_register_static(&milkymist_vgafb_info);
}

type_init(milkymist_vgafb_register_types)
Commit	Line	Data
d23948b1 MW	1
	2	/*
	3	* QEMU model of the Milkymist VGA framebuffer.
	4	*
a3b6181e	5	* Copyright (c) 2010-2012 Michael Walle <michael@walle.cc>
d23948b1 MW	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*
	20	*
	21	* Specification available at:
6dbbe243	22	* http://milkymist.walle.cc/socdoc/vgafb.pdf
d23948b1 MW	23	*/
d23948b1 MW	24
ea99dde1	25	#include "qemu/osdep.h"
83c9f4ca PB	26	#include "hw/hw.h"
83c9f4ca PB	27	#include "hw/sysbus.h"
d23948b1	28	#include "trace.h"
28ecbaee	29	#include "ui/console.h"
47b43a1f	30	#include "framebuffer.h"
28ecbaee	31	#include "ui/pixel_ops.h"
1de7afc9	32	#include "qemu/error-report.h"
0b8fa32f	33	#include "qemu/module.h"
d23948b1 MW	34
d23948b1 MW	35	#define BITS 8
47b43a1f	36	#include "milkymist-vgafb_template.h"
d23948b1	37	#define BITS 15
47b43a1f	38	#include "milkymist-vgafb_template.h"
d23948b1	39	#define BITS 16
47b43a1f	40	#include "milkymist-vgafb_template.h"
d23948b1	41	#define BITS 24
47b43a1f	42	#include "milkymist-vgafb_template.h"
d23948b1	43	#define BITS 32
47b43a1f	44	#include "milkymist-vgafb_template.h"
d23948b1 MW	45
	46	enum {
	47	R_CTRL = 0,
	48	R_HRES,
	49	R_HSYNC_START,
	50	R_HSYNC_END,
	51	R_HSCAN,
	52	R_VRES,
	53	R_VSYNC_START,
	54	R_VSYNC_END,
	55	R_VSCAN,
	56	R_BASEADDRESS,
	57	R_BASEADDRESS_ACT,
	58	R_BURST_COUNT,
a3b6181e	59	R_DDC,
d23948b1 MW	60	R_SOURCE_CLOCK,
	61	R_MAX
	62	};
	63
	64	enum {
	65	CTRL_RESET = (1<<0),
	66	};
	67
54df97bb AF	68	#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
	69	#define MILKYMIST_VGAFB(obj) \
	70	OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)
	71
d23948b1	72	struct MilkymistVgafbState {
54df97bb AF	73	SysBusDevice parent_obj;
54df97bb AF	74
883abf8d	75	MemoryRegion regs_region;
c1076c3e	76	MemoryRegionSection fbsection;
c78f7137	77	QemuConsole *con;
d23948b1 MW	78
	79	int invalidate;
	80	uint32_t fb_offset;
	81	uint32_t fb_mask;
	82
	83	uint32_t regs[R_MAX];
	84	};
	85	typedef struct MilkymistVgafbState MilkymistVgafbState;
	86
	87	static int vgafb_enabled(MilkymistVgafbState *s)
	88	{
	89	return !(s->regs[R_CTRL] & CTRL_RESET);
	90	}
	91
	92	static void vgafb_update_display(void *opaque)
	93	{
	94	MilkymistVgafbState *s = opaque;
54df97bb	95	SysBusDevice *sbd;
c78f7137	96	DisplaySurface *surface = qemu_console_surface(s->con);
c1076c3e	97	int src_width;
d23948b1 MW	98	int first = 0;
	99	int last = 0;
	100	drawfn fn;
	101
	102	if (!vgafb_enabled(s)) {
	103	return;
	104	}
	105
54df97bb	106	sbd = SYS_BUS_DEVICE(s);
d23948b1 MW	107	int dest_width = s->regs[R_HRES];
d23948b1 MW	108
c78f7137	109	switch (surface_bits_per_pixel(surface)) {
d23948b1 MW	110	case 0:
	111	return;
	112	case 8:
	113	fn = draw_line_8;
	114	break;
	115	case 15:
	116	fn = draw_line_15;
	117	dest_width *= 2;
	118	break;
	119	case 16:
	120	fn = draw_line_16;
	121	dest_width *= 2;
	122	break;
	123	case 24:
	124	fn = draw_line_24;
	125	dest_width *= 3;
	126	break;
	127	case 32:
	128	fn = draw_line_32;
	129	dest_width *= 4;
	130	break;
	131	default:
	132	hw_error("milkymist_vgafb: bad color depth\n");
	133	break;
	134	}
	135
c1076c3e PB	136	src_width = s->regs[R_HRES] * 2;
	137	if (s->invalidate) {
	138	framebuffer_update_memory_section(&s->fbsection,
	139	sysbus_address_space(sbd),
	140	s->regs[R_BASEADDRESS] + s->fb_offset,
	141	s->regs[R_VRES], src_width);
	142	}
	143
	144	framebuffer_update_display(surface, &s->fbsection,
d23948b1 MW	145	s->regs[R_HRES],
d23948b1 MW	146	s->regs[R_VRES],
c1076c3e	147	src_width,
d23948b1 MW	148	dest_width,
	149	0,
	150	s->invalidate,
	151	fn,
	152	NULL,
	153	&first, &last);
	154
	155	if (first >= 0) {
c78f7137	156	dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
d23948b1 MW	157	}
	158	s->invalidate = 0;
	159	}
	160
	161	static void vgafb_invalidate_display(void *opaque)
	162	{
	163	MilkymistVgafbState *s = opaque;
	164	s->invalidate = 1;
	165	}
	166
	167	static void vgafb_resize(MilkymistVgafbState *s)
	168	{
	169	if (!vgafb_enabled(s)) {
	170	return;
	171	}
	172
c78f7137	173	qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
d23948b1 MW	174	s->invalidate = 1;
	175	}
	176
a8170e5e	177	static uint64_t vgafb_read(void *opaque, hwaddr addr,
883abf8d	178	unsigned size)
d23948b1 MW	179	{
	180	MilkymistVgafbState *s = opaque;
	181	uint32_t r = 0;
	182
	183	addr >>= 2;
	184	switch (addr) {
	185	case R_CTRL:
	186	case R_HRES:
	187	case R_HSYNC_START:
	188	case R_HSYNC_END:
	189	case R_HSCAN:
	190	case R_VRES:
	191	case R_VSYNC_START:
	192	case R_VSYNC_END:
	193	case R_VSCAN:
	194	case R_BASEADDRESS:
	195	case R_BURST_COUNT:
a3b6181e	196	case R_DDC:
d23948b1 MW	197	case R_SOURCE_CLOCK:
	198	r = s->regs[addr];
	199	break;
	200	case R_BASEADDRESS_ACT:
	201	r = s->regs[R_BASEADDRESS];
	202	break;
	203
	204	default:
	205	error_report("milkymist_vgafb: read access to unknown register 0x"
	206	TARGET_FMT_plx, addr << 2);
	207	break;
	208	}
	209
	210	trace_milkymist_vgafb_memory_read(addr << 2, r);
	211
	212	return r;
	213	}
	214
a8170e5e	215	static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
883abf8d	216	unsigned size)
d23948b1 MW	217	{
	218	MilkymistVgafbState *s = opaque;
	219
	220	trace_milkymist_vgafb_memory_write(addr, value);
	221
	222	addr >>= 2;
	223	switch (addr) {
	224	case R_CTRL:
c07050dd MW	225	s->regs[addr] = value;
	226	vgafb_resize(s);
	227	break;
d23948b1 MW	228	case R_HSYNC_START:
	229	case R_HSYNC_END:
	230	case R_HSCAN:
	231	case R_VSYNC_START:
	232	case R_VSYNC_END:
	233	case R_VSCAN:
	234	case R_BURST_COUNT:
a3b6181e	235	case R_DDC:
d23948b1 MW	236	case R_SOURCE_CLOCK:
	237	s->regs[addr] = value;
	238	break;
	239	case R_BASEADDRESS:
	240	if (value & 0x1f) {
	241	error_report("milkymist_vgafb: framebuffer base address have to "
	242	"be 32 byte aligned");
	243	break;
	244	}
	245	s->regs[addr] = value & s->fb_mask;
	246	s->invalidate = 1;
	247	break;
	248	case R_HRES:
	249	case R_VRES:
	250	s->regs[addr] = value;
	251	vgafb_resize(s);
	252	break;
	253	case R_BASEADDRESS_ACT:
	254	error_report("milkymist_vgafb: write to read-only register 0x"
	255	TARGET_FMT_plx, addr << 2);
	256	break;
	257
	258	default:
	259	error_report("milkymist_vgafb: write access to unknown register 0x"
	260	TARGET_FMT_plx, addr << 2);
	261	break;
	262	}
	263	}
	264
883abf8d MW	265	static const MemoryRegionOps vgafb_mmio_ops = {
	266	.read = vgafb_read,
	267	.write = vgafb_write,
	268	.valid = {
	269	.min_access_size = 4,
	270	.max_access_size = 4,
	271	},
	272	.endianness = DEVICE_NATIVE_ENDIAN,
d23948b1 MW	273	};
	274
	275	static void milkymist_vgafb_reset(DeviceState *d)
	276	{
54df97bb	277	MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
d23948b1 MW	278	int i;
	279
	280	for (i = 0; i < R_MAX; i++) {
	281	s->regs[i] = 0;
	282	}
	283
	284	/* defaults */
	285	s->regs[R_CTRL] = CTRL_RESET;
	286	s->regs[R_HRES] = 640;
	287	s->regs[R_VRES] = 480;
	288	s->regs[R_BASEADDRESS] = 0;
	289	}
	290
380cd056 GH	291	static const GraphicHwOps vgafb_ops = {
	292	.invalidate = vgafb_invalidate_display,
	293	.gfx_update = vgafb_update_display,
	294	};
	295
165b244b	296	static void milkymist_vgafb_init(Object *obj)
d23948b1	297	{
165b244b XZ	298	MilkymistVgafbState *s = MILKYMIST_VGAFB(obj);
165b244b XZ	299	SysBusDevice *dev = SYS_BUS_DEVICE(obj);
d23948b1	300
3eadad55	301	memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
883abf8d	302	"milkymist-vgafb", R_MAX * 4);
750ecd44	303	sysbus_init_mmio(dev, &s->regs_region);
165b244b	304	}
d23948b1	305
165b244b XZ	306	static void milkymist_vgafb_realize(DeviceState dev, Error *errp)
	307	{
	308	MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);
d23948b1	309
165b244b	310	s->con = graphic_console_init(dev, 0, &vgafb_ops, s);
d23948b1 MW	311	}
	312
	313	static int vgafb_post_load(void *opaque, int version_id)
	314	{
	315	vgafb_invalidate_display(opaque);
	316	return 0;
	317	}
	318
	319	static const VMStateDescription vmstate_milkymist_vgafb = {
	320	.name = "milkymist-vgafb",
	321	.version_id = 1,
	322	.minimum_version_id = 1,
d23948b1	323	.post_load = vgafb_post_load,
35d08458	324	.fields = (VMStateField[]) {
d23948b1 MW	325	VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
	326	VMSTATE_END_OF_LIST()
	327	}
	328	};
	329
999e12bb AL	330	static Property milkymist_vgafb_properties[] = {
	331	DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
	332	DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
	333	DEFINE_PROP_END_OF_LIST(),
	334	};
	335
	336	static void milkymist_vgafb_class_init(ObjectClass klass, void data)
	337	{
39bffca2	338	DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb	339
39bffca2 AL	340	dc->reset = milkymist_vgafb_reset;
	341	dc->vmsd = &vmstate_milkymist_vgafb;
	342	dc->props = milkymist_vgafb_properties;
165b244b	343	dc->realize = milkymist_vgafb_realize;
999e12bb AL	344	}
999e12bb AL	345
8c43a6f0	346	static const TypeInfo milkymist_vgafb_info = {
54df97bb	347	.name = TYPE_MILKYMIST_VGAFB,
39bffca2 AL	348	.parent = TYPE_SYS_BUS_DEVICE,
39bffca2 AL	349	.instance_size = sizeof(MilkymistVgafbState),
165b244b	350	.instance_init = milkymist_vgafb_init,
39bffca2	351	.class_init = milkymist_vgafb_class_init,
d23948b1 MW	352	};
d23948b1 MW	353
83f7d43a	354	static void milkymist_vgafb_register_types(void)
d23948b1	355	{
39bffca2	356	type_register_static(&milkymist_vgafb_info);
d23948b1 MW	357	}
d23948b1 MW	358
83f7d43a	359	type_init(milkymist_vgafb_register_types)