[mirror_qemu.git] / hw / display / milkymist-vgafb.c


/*
 *  QEMU model of the Milkymist VGA framebuffer.
 *
 *  Copyright (c) 2010-2012 Michael Walle <michael@walle.cc>
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 *
 *
 * Specification available at:
 *   http://milkymist.walle.cc/socdoc/vgafb.pdf
 */

#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "trace.h"
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
#include "qemu/error-report.h"
#include "qemu/module.h"

#define BITS 8
#include "migration/vmstate.h"
#include "milkymist-vgafb_template.h"
#define BITS 15
#include "milkymist-vgafb_template.h"
#define BITS 16
#include "milkymist-vgafb_template.h"
#define BITS 24
#include "milkymist-vgafb_template.h"
#define BITS 32
#include "milkymist-vgafb_template.h"

enum {
    R_CTRL = 0,
    R_HRES,
    R_HSYNC_START,
    R_HSYNC_END,
    R_HSCAN,
    R_VRES,
    R_VSYNC_START,
    R_VSYNC_END,
    R_VSCAN,
    R_BASEADDRESS,
    R_BASEADDRESS_ACT,
    R_BURST_COUNT,
    R_DDC,
    R_SOURCE_CLOCK,
    R_MAX
};

enum {
    CTRL_RESET = (1<<0),
};

#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
#define MILKYMIST_VGAFB(obj) \
    OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)

struct MilkymistVgafbState {
    SysBusDevice parent_obj;

    MemoryRegion regs_region;
    MemoryRegionSection fbsection;
    QemuConsole *con;

    int invalidate;
    uint32_t fb_offset;
    uint32_t fb_mask;

    uint32_t regs[R_MAX];
};
typedef struct MilkymistVgafbState MilkymistVgafbState;

static int vgafb_enabled(MilkymistVgafbState *s)
{
    return !(s->regs[R_CTRL] & CTRL_RESET);
}

static void vgafb_update_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    SysBusDevice *sbd;
    DisplaySurface *surface = qemu_console_surface(s->con);
    int src_width;
    int first = 0;
    int last = 0;
    drawfn fn;

    if (!vgafb_enabled(s)) {
        return;
    }

    sbd = SYS_BUS_DEVICE(s);
    int dest_width = s->regs[R_HRES];

    switch (surface_bits_per_pixel(surface)) {
    case 0:
        return;
    case 8:
        fn = draw_line_8;
        break;
    case 15:
        fn = draw_line_15;
        dest_width *= 2;
        break;
    case 16:
        fn = draw_line_16;
        dest_width *= 2;
        break;
    case 24:
        fn = draw_line_24;
        dest_width *= 3;
        break;
    case 32:
        fn = draw_line_32;
        dest_width *= 4;
        break;
    default:
        hw_error("milkymist_vgafb: bad color depth\n");
        break;
    }

    src_width = s->regs[R_HRES] * 2;
    if (s->invalidate) {
        framebuffer_update_memory_section(&s->fbsection,
                                          sysbus_address_space(sbd),
                                          s->regs[R_BASEADDRESS] + s->fb_offset,
                                          s->regs[R_VRES], src_width);
    }

    framebuffer_update_display(surface, &s->fbsection,
                               s->regs[R_HRES],
                               s->regs[R_VRES],
                               src_width,
                               dest_width,
                               0,
                               s->invalidate,
                               fn,
                               NULL,
                               &first, &last);

    if (first >= 0) {
        dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
    }
    s->invalidate = 0;
}

static void vgafb_invalidate_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    s->invalidate = 1;
}

static void vgafb_resize(MilkymistVgafbState *s)
{
    if (!vgafb_enabled(s)) {
        return;
    }

    qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
    s->invalidate = 1;
}

static uint64_t vgafb_read(void *opaque, hwaddr addr,
                           unsigned size)
{
    MilkymistVgafbState *s = opaque;
    uint32_t r = 0;

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
    case R_HRES:
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VRES:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BASEADDRESS:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        r = s->regs[addr];
    break;
    case R_BASEADDRESS_ACT:
        r = s->regs[R_BASEADDRESS];
    break;

    default:
        error_report("milkymist_vgafb: read access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }

    trace_milkymist_vgafb_memory_read(addr << 2, r);

    return r;
}

static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
                        unsigned size)
{
    MilkymistVgafbState *s = opaque;

    trace_milkymist_vgafb_memory_write(addr, value);

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        s->regs[addr] = value;
        break;
    case R_BASEADDRESS:
        if (value & 0x1f) {
            error_report("milkymist_vgafb: framebuffer base address have to "
                     "be 32 byte aligned");
            break;
        }
        s->regs[addr] = value & s->fb_mask;
        s->invalidate = 1;
        break;
    case R_HRES:
    case R_VRES:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_BASEADDRESS_ACT:
        error_report("milkymist_vgafb: write to read-only register 0x"
                TARGET_FMT_plx, addr << 2);
        break;

    default:
        error_report("milkymist_vgafb: write access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }
}

static const MemoryRegionOps vgafb_mmio_ops = {
    .read = vgafb_read,
    .write = vgafb_write,
    .valid = {
        .min_access_size = 4,
        .max_access_size = 4,
    },
    .endianness = DEVICE_NATIVE_ENDIAN,
};

static void milkymist_vgafb_reset(DeviceState *d)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
    int i;

    for (i = 0; i < R_MAX; i++) {
        s->regs[i] = 0;
    }

    /* defaults */
    s->regs[R_CTRL] = CTRL_RESET;
    s->regs[R_HRES] = 640;
    s->regs[R_VRES] = 480;
    s->regs[R_BASEADDRESS] = 0;
}

static const GraphicHwOps vgafb_ops = {
    .invalidate  = vgafb_invalidate_display,
    .gfx_update  = vgafb_update_display,
};

static void milkymist_vgafb_init(Object *obj)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(obj);
    SysBusDevice *dev = SYS_BUS_DEVICE(obj);

    memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
            "milkymist-vgafb", R_MAX * 4);
    sysbus_init_mmio(dev, &s->regs_region);
}

static void milkymist_vgafb_realize(DeviceState *dev, Error **errp)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);

    s->con = graphic_console_init(dev, 0, &vgafb_ops, s);
}

static int vgafb_post_load(void *opaque, int version_id)
{
    vgafb_invalidate_display(opaque);
    return 0;
}

static const VMStateDescription vmstate_milkymist_vgafb = {
    .name = "milkymist-vgafb",
    .version_id = 1,
    .minimum_version_id = 1,
    .post_load = vgafb_post_load,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
        VMSTATE_END_OF_LIST()
    }
};

static Property milkymist_vgafb_properties[] = {
    DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
    DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
    DEFINE_PROP_END_OF_LIST(),
};

static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);

    dc->reset = milkymist_vgafb_reset;
    dc->vmsd = &vmstate_milkymist_vgafb;
    dc->props = milkymist_vgafb_properties;
    dc->realize = milkymist_vgafb_realize;
}

static const TypeInfo milkymist_vgafb_info = {
    .name          = TYPE_MILKYMIST_VGAFB,
    .parent        = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(MilkymistVgafbState),
    .instance_init = milkymist_vgafb_init,
    .class_init    = milkymist_vgafb_class_init,
};

static void milkymist_vgafb_register_types(void)
{
    type_register_static(&milkymist_vgafb_info);
}

type_init(milkymist_vgafb_register_types)
Commit	Line	Data
d23948b1 MW	1
	2	/*
	3	* QEMU model of the Milkymist VGA framebuffer.
	4	*
a3b6181e	5	* Copyright (c) 2010-2012 Michael Walle <michael@walle.cc>
d23948b1 MW	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*
	20	*
	21	* Specification available at:
6dbbe243	22	* http://milkymist.walle.cc/socdoc/vgafb.pdf
d23948b1 MW	23	*/
d23948b1 MW	24
ea99dde1	25	#include "qemu/osdep.h"
83c9f4ca PB	26	#include "hw/hw.h"
83c9f4ca PB	27	#include "hw/sysbus.h"
d23948b1	28	#include "trace.h"
28ecbaee	29	#include "ui/console.h"
47b43a1f	30	#include "framebuffer.h"
28ecbaee	31	#include "ui/pixel_ops.h"
1de7afc9	32	#include "qemu/error-report.h"
0b8fa32f	33	#include "qemu/module.h"
d23948b1 MW	34
d23948b1 MW	35	#define BITS 8
d6454270	36	#include "migration/vmstate.h"
47b43a1f	37	#include "milkymist-vgafb_template.h"
d23948b1	38	#define BITS 15
47b43a1f	39	#include "milkymist-vgafb_template.h"
d23948b1	40	#define BITS 16
47b43a1f	41	#include "milkymist-vgafb_template.h"
d23948b1	42	#define BITS 24
47b43a1f	43	#include "milkymist-vgafb_template.h"
d23948b1	44	#define BITS 32
47b43a1f	45	#include "milkymist-vgafb_template.h"
d23948b1 MW	46
	47	enum {
	48	R_CTRL = 0,
	49	R_HRES,
	50	R_HSYNC_START,
	51	R_HSYNC_END,
	52	R_HSCAN,
	53	R_VRES,
	54	R_VSYNC_START,
	55	R_VSYNC_END,
	56	R_VSCAN,
	57	R_BASEADDRESS,
	58	R_BASEADDRESS_ACT,
	59	R_BURST_COUNT,
a3b6181e	60	R_DDC,
d23948b1 MW	61	R_SOURCE_CLOCK,
	62	R_MAX
	63	};
	64
	65	enum {
	66	CTRL_RESET = (1<<0),
	67	};
	68
54df97bb AF	69	#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
	70	#define MILKYMIST_VGAFB(obj) \
	71	OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)
	72
d23948b1	73	struct MilkymistVgafbState {
54df97bb AF	74	SysBusDevice parent_obj;
54df97bb AF	75
883abf8d	76	MemoryRegion regs_region;
c1076c3e	77	MemoryRegionSection fbsection;
c78f7137	78	QemuConsole *con;
d23948b1 MW	79
	80	int invalidate;
	81	uint32_t fb_offset;
	82	uint32_t fb_mask;
	83
	84	uint32_t regs[R_MAX];
	85	};
	86	typedef struct MilkymistVgafbState MilkymistVgafbState;
	87
	88	static int vgafb_enabled(MilkymistVgafbState *s)
	89	{
	90	return !(s->regs[R_CTRL] & CTRL_RESET);
	91	}
	92
	93	static void vgafb_update_display(void *opaque)
	94	{
	95	MilkymistVgafbState *s = opaque;
54df97bb	96	SysBusDevice *sbd;
c78f7137	97	DisplaySurface *surface = qemu_console_surface(s->con);
c1076c3e	98	int src_width;
d23948b1 MW	99	int first = 0;
	100	int last = 0;
	101	drawfn fn;
	102
	103	if (!vgafb_enabled(s)) {
	104	return;
	105	}
	106
54df97bb	107	sbd = SYS_BUS_DEVICE(s);
d23948b1 MW	108	int dest_width = s->regs[R_HRES];
d23948b1 MW	109
c78f7137	110	switch (surface_bits_per_pixel(surface)) {
d23948b1 MW	111	case 0:
	112	return;
	113	case 8:
	114	fn = draw_line_8;
	115	break;
	116	case 15:
	117	fn = draw_line_15;
	118	dest_width *= 2;
	119	break;
	120	case 16:
	121	fn = draw_line_16;
	122	dest_width *= 2;
	123	break;
	124	case 24:
	125	fn = draw_line_24;
	126	dest_width *= 3;
	127	break;
	128	case 32:
	129	fn = draw_line_32;
	130	dest_width *= 4;
	131	break;
	132	default:
	133	hw_error("milkymist_vgafb: bad color depth\n");
	134	break;
	135	}
	136
c1076c3e PB	137	src_width = s->regs[R_HRES] * 2;
	138	if (s->invalidate) {
	139	framebuffer_update_memory_section(&s->fbsection,
	140	sysbus_address_space(sbd),
	141	s->regs[R_BASEADDRESS] + s->fb_offset,
	142	s->regs[R_VRES], src_width);
	143	}
	144
	145	framebuffer_update_display(surface, &s->fbsection,
d23948b1 MW	146	s->regs[R_HRES],
d23948b1 MW	147	s->regs[R_VRES],
c1076c3e	148	src_width,
d23948b1 MW	149	dest_width,
	150	0,
	151	s->invalidate,
	152	fn,
	153	NULL,
	154	&first, &last);
	155
	156	if (first >= 0) {
c78f7137	157	dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
d23948b1 MW	158	}
	159	s->invalidate = 0;
	160	}
	161
	162	static void vgafb_invalidate_display(void *opaque)
	163	{
	164	MilkymistVgafbState *s = opaque;
	165	s->invalidate = 1;
	166	}
	167
	168	static void vgafb_resize(MilkymistVgafbState *s)
	169	{
	170	if (!vgafb_enabled(s)) {
	171	return;
	172	}
	173
c78f7137	174	qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
d23948b1 MW	175	s->invalidate = 1;
	176	}
	177
a8170e5e	178	static uint64_t vgafb_read(void *opaque, hwaddr addr,
883abf8d	179	unsigned size)
d23948b1 MW	180	{
	181	MilkymistVgafbState *s = opaque;
	182	uint32_t r = 0;
	183
	184	addr >>= 2;
	185	switch (addr) {
	186	case R_CTRL:
	187	case R_HRES:
	188	case R_HSYNC_START:
	189	case R_HSYNC_END:
	190	case R_HSCAN:
	191	case R_VRES:
	192	case R_VSYNC_START:
	193	case R_VSYNC_END:
	194	case R_VSCAN:
	195	case R_BASEADDRESS:
	196	case R_BURST_COUNT:
a3b6181e	197	case R_DDC:
d23948b1 MW	198	case R_SOURCE_CLOCK:
	199	r = s->regs[addr];
	200	break;
	201	case R_BASEADDRESS_ACT:
	202	r = s->regs[R_BASEADDRESS];
	203	break;
	204
	205	default:
	206	error_report("milkymist_vgafb: read access to unknown register 0x"
	207	TARGET_FMT_plx, addr << 2);
	208	break;
	209	}
	210
	211	trace_milkymist_vgafb_memory_read(addr << 2, r);
	212
	213	return r;
	214	}
	215
a8170e5e	216	static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
883abf8d	217	unsigned size)
d23948b1 MW	218	{
	219	MilkymistVgafbState *s = opaque;
	220
	221	trace_milkymist_vgafb_memory_write(addr, value);
	222
	223	addr >>= 2;
	224	switch (addr) {
	225	case R_CTRL:
c07050dd MW	226	s->regs[addr] = value;
	227	vgafb_resize(s);
	228	break;
d23948b1 MW	229	case R_HSYNC_START:
	230	case R_HSYNC_END:
	231	case R_HSCAN:
	232	case R_VSYNC_START:
	233	case R_VSYNC_END:
	234	case R_VSCAN:
	235	case R_BURST_COUNT:
a3b6181e	236	case R_DDC:
d23948b1 MW	237	case R_SOURCE_CLOCK:
	238	s->regs[addr] = value;
	239	break;
	240	case R_BASEADDRESS:
	241	if (value & 0x1f) {
	242	error_report("milkymist_vgafb: framebuffer base address have to "
	243	"be 32 byte aligned");
	244	break;
	245	}
	246	s->regs[addr] = value & s->fb_mask;
	247	s->invalidate = 1;
	248	break;
	249	case R_HRES:
	250	case R_VRES:
	251	s->regs[addr] = value;
	252	vgafb_resize(s);
	253	break;
	254	case R_BASEADDRESS_ACT:
	255	error_report("milkymist_vgafb: write to read-only register 0x"
	256	TARGET_FMT_plx, addr << 2);
	257	break;
	258
	259	default:
	260	error_report("milkymist_vgafb: write access to unknown register 0x"
	261	TARGET_FMT_plx, addr << 2);
	262	break;
	263	}
	264	}
	265
883abf8d MW	266	static const MemoryRegionOps vgafb_mmio_ops = {
	267	.read = vgafb_read,
	268	.write = vgafb_write,
	269	.valid = {
	270	.min_access_size = 4,
	271	.max_access_size = 4,
	272	},
	273	.endianness = DEVICE_NATIVE_ENDIAN,
d23948b1 MW	274	};
	275
	276	static void milkymist_vgafb_reset(DeviceState *d)
	277	{
54df97bb	278	MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
d23948b1 MW	279	int i;
	280
	281	for (i = 0; i < R_MAX; i++) {
	282	s->regs[i] = 0;
	283	}
	284
	285	/* defaults */
	286	s->regs[R_CTRL] = CTRL_RESET;
	287	s->regs[R_HRES] = 640;
	288	s->regs[R_VRES] = 480;
	289	s->regs[R_BASEADDRESS] = 0;
	290	}
	291
380cd056 GH	292	static const GraphicHwOps vgafb_ops = {
	293	.invalidate = vgafb_invalidate_display,
	294	.gfx_update = vgafb_update_display,
	295	};
	296
165b244b	297	static void milkymist_vgafb_init(Object *obj)
d23948b1	298	{
165b244b XZ	299	MilkymistVgafbState *s = MILKYMIST_VGAFB(obj);
165b244b XZ	300	SysBusDevice *dev = SYS_BUS_DEVICE(obj);
d23948b1	301
3eadad55	302	memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
883abf8d	303	"milkymist-vgafb", R_MAX * 4);
750ecd44	304	sysbus_init_mmio(dev, &s->regs_region);
165b244b	305	}
d23948b1	306
165b244b XZ	307	static void milkymist_vgafb_realize(DeviceState dev, Error *errp)
	308	{
	309	MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);
d23948b1	310
165b244b	311	s->con = graphic_console_init(dev, 0, &vgafb_ops, s);
d23948b1 MW	312	}
	313
	314	static int vgafb_post_load(void *opaque, int version_id)
	315	{
	316	vgafb_invalidate_display(opaque);
	317	return 0;
	318	}
	319
	320	static const VMStateDescription vmstate_milkymist_vgafb = {
	321	.name = "milkymist-vgafb",
	322	.version_id = 1,
	323	.minimum_version_id = 1,
d23948b1	324	.post_load = vgafb_post_load,
35d08458	325	.fields = (VMStateField[]) {
d23948b1 MW	326	VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
	327	VMSTATE_END_OF_LIST()
	328	}
	329	};
	330
999e12bb AL	331	static Property milkymist_vgafb_properties[] = {
	332	DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
	333	DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
	334	DEFINE_PROP_END_OF_LIST(),
	335	};
	336
	337	static void milkymist_vgafb_class_init(ObjectClass klass, void data)
	338	{
39bffca2	339	DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb	340
39bffca2 AL	341	dc->reset = milkymist_vgafb_reset;
	342	dc->vmsd = &vmstate_milkymist_vgafb;
	343	dc->props = milkymist_vgafb_properties;
165b244b	344	dc->realize = milkymist_vgafb_realize;
999e12bb AL	345	}
999e12bb AL	346
8c43a6f0	347	static const TypeInfo milkymist_vgafb_info = {
54df97bb	348	.name = TYPE_MILKYMIST_VGAFB,
39bffca2 AL	349	.parent = TYPE_SYS_BUS_DEVICE,
39bffca2 AL	350	.instance_size = sizeof(MilkymistVgafbState),
165b244b	351	.instance_init = milkymist_vgafb_init,
39bffca2	352	.class_init = milkymist_vgafb_class_init,
d23948b1 MW	353	};
d23948b1 MW	354
83f7d43a	355	static void milkymist_vgafb_register_types(void)
d23948b1	356	{
39bffca2	357	type_register_static(&milkymist_vgafb_info);
d23948b1 MW	358	}
d23948b1 MW	359
83f7d43a	360	type_init(milkymist_vgafb_register_types)