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cb9c377f 1#ifndef HW_QXL_H
175de524 2#define HW_QXL_H
cb9c377f 3
a19cbfb3 4
83c9f4ca 5#include "hw/pci/pci.h"
47b43a1f 6#include "vga_int.h"
1de7afc9 7#include "qemu/thread.h"
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8
9#include "ui/qemu-spice.h"
10#include "ui/spice-display.h"
db1015e9 11#include "qom/object.h"
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12
13enum qxl_mode {
14 QXL_MODE_UNDEFINED,
15 QXL_MODE_VGA,
16 QXL_MODE_COMPAT, /* spice 0.4.x */
17 QXL_MODE_NATIVE,
18};
19
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20#ifndef QXL_VRAM64_RANGE_INDEX
21#define QXL_VRAM64_RANGE_INDEX 4
22#endif
23
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24#define QXL_UNDEFINED_IO UINT32_MAX
25
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26#define QXL_NUM_DIRTY_RECTS 64
27
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28#define QXL_PAGE_BITS 12
29#define QXL_PAGE_SIZE (1 << QXL_PAGE_BITS);
30
db1015e9 31struct PCIQXLDevice {
a19cbfb3 32 PCIDevice pci;
848696bf 33 PortioList vga_port_list;
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34 SimpleSpiceDisplay ssd;
35 int id;
60e94e43 36 bool have_vga;
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37 uint32_t debug;
38 uint32_t guestdebug;
39 uint32_t cmdlog;
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40
41 uint32_t guest_bug;
42
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43 enum qxl_mode mode;
44 uint32_t cmdflags;
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45 uint32_t revision;
46
47 int32_t num_memslots;
a19cbfb3 48
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49 uint32_t current_async;
50 QemuMutex async_lock;
51
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52 struct guest_slots {
53 QXLMemSlot slot;
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54 MemoryRegion *mr;
55 uint64_t offset;
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56 uint64_t size;
57 uint64_t delta;
58 uint32_t active;
59 } guest_slots[NUM_MEMSLOTS];
60
61 struct guest_primary {
62 QXLSurfaceCreate surface;
63 uint32_t commands;
64 uint32_t resized;
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65 int32_t qxl_stride;
66 uint32_t abs_stride;
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67 uint32_t bits_pp;
68 uint32_t bytes_pp;
4c19ebb5 69 uint8_t *data;
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70 } guest_primary;
71
72 struct surfaces {
ddd8fdc7 73 QXLPHYSICAL *cmds;
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74 uint32_t count;
75 uint32_t max;
76 } guest_surfaces;
77 QXLPHYSICAL guest_cursor;
78
020af1c4 79 QXLPHYSICAL guest_monitors_config;
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80 uint32_t guest_head0_width;
81 uint32_t guest_head0_height;
020af1c4 82
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83 QemuMutex track_lock;
84
a19cbfb3 85 /* thread signaling */
4a46c99c 86 QEMUBH *update_irq;
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87
88 /* ram pci bar */
89 QXLRam *ram;
90 VGACommonState vga;
91 uint32_t num_free_res;
92 QXLReleaseInfo *last_release;
93 uint32_t last_release_offset;
94 uint32_t oom_running;
13d1fd44 95 uint32_t vgamem_size;
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96
97 /* rom pci bar */
98 QXLRom shadow_rom;
99 QXLRom *rom;
100 QXLModes *modes;
101 uint32_t rom_size;
b1950430 102 MemoryRegion rom_bar;
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103#if SPICE_SERVER_VERSION >= 0x000c06 /* release 0.12.6 */
104 uint16_t max_outputs;
105#endif
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106
107 /* vram pci bar */
de1b9b85 108 uint64_t vram_size;
b1950430 109 MemoryRegion vram_bar;
de1b9b85 110 uint64_t vram32_size;
6f2b175a 111 MemoryRegion vram32_bar;
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112
113 /* io bar */
b1950430 114 MemoryRegion io_bar;
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115
116 /* user-friendly properties (in megabytes) */
117 uint32_t ram_size_mb;
118 uint32_t vram_size_mb;
6f2b175a 119 uint32_t vram32_size_mb;
13d1fd44 120 uint32_t vgamem_size_mb;
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121 uint32_t xres;
122 uint32_t yres;
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123
124 /* qxl_render_update state */
125 int render_update_cookie_num;
126 int num_dirty_rects;
127 QXLRect dirty[QXL_NUM_DIRTY_RECTS];
128 QEMUBH *update_area_bh;
db1015e9 129};
a19cbfb3 130
c69f6c7d 131#define TYPE_PCI_QXL "pci-qxl"
8063396b 132OBJECT_DECLARE_SIMPLE_TYPE(PCIQXLDevice, PCI_QXL)
c69f6c7d 133
a19cbfb3 134#define PANIC_ON(x) if ((x)) { \
a89f364a 135 printf("%s: PANIC %s failed\n", __func__, #x); \
2bce0400 136 abort(); \
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137}
138
139#define dprint(_qxl, _level, _fmt, ...) \
140 do { \
141 if (_qxl->debug >= _level) { \
142 fprintf(stderr, "qxl-%d: ", _qxl->id); \
143 fprintf(stderr, _fmt, ## __VA_ARGS__); \
144 } \
145 } while (0)
146
ed71c09f 147#define QXL_DEFAULT_REVISION (QXL_REVISION_STABLE_V12 + 1)
9197a7c8 148
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149/* qxl.c */
150void *qxl_phys2virt(PCIQXLDevice *qxl, QXLPHYSICAL phys, int group_id);
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151void qxl_set_guest_bug(PCIQXLDevice *qxl, const char *msg, ...)
152 GCC_FMT_ATTR(2, 3);
a19cbfb3 153
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154void qxl_spice_update_area(PCIQXLDevice *qxl, uint32_t surface_id,
155 struct QXLRect *area, struct QXLRect *dirty_rects,
156 uint32_t num_dirty_rects,
5ff4e36c 157 uint32_t clear_dirty_region,
2e1a98c9 158 qxl_async_io async, QXLCookie *cookie);
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159void qxl_spice_loadvm_commands(PCIQXLDevice *qxl, struct QXLCommandExt *ext,
160 uint32_t count);
161void qxl_spice_oom(PCIQXLDevice *qxl);
162void qxl_spice_reset_memslots(PCIQXLDevice *qxl);
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163void qxl_spice_reset_image_cache(PCIQXLDevice *qxl);
164void qxl_spice_reset_cursor(PCIQXLDevice *qxl);
165
a19cbfb3 166/* qxl-logger.c */
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167int qxl_log_cmd_cursor(PCIQXLDevice *qxl, QXLCursorCmd *cmd, int group_id);
168int qxl_log_command(PCIQXLDevice *qxl, const char *ring, QXLCommandExt *ext);
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169
170/* qxl-render.c */
171void qxl_render_resize(PCIQXLDevice *qxl);
172void qxl_render_update(PCIQXLDevice *qxl);
fae2afb1 173int qxl_render_cursor(PCIQXLDevice *qxl, QXLCommandExt *ext);
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174void qxl_render_update_area_done(PCIQXLDevice *qxl, QXLCookie *cookie);
175void qxl_render_update_area_bh(void *opaque);
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176
177#endif