[mirror_qemu.git] / hw / display / ssd0303.c

/*
 * SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
 *
 * Copyright (c) 2006-2007 CodeSourcery.
 * Written by Paul Brook
 *
 * This code is licensed under the GPL.
 */

/* The controller can support a variety of different displays, but we only
   implement one.  Most of the commends relating to brightness and geometry
   setup are ignored. */

#include "qemu/osdep.h"
#include "hw/i2c/i2c.h"
#include "migration/vmstate.h"
#include "qemu/module.h"
#include "ui/console.h"
#include "qom/object.h"

//#define DEBUG_SSD0303 1

#ifdef DEBUG_SSD0303
#define DPRINTF(fmt, ...) \
do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
#else
#define DPRINTF(fmt, ...) do {} while(0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
#endif

/* Scaling factor for pixels.  */
#define MAGNIFY 4

enum ssd0303_mode
{
    SSD0303_IDLE,
    SSD0303_DATA,
    SSD0303_CMD
};

enum ssd0303_cmd {
    SSD0303_CMD_NONE,
    SSD0303_CMD_SKIP1
};

#define TYPE_SSD0303 "ssd0303"
typedef struct ssd0303_state ssd0303_state;
#define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303)

struct ssd0303_state {
    I2CSlave parent_obj;

    QemuConsole *con;
    int row;
    int col;
    int start_line;
    int mirror;
    int flash;
    int enabled;
    int inverse;
    int redraw;
    enum ssd0303_mode mode;
    enum ssd0303_cmd cmd_state;
    uint8_t framebuffer[132*8];
};

static uint8_t ssd0303_recv(I2CSlave *i2c)
{
    BADF("Reads not implemented\n");
    return 0xff;
}

static int ssd0303_send(I2CSlave *i2c, uint8_t data)
{
    ssd0303_state *s = SSD0303(i2c);
    enum ssd0303_cmd old_cmd_state;

    switch (s->mode) {
    case SSD0303_IDLE:
        DPRINTF("byte 0x%02x\n", data);
        if (data == 0x80)
            s->mode = SSD0303_CMD;
        else if (data == 0x40)
            s->mode = SSD0303_DATA;
        else
            BADF("Unexpected byte 0x%x\n", data);
        break;
    case SSD0303_DATA:
        DPRINTF("data 0x%02x\n", data);
        if (s->col < 132) {
            s->framebuffer[s->col + s->row * 132] = data;
            s->col++;
            s->redraw = 1;
        }
        break;
    case SSD0303_CMD:
        old_cmd_state = s->cmd_state;
        s->cmd_state = SSD0303_CMD_NONE;
        switch (old_cmd_state) {
        case SSD0303_CMD_NONE:
            DPRINTF("cmd 0x%02x\n", data);
            s->mode = SSD0303_IDLE;
            switch (data) {
            case 0x00 ... 0x0f: /* Set lower column address.  */
                s->col = (s->col & 0xf0) | (data & 0xf);
                break;
            case 0x10 ... 0x20: /* Set higher column address.  */
                s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
                break;
            case 0x40 ... 0x7f: /* Set start line.  */
                s->start_line = 0;
                break;
            case 0x81: /* Set contrast (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xa0: /* Mirror off.  */
                s->mirror = 0;
                break;
            case 0xa1: /* Mirror off.  */
                s->mirror = 1;
                break;
            case 0xa4: /* Entire display off.  */
                s->flash = 0;
                break;
            case 0xa5: /* Entire display on.  */
                s->flash = 1;
                break;
            case 0xa6: /* Inverse off.  */
                s->inverse = 0;
                break;
            case 0xa7: /* Inverse on.  */
                s->inverse = 1;
                break;
            case 0xa8: /* Set multiplied ratio (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xad: /* DC-DC power control.  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xae: /* Display off.  */
                s->enabled = 0;
                break;
            case 0xaf: /* Display on.  */
                s->enabled = 1;
                break;
            case 0xb0 ... 0xbf: /* Set Page address.  */
                s->row = data & 7;
                break;
            case 0xc0 ... 0xc8: /* Set COM output direction (Ignored).  */
                break;
            case 0xd3: /* Set display offset (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd5: /* Set display clock (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd8: /* Set color and power mode (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd9: /* Set pre-charge period (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xda: /* Set COM pin configuration (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xdb: /* Set VCOM dselect level (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xe3: /* no-op.  */
                break;
            default:
                BADF("Unknown command: 0x%x\n", data);
            }
            break;
        case SSD0303_CMD_SKIP1:
            DPRINTF("skip 0x%02x\n", data);
            break;
        }
        break;
    }
    return 0;
}

static int ssd0303_event(I2CSlave *i2c, enum i2c_event event)
{
    ssd0303_state *s = SSD0303(i2c);

    switch (event) {
    case I2C_FINISH:
        s->mode = SSD0303_IDLE;
        break;
    case I2C_START_RECV:
    case I2C_START_SEND:
    case I2C_NACK:
        /* Nothing to do.  */
        break;
    }

    return 0;
}

static void ssd0303_update_display(void *opaque)
{
    ssd0303_state *s = (ssd0303_state *)opaque;
    DisplaySurface *surface = qemu_console_surface(s->con);
    uint8_t *dest;
    uint8_t *src;
    int x;
    int y;
    int line;
    char *colors[2];
    char colortab[MAGNIFY * 8];
    int dest_width;
    uint8_t mask;

    if (!s->redraw)
        return;

    switch (surface_bits_per_pixel(surface)) {
    case 0:
        return;
    case 15:
        dest_width = 2;
        break;
    case 16:
        dest_width = 2;
        break;
    case 24:
        dest_width = 3;
        break;
    case 32:
        dest_width = 4;
        break;
    default:
        BADF("Bad color depth\n");
        return;
    }
    dest_width *= MAGNIFY;
    memset(colortab, 0xff, dest_width);
    memset(colortab + dest_width, 0, dest_width);
    if (s->flash) {
        colors[0] = colortab;
        colors[1] = colortab;
    } else if (s->inverse) {
        colors[0] = colortab;
        colors[1] = colortab + dest_width;
    } else {
        colors[0] = colortab + dest_width;
        colors[1] = colortab;
    }
    dest = surface_data(surface);
    for (y = 0; y < 16; y++) {
        line = (y + s->start_line) & 63;
        src = s->framebuffer + 132 * (line >> 3) + 36;
        mask = 1 << (line & 7);
        for (x = 0; x < 96; x++) {
            memcpy(dest, colors[(*src & mask) != 0], dest_width);
            dest += dest_width;
            src++;
        }
        for (x = 1; x < MAGNIFY; x++) {
            memcpy(dest, dest - dest_width * 96, dest_width * 96);
            dest += dest_width * 96;
        }
    }
    s->redraw = 0;
    dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
}

static void ssd0303_invalidate_display(void * opaque)
{
    ssd0303_state *s = (ssd0303_state *)opaque;
    s->redraw = 1;
}

static const VMStateDescription vmstate_ssd0303 = {
    .name = "ssd0303_oled",
    .version_id = 1,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_INT32(row, ssd0303_state),
        VMSTATE_INT32(col, ssd0303_state),
        VMSTATE_INT32(start_line, ssd0303_state),
        VMSTATE_INT32(mirror, ssd0303_state),
        VMSTATE_INT32(flash, ssd0303_state),
        VMSTATE_INT32(enabled, ssd0303_state),
        VMSTATE_INT32(inverse, ssd0303_state),
        VMSTATE_INT32(redraw, ssd0303_state),
        VMSTATE_UINT32(mode, ssd0303_state),
        VMSTATE_UINT32(cmd_state, ssd0303_state),
        VMSTATE_BUFFER(framebuffer, ssd0303_state),
        VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
        VMSTATE_END_OF_LIST()
    }
};

static const GraphicHwOps ssd0303_ops = {
    .invalidate  = ssd0303_invalidate_display,
    .gfx_update  = ssd0303_update_display,
};

static void ssd0303_realize(DeviceState *dev, Error **errp)
{
    ssd0303_state *s = SSD0303(dev);

    s->con = graphic_console_init(dev, 0, &ssd0303_ops, s);
    qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
}

static void ssd0303_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);

    dc->realize = ssd0303_realize;
    k->event = ssd0303_event;
    k->recv = ssd0303_recv;
    k->send = ssd0303_send;
    dc->vmsd = &vmstate_ssd0303;
}

static const TypeInfo ssd0303_info = {
    .name          = TYPE_SSD0303,
    .parent        = TYPE_I2C_SLAVE,
    .instance_size = sizeof(ssd0303_state),
    .class_init    = ssd0303_class_init,
};

static void ssd0303_register_types(void)
{
    type_register_static(&ssd0303_info);
}

type_init(ssd0303_register_types)
Commit	Line	Data
9ee6e8bb PB	1	/*
	2	* SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
	3	*
	4	* Copyright (c) 2006-2007 CodeSourcery.
	5	* Written by Paul Brook
	6	*
8e31bf38	7	* This code is licensed under the GPL.
9ee6e8bb PB	8	*/
	9
	10	/* The controller can support a variety of different displays, but we only
	11	implement one. Most of the commends relating to brightness and geometry
	12	setup are ignored. */
0b8fa32f	13
47df5154	14	#include "qemu/osdep.h"
0d09e41a	15	#include "hw/i2c/i2c.h"
d6454270	16	#include "migration/vmstate.h"
0b8fa32f	17	#include "qemu/module.h"
28ecbaee	18	#include "ui/console.h"
db1015e9	19	#include "qom/object.h"
9ee6e8bb PB	20
	21	//#define DEBUG_SSD0303 1
	22
	23	#ifdef DEBUG_SSD0303
001faf32 BS	24	#define DPRINTF(fmt, ...) \
	25	do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
	26	#define BADF(fmt, ...) \
	27	do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
9ee6e8bb	28	#else
001faf32 BS	29	#define DPRINTF(fmt, ...) do {} while(0)
	30	#define BADF(fmt, ...) \
	31	do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
9ee6e8bb PB	32	#endif
	33
	34	/* Scaling factor for pixels. */
	35	#define MAGNIFY 4
	36
	37	enum ssd0303_mode
	38	{
	39	SSD0303_IDLE,
	40	SSD0303_DATA,
	41	SSD0303_CMD
	42	};
	43
	44	enum ssd0303_cmd {
	45	SSD0303_CMD_NONE,
	46	SSD0303_CMD_SKIP1
	47	};
	48
b1be4515	49	#define TYPE_SSD0303 "ssd0303"
db1015e9	50	typedef struct ssd0303_state ssd0303_state;
b1be4515 AF	51	#define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303)
b1be4515 AF	52
db1015e9	53	struct ssd0303_state {
b1be4515 AF	54	I2CSlave parent_obj;
b1be4515 AF	55
c78f7137	56	QemuConsole *con;
9ee6e8bb PB	57	int row;
	58	int col;
	59	int start_line;
	60	int mirror;
	61	int flash;
	62	int enabled;
	63	int inverse;
	64	int redraw;
	65	enum ssd0303_mode mode;
	66	enum ssd0303_cmd cmd_state;
	67	uint8_t framebuffer[132*8];
db1015e9	68	};
9ee6e8bb	69
2ac4c5f4	70	static uint8_t ssd0303_recv(I2CSlave *i2c)
9ee6e8bb PB	71	{
9ee6e8bb PB	72	BADF("Reads not implemented\n");
2ac4c5f4	73	return 0xff;
9ee6e8bb PB	74	}
9ee6e8bb PB	75
9e07bdf8	76	static int ssd0303_send(I2CSlave *i2c, uint8_t data)
9ee6e8bb	77	{
b1be4515	78	ssd0303_state *s = SSD0303(i2c);
9ee6e8bb	79	enum ssd0303_cmd old_cmd_state;
b1be4515	80
9ee6e8bb PB	81	switch (s->mode) {
	82	case SSD0303_IDLE:
	83	DPRINTF("byte 0x%02x\n", data);
	84	if (data == 0x80)
	85	s->mode = SSD0303_CMD;
	86	else if (data == 0x40)
	87	s->mode = SSD0303_DATA;
	88	else
	89	BADF("Unexpected byte 0x%x\n", data);
	90	break;
	91	case SSD0303_DATA:
	92	DPRINTF("data 0x%02x\n", data);
	93	if (s->col < 132) {
	94	s->framebuffer[s->col + s->row * 132] = data;
	95	s->col++;
	96	s->redraw = 1;
	97	}
	98	break;
	99	case SSD0303_CMD:
	100	old_cmd_state = s->cmd_state;
	101	s->cmd_state = SSD0303_CMD_NONE;
	102	switch (old_cmd_state) {
	103	case SSD0303_CMD_NONE:
	104	DPRINTF("cmd 0x%02x\n", data);
	105	s->mode = SSD0303_IDLE;
	106	switch (data) {
4e9a0b5b	107	case 0x00 ... 0x0f: /* Set lower column address. */
9ee6e8bb PB	108	s->col = (s->col & 0xf0) \| (data & 0xf);
	109	break;
	110	case 0x10 ... 0x20: /* Set higher column address. */
	111	s->col = (s->col & 0x0f) \| ((data & 0xf) << 4);
	112	break;
	113	case 0x40 ... 0x7f: /* Set start line. */
	114	s->start_line = 0;
	115	break;
	116	case 0x81: /* Set contrast (Ignored). */
	117	s->cmd_state = SSD0303_CMD_SKIP1;
	118	break;
	119	case 0xa0: /* Mirror off. */
	120	s->mirror = 0;
	121	break;
	122	case 0xa1: /* Mirror off. */
	123	s->mirror = 1;
	124	break;
	125	case 0xa4: /* Entire display off. */
	126	s->flash = 0;
	127	break;
	128	case 0xa5: /* Entire display on. */
	129	s->flash = 1;
	130	break;
	131	case 0xa6: /* Inverse off. */
	132	s->inverse = 0;
	133	break;
	134	case 0xa7: /* Inverse on. */
	135	s->inverse = 1;
	136	break;
26404edc	137	case 0xa8: /* Set multiplied ratio (Ignored). */
9ee6e8bb PB	138	s->cmd_state = SSD0303_CMD_SKIP1;
	139	break;
	140	case 0xad: /* DC-DC power control. */
	141	s->cmd_state = SSD0303_CMD_SKIP1;
	142	break;
	143	case 0xae: /* Display off. */
	144	s->enabled = 0;
	145	break;
	146	case 0xaf: /* Display on. */
	147	s->enabled = 1;
	148	break;
	149	case 0xb0 ... 0xbf: /* Set Page address. */
	150	s->row = data & 7;
	151	break;
	152	case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
	153	break;
	154	case 0xd3: /* Set display offset (Ignored). */
	155	s->cmd_state = SSD0303_CMD_SKIP1;
	156	break;
	157	case 0xd5: /* Set display clock (Ignored). */
	158	s->cmd_state = SSD0303_CMD_SKIP1;
	159	break;
	160	case 0xd8: /* Set color and power mode (Ignored). */
	161	s->cmd_state = SSD0303_CMD_SKIP1;
	162	break;
	163	case 0xd9: /* Set pre-charge period (Ignored). */
	164	s->cmd_state = SSD0303_CMD_SKIP1;
	165	break;
	166	case 0xda: /* Set COM pin configuration (Ignored). */
	167	s->cmd_state = SSD0303_CMD_SKIP1;
	168	break;
	169	case 0xdb: /* Set VCOM dselect level (Ignored). */
	170	s->cmd_state = SSD0303_CMD_SKIP1;
	171	break;
	172	case 0xe3: /* no-op. */
	173	break;
	174	default:
	175	BADF("Unknown command: 0x%x\n", data);
	176	}
	177	break;
	178	case SSD0303_CMD_SKIP1:
	179	DPRINTF("skip 0x%02x\n", data);
	180	break;
	181	}
	182	break;
	183	}
	184	return 0;
	185	}
	186
d307c28c	187	static int ssd0303_event(I2CSlave *i2c, enum i2c_event event)
9ee6e8bb	188	{
b1be4515 AF	189	ssd0303_state *s = SSD0303(i2c);
b1be4515 AF	190
9ee6e8bb PB	191	switch (event) {
	192	case I2C_FINISH:
	193	s->mode = SSD0303_IDLE;
	194	break;
	195	case I2C_START_RECV:
	196	case I2C_START_SEND:
	197	case I2C_NACK:
	198	/* Nothing to do. */
	199	break;
	200	}
d307c28c CM	201
d307c28c CM	202	return 0;
9ee6e8bb PB	203	}
	204
	205	static void ssd0303_update_display(void *opaque)
	206	{
	207	ssd0303_state s = (ssd0303_state )opaque;
c78f7137	208	DisplaySurface *surface = qemu_console_surface(s->con);
9ee6e8bb PB	209	uint8_t *dest;
	210	uint8_t *src;
	211	int x;
	212	int y;
	213	int line;
	214	char *colors[2];
	215	char colortab[MAGNIFY * 8];
	216	int dest_width;
	217	uint8_t mask;
	218
b115bb3f PB	219	if (!s->redraw)
	220	return;
	221
c78f7137	222	switch (surface_bits_per_pixel(surface)) {
b115bb3f PB	223	case 0:
	224	return;
	225	case 15:
	226	dest_width = 2;
	227	break;
	228	case 16:
	229	dest_width = 2;
	230	break;
	231	case 24:
	232	dest_width = 3;
	233	break;
	234	case 32:
	235	dest_width = 4;
	236	break;
	237	default:
	238	BADF("Bad color depth\n");
	239	return;
	240	}
	241	dest_width *= MAGNIFY;
	242	memset(colortab, 0xff, dest_width);
	243	memset(colortab + dest_width, 0, dest_width);
	244	if (s->flash) {
	245	colors[0] = colortab;
	246	colors[1] = colortab;
	247	} else if (s->inverse) {
	248	colors[0] = colortab;
	249	colors[1] = colortab + dest_width;
	250	} else {
	251	colors[0] = colortab + dest_width;
	252	colors[1] = colortab;
	253	}
c78f7137	254	dest = surface_data(surface);
b115bb3f PB	255	for (y = 0; y < 16; y++) {
	256	line = (y + s->start_line) & 63;
	257	src = s->framebuffer + 132 * (line >> 3) + 36;
	258	mask = 1 << (line & 7);
	259	for (x = 0; x < 96; x++) {
	260	memcpy(dest, colors[(*src & mask) != 0], dest_width);
	261	dest += dest_width;
	262	src++;
9ee6e8bb	263	}
b115bb3f PB	264	for (x = 1; x < MAGNIFY; x++) {
	265	memcpy(dest, dest - dest_width * 96, dest_width * 96);
	266	dest += dest_width * 96;
9ee6e8bb PB	267	}
9ee6e8bb PB	268	}
b115bb3f	269	s->redraw = 0;
c78f7137	270	dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
9ee6e8bb PB	271	}
	272
	273	static void ssd0303_invalidate_display(void * opaque)
	274	{
	275	ssd0303_state s = (ssd0303_state )opaque;
	276	s->redraw = 1;
	277	}
	278
aed7278d JQ	279	static const VMStateDescription vmstate_ssd0303 = {
	280	.name = "ssd0303_oled",
	281	.version_id = 1,
	282	.minimum_version_id = 1,
8f1e884b	283	.fields = (VMStateField[]) {
aed7278d JQ	284	VMSTATE_INT32(row, ssd0303_state),
	285	VMSTATE_INT32(col, ssd0303_state),
	286	VMSTATE_INT32(start_line, ssd0303_state),
	287	VMSTATE_INT32(mirror, ssd0303_state),
	288	VMSTATE_INT32(flash, ssd0303_state),
	289	VMSTATE_INT32(enabled, ssd0303_state),
	290	VMSTATE_INT32(inverse, ssd0303_state),
	291	VMSTATE_INT32(redraw, ssd0303_state),
	292	VMSTATE_UINT32(mode, ssd0303_state),
	293	VMSTATE_UINT32(cmd_state, ssd0303_state),
	294	VMSTATE_BUFFER(framebuffer, ssd0303_state),
b1be4515	295	VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
aed7278d JQ	296	VMSTATE_END_OF_LIST()
	297	}
	298	};
23e39294	299
380cd056 GH	300	static const GraphicHwOps ssd0303_ops = {
	301	.invalidate = ssd0303_invalidate_display,
	302	.gfx_update = ssd0303_update_display,
	303	};
	304
c8c9e103	305	static void ssd0303_realize(DeviceState dev, Error *errp)
9ee6e8bb	306	{
c8c9e103	307	ssd0303_state *s = SSD0303(dev);
9ee6e8bb	308
c8c9e103	309	s->con = graphic_console_init(dev, 0, &ssd0303_ops, s);
c78f7137	310	qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
9ee6e8bb	311	}
d2199005	312
b5ea9327 AL	313	static void ssd0303_class_init(ObjectClass klass, void data)
b5ea9327 AL	314	{
39bffca2	315	DeviceClass *dc = DEVICE_CLASS(klass);
b5ea9327 AL	316	I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
b5ea9327 AL	317
c8c9e103	318	dc->realize = ssd0303_realize;
b5ea9327 AL	319	k->event = ssd0303_event;
	320	k->recv = ssd0303_recv;
	321	k->send = ssd0303_send;
39bffca2	322	dc->vmsd = &vmstate_ssd0303;
b5ea9327 AL	323	}
b5ea9327 AL	324
8c43a6f0	325	static const TypeInfo ssd0303_info = {
b1be4515	326	.name = TYPE_SSD0303,
39bffca2 AL	327	.parent = TYPE_I2C_SLAVE,
	328	.instance_size = sizeof(ssd0303_state),
	329	.class_init = ssd0303_class_init,
d2199005 PB	330	};
d2199005 PB	331
83f7d43a	332	static void ssd0303_register_types(void)
d2199005	333	{
39bffca2	334	type_register_static(&ssd0303_info);
d2199005 PB	335	}
d2199005 PB	336
83f7d43a	337	type_init(ssd0303_register_types)