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vga: introduce VGADisplayParams
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CommitLineData
798b0c25
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1/*
2 * QEMU internal VGA defines.
5fafdf24 3 *
798b0c25 4 * Copyright (c) 2003-2004 Fabrice Bellard
5fafdf24 5 *
798b0c25
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
175de524 24
cb9c377f 25#ifndef HW_VGA_INT_H
175de524 26#define HW_VGA_INT_H
11b6b345 27
e07b1589 28#include "exec/ioport.h"
022c62cb 29#include "exec/memory.h"
11b6b345 30
a3ee49f0 31#include "hw/display/bochs-vbe.h"
cfead313 32#include "hw/acpi/acpi_aml_interface.h"
a3ee49f0 33
798b0c25
FB
34#define ST01_V_RETRACE 0x08
35#define ST01_DISP_ENABLE 0x01
36
798b0c25 37#define CH_ATTR_SIZE (160 * 100)
8454df8b 38#define VGA_MAX_HEIGHT 2048
4e3e9d0b 39
cb5a7aa8 40struct vga_precise_retrace {
41 int64_t ticks_per_char;
42 int64_t total_chars;
43 int htotal;
44 int hstart;
45 int hend;
46 int vstart;
47 int vend;
48 int freq;
49};
50
51union vga_retrace {
52 struct vga_precise_retrace precise;
53};
54
4e12cd94
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55struct VGACommonState;
56typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
57typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
58
f9b925fd
PB
59typedef struct VGADisplayParams {
60 uint32_t line_offset;
61 uint32_t start_addr;
62 uint32_t line_compare;
63} VGADisplayParams;
64
4e12cd94 65typedef struct VGACommonState {
80763888 66 MemoryRegion *legacy_address_space;
4e12cd94 67 uint8_t *vram_ptr;
b1950430 68 MemoryRegion vram;
a19cbfb3 69 uint32_t vram_size;
4a1e244e 70 uint32_t vram_size_mb; /* property */
54a85d46 71 uint32_t vbe_size;
3d90c625 72 uint32_t vbe_size_mask;
4e12cd94 73 uint32_t latch;
ad37168c
PB
74 bool has_chain4_alias;
75 MemoryRegion chain4_alias;
4e12cd94
AK
76 uint8_t sr_index;
77 uint8_t sr[256];
94ef4f33 78 uint8_t sr_vbe[256];
4e12cd94
AK
79 uint8_t gr_index;
80 uint8_t gr[256];
81 uint8_t ar_index;
82 uint8_t ar[21];
83 int ar_flip_flop;
84 uint8_t cr_index;
85 uint8_t cr[256]; /* CRT registers */
86 uint8_t msr; /* Misc Output Register */
87 uint8_t fcr; /* Feature Control Register */
88 uint8_t st00; /* status 0 */
89 uint8_t st01; /* status 1 */
90 uint8_t dac_state;
91 uint8_t dac_sub_index;
92 uint8_t dac_read_index;
93 uint8_t dac_write_index;
94 uint8_t dac_cache[3]; /* used when writing */
95 int dac_8bit;
96 uint8_t palette[768];
97 int32_t bank_offset;
4e12cd94 98 int (*get_bpp)(struct VGACommonState *s);
f9b925fd 99 void (*get_params)(struct VGACommonState *s, VGADisplayParams *params);
4e12cd94
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100 void (*get_resolution)(struct VGACommonState *s,
101 int *pwidth,
102 int *pheight);
848696bf
KB
103 PortioList vga_port_list;
104 PortioList vbe_port_list;
a96d8bea
GH
105 /* bochs vbe state */
106 uint16_t vbe_index;
107 uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
108 uint32_t vbe_start_addr;
109 uint32_t vbe_line_offset;
110 uint32_t vbe_bank_mask;
4e12cd94 111 /* display refresh support */
c78f7137 112 QemuConsole *con;
4e12cd94
AK
113 uint32_t font_offsets[2];
114 int graphic_mode;
115 uint8_t shift_control;
116 uint8_t double_scan;
f9b925fd 117 VGADisplayParams params;
4e12cd94
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118 uint32_t plane_updated;
119 uint32_t last_line_offset;
120 uint8_t last_cw, last_ch;
121 uint32_t last_width, last_height; /* in chars or pixels */
122 uint32_t last_scr_width, last_scr_height; /* in pixels */
123 uint32_t last_depth; /* in bits */
c3b10605 124 bool last_byteswap;
55080993 125 bool force_shadow;
4e12cd94 126 uint8_t cursor_start, cursor_end;
9aa0ff0b
JK
127 bool cursor_visible_phase;
128 int64_t cursor_blink_time;
4e12cd94 129 uint32_t cursor_offset;
380cd056 130 const GraphicHwOps *hw_ops;
9678aedd
GH
131 bool full_update_text;
132 bool full_update_gfx;
2c7d8736 133 bool big_endian_fb;
c3b10605 134 bool default_endian_fb;
1fcfdc43 135 bool global_vmstate;
4e12cd94
AK
136 /* hardware mouse cursor support */
137 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
22382bb9
GH
138 uint32_t hw_cursor_x;
139 uint32_t hw_cursor_y;
4e12cd94
AK
140 void (*cursor_invalidate)(struct VGACommonState *s);
141 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
142 /* tell for each page if it has been updated since the last time */
143 uint32_t last_palette[256];
144 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
145 /* retrace */
146 vga_retrace_fn retrace;
147 vga_update_retrace_info_fn update_retrace_info;
cb5a7aa8 148 union vga_retrace retrace_info;
2a3138ab 149 uint8_t is_vbe_vmstate;
4e12cd94 150} VGACommonState;
4e3e9d0b 151
a8aa669b
FB
152static inline int c6_to_8(int v)
153{
154 int b;
155 v &= 0x3f;
156 b = v & 1;
157 return (v << 2) | (b << 1) | b;
158}
159
6832deb8 160bool vga_common_init(VGACommonState *s, Object *obj, Error **errp);
712f0cc7 161void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
0a039dc7 162 MemoryRegion *address_space_io, bool init_vga_ports);
c84b28ee 163MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
0a039dc7
RH
164 const MemoryRegionPortio **vga_ports,
165 const MemoryRegionPortio **vbe_ports);
03a3e7ba 166void vga_common_reset(VGACommonState *s);
2bec46dc 167
a4a2f59c 168void vga_dirty_log_start(VGACommonState *s);
b5cc6e32 169void vga_dirty_log_stop(VGACommonState *s);
2bec46dc 170
11b6b345 171extern const VMStateDescription vmstate_vga_common;
43bf782b
JQ
172uint32_t vga_ioport_read(void *opaque, uint32_t addr);
173void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
a8170e5e
AK
174uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr);
175void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val);
a4a2f59c 176void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
a8aa669b 177
25a18cbd 178int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
803ff052 179
803ff052
GH
180uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
181void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
182void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
25a18cbd 183
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184extern const uint8_t sr_mask[8];
185extern const uint8_t gr_mask[16];
fbe1b595 186
5245d57a
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187#define VGABIOS_FILENAME "vgabios.bin"
188#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
fbe1b595 189
b1950430 190extern const MemoryRegionOps vga_mem_ops;
cb9c377f 191
c5d4dac8
GH
192/* vga-pci.c */
193void pci_std_vga_mmio_region_init(VGACommonState *s,
93abfc88 194 Object *owner,
c5d4dac8
GH
195 MemoryRegion *parent,
196 MemoryRegion *subs,
d46b40fc 197 bool qext, bool edid);
c5d4dac8 198
cfead313 199void build_vga_aml(AcpiDevAmlIf *adev, Aml *scope);
cb9c377f 200#endif