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1/*
2 * Virtio video device
3 *
4 * Copyright Red Hat
5 *
6 * Authors:
7 * Dave Airlie
8 *
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9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
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11 *
12 */
e688df6b 13
9b8bfe21 14#include "qemu/osdep.h"
e688df6b 15#include "qapi/error.h"
0b8fa32f 16#include "qemu/module.h"
9eafb62d 17#include "hw/pci/pci.h"
a27bd6c7 18#include "hw/qdev-properties.h"
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19#include "hw/virtio/virtio.h"
20#include "hw/virtio/virtio-bus.h"
267f6646 21#include "hw/virtio/virtio-gpu-pci.h"
db1015e9 22#include "qom/object.h"
7ecb381f 23
c68082c4 24static Property virtio_gpu_pci_base_properties[] = {
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25 DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
26 DEFINE_PROP_END_OF_LIST(),
27};
28
c68082c4 29static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
9eafb62d 30{
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31 VirtIOGPUPCIBase *vgpu = VIRTIO_GPU_PCI_BASE(vpci_dev);
32 VirtIOGPUBase *g = vgpu->vgpu;
33 DeviceState *vdev = DEVICE(g);
e1888295 34 int i;
9eafb62d 35
dd56040d 36 virtio_pci_force_virtio_1(vpci_dev);
668f62ec 37 if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
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38 return;
39 }
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40
41 for (i = 0; i < g->conf.max_outputs; i++) {
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42 object_property_set_link(OBJECT(g->scanout[i].con), "device",
43 OBJECT(vpci_dev), &error_abort);
e1888295 44 }
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45}
46
c68082c4 47static void virtio_gpu_pci_base_class_init(ObjectClass *klass, void *data)
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48{
49 DeviceClass *dc = DEVICE_CLASS(klass);
50 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
51 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
52
53 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
4f67d30b 54 device_class_set_props(dc, virtio_gpu_pci_base_properties);
597966d1 55 dc->hotpluggable = false;
c68082c4 56 k->realize = virtio_gpu_pci_base_realize;
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57 pcidev_k->class_id = PCI_CLASS_DISPLAY_OTHER;
58}
59
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60static const TypeInfo virtio_gpu_pci_base_info = {
61 .name = TYPE_VIRTIO_GPU_PCI_BASE,
62 .parent = TYPE_VIRTIO_PCI,
63 .instance_size = sizeof(VirtIOGPUPCIBase),
64 .class_init = virtio_gpu_pci_base_class_init,
65 .abstract = true
66};
67
68#define TYPE_VIRTIO_GPU_PCI "virtio-gpu-pci"
db1015e9 69typedef struct VirtIOGPUPCI VirtIOGPUPCI;
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70DECLARE_INSTANCE_CHECKER(VirtIOGPUPCI, VIRTIO_GPU_PCI,
71 TYPE_VIRTIO_GPU_PCI)
c68082c4 72
db1015e9 73struct VirtIOGPUPCI {
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74 VirtIOGPUPCIBase parent_obj;
75 VirtIOGPU vdev;
db1015e9 76};
c68082c4 77
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78static void virtio_gpu_initfn(Object *obj)
79{
80 VirtIOGPUPCI *dev = VIRTIO_GPU_PCI(obj);
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81
82 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
83 TYPE_VIRTIO_GPU);
c68082c4 84 VIRTIO_GPU_PCI_BASE(obj)->vgpu = VIRTIO_GPU_BASE(&dev->vdev);
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85}
86
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87static const VirtioPCIDeviceTypeInfo virtio_gpu_pci_info = {
88 .generic_name = TYPE_VIRTIO_GPU_PCI,
c68082c4 89 .parent = TYPE_VIRTIO_GPU_PCI_BASE,
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90 .instance_size = sizeof(VirtIOGPUPCI),
91 .instance_init = virtio_gpu_initfn,
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92};
93
94static void virtio_gpu_pci_register_types(void)
95{
c68082c4 96 type_register_static(&virtio_gpu_pci_base_info);
a4ee4c8b 97 virtio_pci_types_register(&virtio_gpu_pci_info);
9eafb62d 98}
c68082c4 99
9eafb62d 100type_init(virtio_gpu_pci_register_types)