[mirror_qemu.git] / hw / display / virtio-vga.c

#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "vga_int.h"
#include "hw/virtio/virtio-pci.h"
#include "hw/virtio/virtio-gpu.h"
#include "qapi/error.h"

/*
 * virtio-vga: This extends VirtioPCIProxy.
 */
#define TYPE_VIRTIO_VGA "virtio-vga"
#define VIRTIO_VGA(obj) \
        OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
#define VIRTIO_VGA_GET_CLASS(obj) \
        OBJECT_GET_CLASS(VirtIOVGAClass, obj, TYPE_VIRTIO_VGA)
#define VIRTIO_VGA_CLASS(klass) \
        OBJECT_CLASS_CHECK(VirtIOVGAClass, klass, TYPE_VIRTIO_VGA)

typedef struct VirtIOVGA {
    VirtIOPCIProxy parent_obj;
    VirtIOGPU      vdev;
    VGACommonState vga;
    MemoryRegion   vga_mrs[3];
} VirtIOVGA;

typedef struct VirtIOVGAClass {
    VirtioPCIClass parent_class;
    DeviceReset parent_reset;
} VirtIOVGAClass;

static void virtio_vga_invalidate_display(void *opaque)
{
    VirtIOVGA *vvga = opaque;

    if (vvga->vdev.enable) {
        virtio_gpu_ops.invalidate(&vvga->vdev);
    } else {
        vvga->vga.hw_ops->invalidate(&vvga->vga);
    }
}

static void virtio_vga_update_display(void *opaque)
{
    VirtIOVGA *vvga = opaque;

    if (vvga->vdev.enable) {
        virtio_gpu_ops.gfx_update(&vvga->vdev);
    } else {
        vvga->vga.hw_ops->gfx_update(&vvga->vga);
    }
}

static void virtio_vga_text_update(void *opaque, console_ch_t *chardata)
{
    VirtIOVGA *vvga = opaque;

    if (vvga->vdev.enable) {
        if (virtio_gpu_ops.text_update) {
            virtio_gpu_ops.text_update(&vvga->vdev, chardata);
        }
    } else {
        if (vvga->vga.hw_ops->text_update) {
            vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
        }
    }
}

static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
{
    VirtIOVGA *vvga = opaque;

    if (virtio_gpu_ops.ui_info) {
        return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info);
    }
    return -1;
}

static void virtio_vga_gl_block(void *opaque, bool block)
{
    VirtIOVGA *vvga = opaque;

    if (virtio_gpu_ops.gl_block) {
        virtio_gpu_ops.gl_block(&vvga->vdev, block);
    }
}

static const GraphicHwOps virtio_vga_ops = {
    .invalidate = virtio_vga_invalidate_display,
    .gfx_update = virtio_vga_update_display,
    .text_update = virtio_vga_text_update,
    .ui_info = virtio_vga_ui_info,
    .gl_block = virtio_vga_gl_block,
};

static const VMStateDescription vmstate_virtio_vga = {
    .name = "virtio-vga",
    .version_id = 2,
    .minimum_version_id = 2,
    .fields = (VMStateField[]) {
        /* no pci stuff here, saving the virtio device will handle that */
        VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState),
        VMSTATE_END_OF_LIST()
    }
};

/* VGA device wrapper around PCI device around virtio GPU */
static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
    VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
    VirtIOGPU *g = &vvga->vdev;
    VGACommonState *vga = &vvga->vga;
    Error *err = NULL;
    uint32_t offset;
    int i;

    /* init vga compat bits */
    vga->vram_size_mb = 8;
    vga_common_init(vga, OBJECT(vpci_dev));
    vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
             pci_address_space_io(&vpci_dev->pci_dev), true);
    pci_register_bar(&vpci_dev->pci_dev, 0,
                     PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);

    /*
     * Configure virtio bar and regions
     *
     * We use bar #2 for the mmio regions, to be compatible with stdvga.
     * virtio regions are moved to the end of bar #2, to make room for
     * the stdvga mmio registers at the start of bar #2.
     */
    vpci_dev->modern_mem_bar_idx = 2;
    vpci_dev->msix_bar_idx = 4;

    if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
        /*
         * with page-per-vq=off there is no padding space we can use
         * for the stdvga registers.  Make the common and isr regions
         * smaller then.
         */
        vpci_dev->common.size /= 2;
        vpci_dev->isr.size /= 2;
    }

    offset = memory_region_size(&vpci_dev->modern_bar);
    offset -= vpci_dev->notify.size;
    vpci_dev->notify.offset = offset;
    offset -= vpci_dev->device.size;
    vpci_dev->device.offset = offset;
    offset -= vpci_dev->isr.size;
    vpci_dev->isr.offset = offset;
    offset -= vpci_dev->common.size;
    vpci_dev->common.offset = offset;

    /* init virtio bits */
    qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
    virtio_pci_force_virtio_1(vpci_dev);
    object_property_set_bool(OBJECT(g), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    /* add stdvga mmio regions */
    pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
                                 vvga->vga_mrs, true, false);

    vga->con = g->scanout[0].con;
    graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);

    for (i = 0; i < g->conf.max_outputs; i++) {
        object_property_set_link(OBJECT(g->scanout[i].con),
                                 OBJECT(vpci_dev),
                                 "device", errp);
    }
}

static void virtio_vga_reset(DeviceState *dev)
{
    VirtIOVGAClass *klass = VIRTIO_VGA_GET_CLASS(dev);
    VirtIOVGA *vvga = VIRTIO_VGA(dev);

    /* reset virtio-gpu */
    klass->parent_reset(dev);

    /* reset vga */
    vga_common_reset(&vvga->vga);
    vga_dirty_log_start(&vvga->vga);
}

static Property virtio_vga_properties[] = {
    DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
    DEFINE_PROP_END_OF_LIST(),
};

static void virtio_vga_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
    VirtIOVGAClass *v = VIRTIO_VGA_CLASS(klass);
    PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);

    set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
    dc->props = virtio_vga_properties;
    dc->vmsd = &vmstate_virtio_vga;
    dc->hotpluggable = false;
    device_class_set_parent_reset(dc, virtio_vga_reset,
                                  &v->parent_reset);

    k->realize = virtio_vga_realize;
    pcidev_k->romfile = "vgabios-virtio.bin";
    pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
}

static void virtio_vga_inst_initfn(Object *obj)
{
    VirtIOVGA *dev = VIRTIO_VGA(obj);

    virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
                                TYPE_VIRTIO_GPU);
}

static VirtioPCIDeviceTypeInfo virtio_vga_info = {
    .generic_name  = TYPE_VIRTIO_VGA,
    .instance_size = sizeof(struct VirtIOVGA),
    .instance_init = virtio_vga_inst_initfn,
    .class_size    = sizeof(struct VirtIOVGAClass),
    .class_init    = virtio_vga_class_init,
};

static void virtio_vga_register_types(void)
{
    virtio_pci_types_register(&virtio_vga_info);
}

type_init(virtio_vga_register_types)
Commit	Line	Data
9b8bfe21	1	#include "qemu/osdep.h"
c5d4dac8 GH	2	#include "hw/hw.h"
c5d4dac8 GH	3	#include "hw/pci/pci.h"
c5d4dac8 GH	4	#include "vga_int.h"
c5d4dac8 GH	5	#include "hw/virtio/virtio-pci.h"
7ecb381f	6	#include "hw/virtio/virtio-gpu.h"
d0f0c865	7	#include "qapi/error.h"
c5d4dac8 GH	8
	9	/*
	10	* virtio-vga: This extends VirtioPCIProxy.
	11	*/
	12	#define TYPE_VIRTIO_VGA "virtio-vga"
	13	#define VIRTIO_VGA(obj) \
	14	OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
3912e66a GH	15	#define VIRTIO_VGA_GET_CLASS(obj) \
	16	OBJECT_GET_CLASS(VirtIOVGAClass, obj, TYPE_VIRTIO_VGA)
	17	#define VIRTIO_VGA_CLASS(klass) \
	18	OBJECT_CLASS_CHECK(VirtIOVGAClass, klass, TYPE_VIRTIO_VGA)
c5d4dac8 GH	19
	20	typedef struct VirtIOVGA {
	21	VirtIOPCIProxy parent_obj;
	22	VirtIOGPU vdev;
	23	VGACommonState vga;
	24	MemoryRegion vga_mrs[3];
	25	} VirtIOVGA;
	26
3912e66a GH	27	typedef struct VirtIOVGAClass {
	28	VirtioPCIClass parent_class;
	29	DeviceReset parent_reset;
	30	} VirtIOVGAClass;
	31
c5d4dac8 GH	32	static void virtio_vga_invalidate_display(void *opaque)
	33	{
	34	VirtIOVGA *vvga = opaque;
	35
	36	if (vvga->vdev.enable) {
	37	virtio_gpu_ops.invalidate(&vvga->vdev);
	38	} else {
	39	vvga->vga.hw_ops->invalidate(&vvga->vga);
	40	}
	41	}
	42
	43	static void virtio_vga_update_display(void *opaque)
	44	{
	45	VirtIOVGA *vvga = opaque;
	46
	47	if (vvga->vdev.enable) {
	48	virtio_gpu_ops.gfx_update(&vvga->vdev);
	49	} else {
	50	vvga->vga.hw_ops->gfx_update(&vvga->vga);
	51	}
	52	}
	53
	54	static void virtio_vga_text_update(void opaque, console_ch_t chardata)
	55	{
	56	VirtIOVGA *vvga = opaque;
	57
	58	if (vvga->vdev.enable) {
	59	if (virtio_gpu_ops.text_update) {
	60	virtio_gpu_ops.text_update(&vvga->vdev, chardata);
	61	}
	62	} else {
	63	if (vvga->vga.hw_ops->text_update) {
	64	vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
	65	}
	66	}
	67	}
	68
	69	static int virtio_vga_ui_info(void opaque, uint32_t idx, QemuUIInfo info)
	70	{
	71	VirtIOVGA *vvga = opaque;
	72
	73	if (virtio_gpu_ops.ui_info) {
	74	return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info);
	75	}
	76	return -1;
	77	}
	78
321c9adb GH	79	static void virtio_vga_gl_block(void *opaque, bool block)
	80	{
	81	VirtIOVGA *vvga = opaque;
	82
	83	if (virtio_gpu_ops.gl_block) {
	84	virtio_gpu_ops.gl_block(&vvga->vdev, block);
	85	}
	86	}
	87
c5d4dac8 GH	88	static const GraphicHwOps virtio_vga_ops = {
	89	.invalidate = virtio_vga_invalidate_display,
	90	.gfx_update = virtio_vga_update_display,
	91	.text_update = virtio_vga_text_update,
	92	.ui_info = virtio_vga_ui_info,
321c9adb	93	.gl_block = virtio_vga_gl_block,
c5d4dac8 GH	94	};
c5d4dac8 GH	95
0c244e50 GH	96	static const VMStateDescription vmstate_virtio_vga = {
	97	.name = "virtio-vga",
	98	.version_id = 2,
	99	.minimum_version_id = 2,
	100	.fields = (VMStateField[]) {
	101	/* no pci stuff here, saving the virtio device will handle that */
	102	VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState),
	103	VMSTATE_END_OF_LIST()
	104	}
	105	};
	106
c5d4dac8 GH	107	/* VGA device wrapper around PCI device around virtio GPU */
	108	static void virtio_vga_realize(VirtIOPCIProxy vpci_dev, Error *errp)
	109	{
	110	VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
	111	VirtIOGPU *g = &vvga->vdev;
	112	VGACommonState *vga = &vvga->vga;
d0f0c865	113	Error *err = NULL;
c5d4dac8	114	uint32_t offset;
e1888295	115	int i;
c5d4dac8 GH	116
	117	/* init vga compat bits */
	118	vga->vram_size_mb = 8;
1fcfdc43	119	vga_common_init(vga, OBJECT(vpci_dev));
c5d4dac8 GH	120	vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
	121	pci_address_space_io(&vpci_dev->pci_dev), true);
	122	pci_register_bar(&vpci_dev->pci_dev, 0,
	123	PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
	124
	125	/*
	126	* Configure virtio bar and regions
	127	*
	128	* We use bar #2 for the mmio regions, to be compatible with stdvga.
	129	* virtio regions are moved to the end of bar #2, to make room for
	130	* the stdvga mmio registers at the start of bar #2.
	131	*/
7a25126d CF	132	vpci_dev->modern_mem_bar_idx = 2;
7a25126d CF	133	vpci_dev->msix_bar_idx = 4;
c2843e93 GH	134
	135	if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
	136	/*
	137	* with page-per-vq=off there is no padding space we can use
	138	* for the stdvga registers. Make the common and isr regions
	139	* smaller then.
	140	*/
	141	vpci_dev->common.size /= 2;
	142	vpci_dev->isr.size /= 2;
	143	}
	144
c5d4dac8 GH	145	offset = memory_region_size(&vpci_dev->modern_bar);
	146	offset -= vpci_dev->notify.size;
	147	vpci_dev->notify.offset = offset;
	148	offset -= vpci_dev->device.size;
	149	vpci_dev->device.offset = offset;
	150	offset -= vpci_dev->isr.size;
	151	vpci_dev->isr.offset = offset;
	152	offset -= vpci_dev->common.size;
	153	vpci_dev->common.offset = offset;
	154
	155	/* init virtio bits */
	156	qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
9a4c0e22	157	virtio_pci_force_virtio_1(vpci_dev);
d0f0c865 MAL	158	object_property_set_bool(OBJECT(g), true, "realized", &err);
	159	if (err) {
	160	error_propagate(errp, err);
	161	return;
	162	}
c5d4dac8 GH	163
c5d4dac8 GH	164	/* add stdvga mmio regions */
93abfc88	165	pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
d46b40fc	166	vvga->vga_mrs, true, false);
c5d4dac8 GH	167
	168	vga->con = g->scanout[0].con;
	169	graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);
e1888295 GH	170
	171	for (i = 0; i < g->conf.max_outputs; i++) {
	172	object_property_set_link(OBJECT(g->scanout[i].con),
	173	OBJECT(vpci_dev),
	174	"device", errp);
	175	}
c5d4dac8 GH	176	}
	177
	178	static void virtio_vga_reset(DeviceState *dev)
	179	{
3912e66a	180	VirtIOVGAClass *klass = VIRTIO_VGA_GET_CLASS(dev);
c5d4dac8	181	VirtIOVGA *vvga = VIRTIO_VGA(dev);
c5d4dac8	182
43e4dbe2	183	/* reset virtio-gpu */
3912e66a	184	klass->parent_reset(dev);
43e4dbe2 GH	185
	186	/* reset vga */
	187	vga_common_reset(&vvga->vga);
c5d4dac8 GH	188	vga_dirty_log_start(&vvga->vga);
	189	}
	190
	191	static Property virtio_vga_properties[] = {
c5d4dac8 GH	192	DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
	193	DEFINE_PROP_END_OF_LIST(),
	194	};
	195
	196	static void virtio_vga_class_init(ObjectClass klass, void data)
	197	{
	198	DeviceClass *dc = DEVICE_CLASS(klass);
	199	VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
3912e66a	200	VirtIOVGAClass *v = VIRTIO_VGA_CLASS(klass);
c5d4dac8 GH	201	PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
	202
	203	set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
	204	dc->props = virtio_vga_properties;
0c244e50	205	dc->vmsd = &vmstate_virtio_vga;
c5d4dac8	206	dc->hotpluggable = false;
3912e66a GH	207	device_class_set_parent_reset(dc, virtio_vga_reset,
3912e66a GH	208	&v->parent_reset);
c5d4dac8 GH	209
	210	k->realize = virtio_vga_realize;
	211	pcidev_k->romfile = "vgabios-virtio.bin";
	212	pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
	213	}
	214
	215	static void virtio_vga_inst_initfn(Object *obj)
	216	{
	217	VirtIOVGA *dev = VIRTIO_VGA(obj);
b3409a31 GH	218
	219	virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
	220	TYPE_VIRTIO_GPU);
c5d4dac8 GH	221	}
c5d4dac8 GH	222
a4ee4c8b EH	223	static VirtioPCIDeviceTypeInfo virtio_vga_info = {
a4ee4c8b EH	224	.generic_name = TYPE_VIRTIO_VGA,
c5d4dac8 GH	225	.instance_size = sizeof(struct VirtIOVGA),
c5d4dac8 GH	226	.instance_init = virtio_vga_inst_initfn,
3912e66a	227	.class_size = sizeof(struct VirtIOVGAClass),
c5d4dac8 GH	228	.class_init = virtio_vga_class_init,
	229	};
	230
	231	static void virtio_vga_register_types(void)
	232	{
a4ee4c8b	233	virtio_pci_types_register(&virtio_vga_info);
c5d4dac8 GH	234	}
	235
	236	type_init(virtio_vga_register_types)