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1/*
2 * QEMU Intel 82374 emulation (Enhanced DMA controller)
3 *
4 * Copyright (c) 2010 Hervé Poussineau
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
0430891c 25#include "qemu/osdep.h"
4968a2c6 26#include "qapi/error.h"
0b8fa32f 27#include "qemu/module.h"
0d09e41a 28#include "hw/isa/isa.h"
55f613ac 29#include "hw/dma/i8257.h"
23b96cdb 30
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31#define TYPE_I82374 "i82374"
32#define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374)
33
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34//#define DEBUG_I82374
35
36#ifdef DEBUG_I82374
37#define DPRINTF(fmt, ...) \
38do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
39#else
40#define DPRINTF(fmt, ...) \
41do {} while (0)
42#endif
43#define BADF(fmt, ...) \
44do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
45
46typedef struct I82374State {
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47 ISADevice parent_obj;
48
49 uint32_t iobase;
23b96cdb 50 uint8_t commands[8];
848696bf 51 PortioList port_list;
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52} I82374State;
53
54static const VMStateDescription vmstate_i82374 = {
55 .name = "i82374",
56 .version_id = 0,
57 .minimum_version_id = 0,
58 .fields = (VMStateField[]) {
59 VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
60 VMSTATE_END_OF_LIST()
61 },
62};
63
64static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
65{
66 uint32_t val = 0;
67
68 BADF("%s: %08x\n", __func__, nport);
69
70 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
71 return val;
72}
73
74static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
75{
76 DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
77
78 if (data != 0x42) {
79 /* Not Stop S/G command */
80 BADF("%s: %08x=%08x\n", __func__, nport, data);
81 }
82}
83
84static uint32_t i82374_read_status(void *opaque, uint32_t nport)
85{
86 uint32_t val = 0;
87
88 BADF("%s: %08x\n", __func__, nport);
89
90 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
91 return val;
92}
93
94static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
95{
96 DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
97
98 BADF("%s: %08x=%08x\n", __func__, nport, data);
99}
100
101static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
102{
103 uint32_t val = 0;
104
105 BADF("%s: %08x\n", __func__, nport);
106
107 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
108 return val;
109}
110
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111static const MemoryRegionPortio i82374_portio_list[] = {
112 { 0x0A, 1, 1, .read = i82374_read_isr, },
113 { 0x10, 8, 1, .write = i82374_write_command, },
114 { 0x18, 8, 1, .read = i82374_read_status, },
115 { 0x20, 0x20, 1,
116 .write = i82374_write_descriptor, .read = i82374_read_descriptor, },
117 PORTIO_END_OF_LIST(),
118};
119
449ae7ec 120static void i82374_realize(DeviceState *dev, Error **errp)
23b96cdb 121{
449ae7ec 122 I82374State *s = I82374(dev);
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123 ISABus *isa_bus = isa_bus_from_device(ISA_DEVICE(dev));
124
125 if (isa_get_dma(isa_bus, 0)) {
126 error_setg(errp, "DMA already initialized on ISA bus");
127 return;
128 }
129 i8257_dma_init(isa_bus, true);
23b96cdb 130
449ae7ec 131 portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s,
848696bf 132 "i82374");
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133 portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj),
134 s->iobase);
23b96cdb 135
449ae7ec 136 memset(s->commands, 0, sizeof(s->commands));
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137}
138
39bffca2 139static Property i82374_properties[] = {
449ae7ec 140 DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400),
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141 DEFINE_PROP_END_OF_LIST()
142};
143
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144static void i82374_class_init(ObjectClass *klass, void *data)
145{
39bffca2 146 DeviceClass *dc = DEVICE_CLASS(klass);
8f04ee08 147
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148 dc->realize = i82374_realize;
149 dc->vmsd = &vmstate_i82374;
39bffca2 150 dc->props = i82374_properties;
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151}
152
449ae7ec 153static const TypeInfo i82374_info = {
eb1440e7 154 .name = TYPE_I82374,
39bffca2 155 .parent = TYPE_ISA_DEVICE,
449ae7ec 156 .instance_size = sizeof(I82374State),
8f04ee08 157 .class_init = i82374_class_init,
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158};
159
83f7d43a 160static void i82374_register_types(void)
23b96cdb 161{
449ae7ec 162 type_register_static(&i82374_info);
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163}
164
83f7d43a 165type_init(i82374_register_types)