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a72bd606 1/* HPPA cores and system support chips. */
4de43540 2/* Be aware: QEMU and seabios-hppa repositories share this file as-is. */
a72bd606 3
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4#ifndef HW_HPPA_HPPA_HARDWARE_H
5#define HW_HPPA_HPPA_HARDWARE_H
6
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7#define FIRMWARE_START 0xf0000000
8#define FIRMWARE_END 0xf0800000
9
10#define DEVICE_HPA_LEN 0x00100000
11
12#define GSC_HPA 0xffc00000
13#define DINO_HPA 0xfff80000
14#define DINO_UART_HPA 0xfff83000
15#define DINO_UART_BASE 0xfff83800
16#define DINO_SCSI_HPA 0xfff8c000
17#define LASI_HPA 0xffd00000
18#define LASI_UART_HPA 0xffd05000
19#define LASI_SCSI_HPA 0xffd06000
20#define LASI_LAN_HPA 0xffd07000
21#define LASI_LPT_HPA 0xffd02000
22#define LASI_AUDIO_HPA 0xffd04000
23#define LASI_PS2KBD_HPA 0xffd08000
24#define LASI_PS2MOU_HPA 0xffd08100
25#define LASI_GFX_HPA 0xf8000000
4765384c 26#define ARTIST_FB_ADDR 0xf9000000
2b42f31e 27#define CPU_HPA 0xfffb0000
87e126ea 28#define MEMORY_HPA 0xfffff000
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29
30#define PCI_HPA DINO_HPA /* PCI bus */
31#define IDE_HPA 0xf9000000 /* Boot disc controller */
32
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33/* offsets to DINO HPA: */
34#define DINO_PCI_ADDR 0x064
35#define DINO_CONFIG_DATA 0x068
36#define DINO_IO_DATA 0x06c
37
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38#define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR)
39#define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA)
40
24576007 41#define FW_CFG_IO_BASE 0xfffa0000
e3a99a8a 42
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43#define PORT_SERIAL1 (LASI_UART_HPA + 0x800)
44#define PORT_SERIAL2 (DINO_UART_HPA + 0x800)
a72bd606 45
87e126ea 46#define HPPA_MAX_CPUS 16 /* max. number of SMP CPUs */
a72bd606 47#define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */
f91005e1 48
e3a99a8a 49#define CPU_HPA_CR_REG 7 /* store CPU HPA in cr7 (SeaBIOS internal) */
87e126ea 50#define PIM_STORAGE_SIZE 600 /* storage size of pdc_pim_toc_struct (64bit) */
e3a99a8a 51
f91005e1 52#endif