[mirror_qemu.git] / hw / hppa / machine.c

/*
 * QEMU HPPA hardware system emulator.
 * Copyright 2018 Helge Deller <deller@gmx.de>
 */

#include "qemu/osdep.h"
#include "qemu-common.h"
#include "qemu/datadir.h"
#include "cpu.h"
#include "elf.h"
#include "hw/loader.h"
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "sysemu/reset.h"
#include "sysemu/sysemu.h"
#include "sysemu/runstate.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/timer/i8254.h"
#include "hw/char/serial.h"
#include "hw/net/lasi_82596.h"
#include "hppa_sys.h"
#include "qemu/units.h"
#include "qapi/error.h"
#include "net/net.h"
#include "qemu/log.h"
#include "net/net.h"

#define MAX_IDE_BUS 2

#define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */

#define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)

static void hppa_powerdown_req(Notifier *n, void *opaque)
{
    hwaddr soft_power_reg = HPA_POWER_BUTTON;
    uint32_t val;

    val = ldl_be_phys(&address_space_memory, soft_power_reg);
    if ((val >> 8) == 0) {
        /* immediately shut down when under hardware control */
        qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
        return;
    }

    /* clear bit 31 to indicate that the power switch was pressed. */
    val &= ~1;
    stl_be_phys(&address_space_memory, soft_power_reg, val);
}

static Notifier hppa_system_powerdown_notifier = {
    .notify = hppa_powerdown_req
};


static ISABus *hppa_isa_bus(void)
{
    ISABus *isa_bus;
    qemu_irq *isa_irqs;
    MemoryRegion *isa_region;

    isa_region = g_new(MemoryRegion, 1);
    memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
                          NULL, "isa-io", 0x800);
    memory_region_add_subregion(get_system_memory(), IDE_HPA,
                                isa_region);

    isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
                          &error_abort);
    isa_irqs = i8259_init(isa_bus,
                          /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
                          NULL);
    isa_bus_irqs(isa_bus, isa_irqs);

    return isa_bus;
}

static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
{
    addr &= (0x10000000 - 1);
    return addr;
}

static HPPACPU *cpu[HPPA_MAX_CPUS];
static uint64_t firmware_entry;

static void fw_cfg_boot_set(void *opaque, const char *boot_device,
                            Error **errp)
{
    fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
}

static FWCfgState *create_fw_cfg(MachineState *ms)
{
    FWCfgState *fw_cfg;
    uint64_t val;

    fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);

    val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
    fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
                    g_memdup(&val, sizeof(val)), sizeof(val));

    val = cpu_to_le64(HPPA_TLB_ENTRIES);
    fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
                    g_memdup(&val, sizeof(val)), sizeof(val));

    val = cpu_to_le64(HPPA_BTLB_ENTRIES);
    fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
                    g_memdup(&val, sizeof(val)), sizeof(val));

    val = cpu_to_le64(HPA_POWER_BUTTON);
    fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
                    g_memdup(&val, sizeof(val)), sizeof(val));

    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]);
    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);

    return fw_cfg;
}

static void machine_hppa_init(MachineState *machine)
{
    const char *kernel_filename = machine->kernel_filename;
    const char *kernel_cmdline = machine->kernel_cmdline;
    const char *initrd_filename = machine->initrd_filename;
    DeviceState *dev;
    PCIBus *pci_bus;
    ISABus *isa_bus;
    qemu_irq rtc_irq, serial_irq;
    char *firmware_filename;
    uint64_t firmware_low, firmware_high;
    long size;
    uint64_t kernel_entry = 0, kernel_low, kernel_high;
    MemoryRegion *addr_space = get_system_memory();
    MemoryRegion *rom_region;
    MemoryRegion *cpu_region;
    long i;
    unsigned int smp_cpus = machine->smp.cpus;
    SysBusDevice *s;

    /* Create CPUs.  */
    for (i = 0; i < smp_cpus; i++) {
        char *name = g_strdup_printf("cpu%ld-io-eir", i);
        cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));

        cpu_region = g_new(MemoryRegion, 1);
        memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
                              cpu[i], name, 4);
        memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
                                    cpu_region);
        g_free(name);
    }

    /* Main memory region. */
    if (machine->ram_size > 3 * GiB) {
        error_report("RAM size is currently restricted to 3GB");
        exit(EXIT_FAILURE);
    }
    memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);


    /* Init Lasi chip */
    lasi_init(addr_space);

    /* Init Dino (PCI host bus chip).  */
    pci_bus = dino_init(addr_space, &rtc_irq, &serial_irq);
    assert(pci_bus);

    /* Create ISA bus. */
    isa_bus = hppa_isa_bus();
    assert(isa_bus);

    /* Realtime clock, used by firmware for PDC_TOD call. */
    mc146818_rtc_init(isa_bus, 2000, rtc_irq);

    /* Serial code setup.  */
    if (serial_hd(0)) {
        uint32_t addr = DINO_UART_HPA + 0x800;
        serial_mm_init(addr_space, addr, 0, serial_irq,
                       115200, serial_hd(0), DEVICE_BIG_ENDIAN);
    }

    /* fw_cfg configuration interface */
    create_fw_cfg(machine);

    /* SCSI disk setup. */
    dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
    lsi53c8xx_handle_legacy_cmdline(dev);

    /* Graphics setup. */
    if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
        dev = qdev_new("artist");
        s = SYS_BUS_DEVICE(dev);
        sysbus_realize_and_unref(s, &error_fatal);
        sysbus_mmio_map(s, 0, LASI_GFX_HPA);
        sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
    }

    /* Network setup. */
    for (i = 0; i < nb_nics; i++) {
        if (!enable_lasi_lan()) {
            pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL);
        }
    }

    /* register power switch emulation */
    qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);

    /* Load firmware.  Given that this is not "real" firmware,
       but one explicitly written for the emulation, we might as
       well load it directly from an ELF image.  */
    firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
                                       machine->firmware ?: "hppa-firmware.img");
    if (firmware_filename == NULL) {
        error_report("no firmware provided");
        exit(1);
    }

    size = load_elf(firmware_filename, NULL, NULL, NULL,
                    &firmware_entry, &firmware_low, &firmware_high, NULL,
                    true, EM_PARISC, 0, 0);

    /* Unfortunately, load_elf sign-extends reading elf32.  */
    firmware_entry = (target_ureg)firmware_entry;
    firmware_low = (target_ureg)firmware_low;
    firmware_high = (target_ureg)firmware_high;

    if (size < 0) {
        error_report("could not load firmware '%s'", firmware_filename);
        exit(1);
    }
    qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
                  "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
                  firmware_low, firmware_high, firmware_entry);
    if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) {
        error_report("Firmware overlaps with memory or IO space");
        exit(1);
    }
    g_free(firmware_filename);

    rom_region = g_new(MemoryRegion, 1);
    memory_region_init_ram(rom_region, NULL, "firmware",
                           (FIRMWARE_END - FIRMWARE_START), &error_fatal);
    memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);

    /* Load kernel */
    if (kernel_filename) {
        size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
                        NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
                        true, EM_PARISC, 0, 0);

        /* Unfortunately, load_elf sign-extends reading elf32.  */
        kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
        kernel_low = (target_ureg)kernel_low;
        kernel_high = (target_ureg)kernel_high;

        if (size < 0) {
            error_report("could not load kernel '%s'", kernel_filename);
            exit(1);
        }
        qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
                      "-0x%08" PRIx64 ", entry at 0x%08" PRIx64
                      ", size %" PRIu64 " kB\n",
                      kernel_low, kernel_high, kernel_entry, size / KiB);

        if (kernel_cmdline) {
            cpu[0]->env.gr[24] = 0x4000;
            pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
                             TARGET_PAGE_SIZE, kernel_cmdline);
        }

        if (initrd_filename) {
            ram_addr_t initrd_base;
            int64_t initrd_size;

            initrd_size = get_image_size(initrd_filename);
            if (initrd_size < 0) {
                error_report("could not load initial ram disk '%s'",
                             initrd_filename);
                exit(1);
            }

            /* Load the initrd image high in memory.
               Mirror the algorithm used by palo:
               (1) Due to sign-extension problems and PDC,
               put the initrd no higher than 1G.
               (2) Reserve 64k for stack.  */
            initrd_base = MIN(machine->ram_size, 1 * GiB);
            initrd_base = initrd_base - 64 * KiB;
            initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;

            if (initrd_base < kernel_high) {
                error_report("kernel and initial ram disk too large!");
                exit(1);
            }

            load_image_targphys(initrd_filename, initrd_base, initrd_size);
            cpu[0]->env.gr[23] = initrd_base;
            cpu[0]->env.gr[22] = initrd_base + initrd_size;
        }
    }

    if (!kernel_entry) {
        /* When booting via firmware, tell firmware if we want interactive
         * mode (kernel_entry=1), and to boot from CD (gr[24]='d')
         * or hard disc * (gr[24]='c').
         */
        kernel_entry = boot_menu ? 1 : 0;
        cpu[0]->env.gr[24] = machine->boot_order[0];
    }

    /* We jump to the firmware entry routine and pass the
     * various parameters in registers. After firmware initialization,
     * firmware will start the Linux kernel with ramdisk and cmdline.
     */
    cpu[0]->env.gr[26] = machine->ram_size;
    cpu[0]->env.gr[25] = kernel_entry;

    /* tell firmware how many SMP CPUs to present in inventory table */
    cpu[0]->env.gr[21] = smp_cpus;

    /* tell firmware fw_cfg port */
    cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
}

static void hppa_machine_reset(MachineState *ms)
{
    unsigned int smp_cpus = ms->smp.cpus;
    int i;

    qemu_devices_reset();

    /* Start all CPUs at the firmware entry point.
     *  Monarch CPU will initialize firmware, secondary CPUs
     *  will enter a small idle look and wait for rendevouz. */
    for (i = 0; i < smp_cpus; i++) {
        cpu_set_pc(CPU(cpu[i]), firmware_entry);
        cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
    }

    /* already initialized by machine_hppa_init()? */
    if (cpu[0]->env.gr[26] == ms->ram_size) {
        return;
    }

    cpu[0]->env.gr[26] = ms->ram_size;
    cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
    cpu[0]->env.gr[24] = 'c';
    /* gr22/gr23 unused, no initrd while reboot. */
    cpu[0]->env.gr[21] = smp_cpus;
    /* tell firmware fw_cfg port */
    cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
}


static void machine_hppa_machine_init(MachineClass *mc)
{
    mc->desc = "HPPA generic machine";
    mc->default_cpu_type = TYPE_HPPA_CPU;
    mc->init = machine_hppa_init;
    mc->reset = hppa_machine_reset;
    mc->block_default_type = IF_SCSI;
    mc->max_cpus = HPPA_MAX_CPUS;
    mc->default_cpus = 1;
    mc->is_default = true;
    mc->default_ram_size = 512 * MiB;
    mc->default_boot_order = "cd";
    mc->default_ram_id = "ram";
}

DEFINE_MACHINE("hppa", machine_hppa_machine_init)
Commit	Line	Data
813dff13 HD	1	/*
	2	* QEMU HPPA hardware system emulator.
	3	* Copyright 2018 Helge Deller <deller@gmx.de>
	4	*/
	5
	6	#include "qemu/osdep.h"
	7	#include "qemu-common.h"
2c65db5e	8	#include "qemu/datadir.h"
813dff13	9	#include "cpu.h"
813dff13 HD	10	#include "elf.h"
	11	#include "hw/loader.h"
	12	#include "hw/boards.h"
	13	#include "qemu/error-report.h"
71e8a915	14	#include "sysemu/reset.h"
813dff13	15	#include "sysemu/sysemu.h"
b28c4a64	16	#include "sysemu/runstate.h"
bcdb9064	17	#include "hw/rtc/mc146818rtc.h"
813dff13 HD	18	#include "hw/timer/i8254.h"
813dff13 HD	19	#include "hw/char/serial.h"
376b8519	20	#include "hw/net/lasi_82596.h"
070e9a1e	21	#include "hppa_sys.h"
c108cc59	22	#include "qemu/units.h"
813dff13	23	#include "qapi/error.h"
852c27e2	24	#include "net/net.h"
691cbbad	25	#include "qemu/log.h"
e07c4f44	26	#include "net/net.h"
813dff13	27
a72bd606 HD	28	#define MAX_IDE_BUS 2
a72bd606 HD	29
28b71a2e HD	30	#define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */
28b71a2e HD	31
b28c4a64 HD	32	#define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
	33
	34	static void hppa_powerdown_req(Notifier n, void opaque)
	35	{
	36	hwaddr soft_power_reg = HPA_POWER_BUTTON;
	37	uint32_t val;
	38
	39	val = ldl_be_phys(&address_space_memory, soft_power_reg);
	40	if ((val >> 8) == 0) {
	41	/* immediately shut down when under hardware control */
	42	qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
	43	return;
	44	}
	45
	46	/* clear bit 31 to indicate that the power switch was pressed. */
	47	val &= ~1;
	48	stl_be_phys(&address_space_memory, soft_power_reg, val);
	49	}
	50
	51	static Notifier hppa_system_powerdown_notifier = {
	52	.notify = hppa_powerdown_req
	53	};
	54
	55
a72bd606 HD	56	static ISABus *hppa_isa_bus(void)
	57	{
	58	ISABus *isa_bus;
	59	qemu_irq *isa_irqs;
	60	MemoryRegion *isa_region;
	61
	62	isa_region = g_new(MemoryRegion, 1);
	63	memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
	64	NULL, "isa-io", 0x800);
	65	memory_region_add_subregion(get_system_memory(), IDE_HPA,
	66	isa_region);
	67
	68	isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
	69	&error_abort);
	70	isa_irqs = i8259_init(isa_bus,
	71	/* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
	72	NULL);
	73	isa_bus_irqs(isa_bus, isa_irqs);
	74
	75	return isa_bus;
	76	}
	77
	78	static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
	79	{
	80	addr &= (0x10000000 - 1);
	81	return addr;
	82	}
	83
	84	static HPPACPU *cpu[HPPA_MAX_CPUS];
	85	static uint64_t firmware_entry;
813dff13	86
32ff8bf2 HD	87	static void fw_cfg_boot_set(void opaque, const char boot_device,
	88	Error **errp)
	89	{
	90	fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
	91	}
	92
28b71a2e HD	93	static FWCfgState create_fw_cfg(MachineState ms)
	94	{
	95	FWCfgState *fw_cfg;
	96	uint64_t val;
	97
24576007	98	fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
28b71a2e HD	99	fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
28b71a2e HD	100	fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
bfdf22bc	101	fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
28b71a2e HD	102
	103	val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
	104	fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
	105	g_memdup(&val, sizeof(val)), sizeof(val));
	106
df5c6a50 HD	107	val = cpu_to_le64(HPPA_TLB_ENTRIES);
	108	fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
	109	g_memdup(&val, sizeof(val)), sizeof(val));
	110
	111	val = cpu_to_le64(HPPA_BTLB_ENTRIES);
	112	fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
	113	g_memdup(&val, sizeof(val)), sizeof(val));
	114
b28c4a64 HD	115	val = cpu_to_le64(HPA_POWER_BUTTON);
	116	fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
	117	g_memdup(&val, sizeof(val)), sizeof(val));
	118
32ff8bf2 HD	119	fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]);
	120	qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
	121
28b71a2e HD	122	return fw_cfg;
	123	}
	124
813dff13 HD	125	static void machine_hppa_init(MachineState *machine)
813dff13 HD	126	{
a72bd606 HD	127	const char *kernel_filename = machine->kernel_filename;
	128	const char *kernel_cmdline = machine->kernel_cmdline;
	129	const char *initrd_filename = machine->initrd_filename;
877eb21d	130	DeviceState *dev;
a72bd606 HD	131	PCIBus *pci_bus;
	132	ISABus *isa_bus;
	133	qemu_irq rtc_irq, serial_irq;
	134	char *firmware_filename;
	135	uint64_t firmware_low, firmware_high;
	136	long size;
	137	uint64_t kernel_entry = 0, kernel_low, kernel_high;
	138	MemoryRegion *addr_space = get_system_memory();
	139	MemoryRegion *rom_region;
a72bd606 HD	140	MemoryRegion *cpu_region;
a72bd606 HD	141	long i;
33decbd2	142	unsigned int smp_cpus = machine->smp.cpus;
4765384c	143	SysBusDevice *s;
a72bd606	144
a72bd606 HD	145	/* Create CPUs. */
a72bd606 HD	146	for (i = 0; i < smp_cpus; i++) {
266a880e	147	char *name = g_strdup_printf("cpu%ld-io-eir", i);
a72bd606 HD	148	cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
	149
	150	cpu_region = g_new(MemoryRegion, 1);
	151	memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
266a880e	152	cpu[i], name, 4);
a72bd606 HD	153	memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
a72bd606 HD	154	cpu_region);
266a880e	155	g_free(name);
a72bd606 HD	156	}
a72bd606 HD	157
a72bd606	158	/* Main memory region. */
b7746b11 PMD	159	if (machine->ram_size > 3 * GiB) {
	160	error_report("RAM size is currently restricted to 3GB");
	161	exit(EXIT_FAILURE);
	162	}
7c59c1e0 IM	163	memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
7c59c1e0 IM	164
a72bd606	165
376b8519 HD	166	/* Init Lasi chip */
	167	lasi_init(addr_space);
	168
a72bd606 HD	169	/* Init Dino (PCI host bus chip). */
	170	pci_bus = dino_init(addr_space, &rtc_irq, &serial_irq);
	171	assert(pci_bus);
	172
	173	/* Create ISA bus. */
	174	isa_bus = hppa_isa_bus();
	175	assert(isa_bus);
	176
	177	/* Realtime clock, used by firmware for PDC_TOD call. */
	178	mc146818_rtc_init(isa_bus, 2000, rtc_irq);
	179
	180	/* Serial code setup. */
9bca0edb	181	if (serial_hd(0)) {
a72bd606 HD	182	uint32_t addr = DINO_UART_HPA + 0x800;
a72bd606 HD	183	serial_mm_init(addr_space, addr, 0, serial_irq,
9bca0edb	184	115200, serial_hd(0), DEVICE_BIG_ENDIAN);
a72bd606 HD	185	}
a72bd606 HD	186
28b71a2e HD	187	/* fw_cfg configuration interface */
	188	create_fw_cfg(machine);
	189
a72bd606	190	/* SCSI disk setup. */
877eb21d MCA	191	dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
877eb21d MCA	192	lsi53c8xx_handle_legacy_cmdline(dev);
a72bd606	193
4765384c SS	194	/* Graphics setup. */
4765384c SS	195	if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
3e80f690	196	dev = qdev_new("artist");
4765384c	197	s = SYS_BUS_DEVICE(dev);
3c6ef471	198	sysbus_realize_and_unref(s, &error_fatal);
4765384c SS	199	sysbus_mmio_map(s, 0, LASI_GFX_HPA);
	200	sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
	201	}
	202
0e6de551	203	/* Network setup. */
a72bd606	204	for (i = 0; i < nb_nics; i++) {
376b8519	205	if (!enable_lasi_lan()) {
0e6de551	206	pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL);
376b8519	207	}
a72bd606 HD	208	}
a72bd606 HD	209
b28c4a64 HD	210	/* register power switch emulation */
	211	qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
	212
a72bd606 HD	213	/* Load firmware. Given that this is not "real" firmware,
	214	but one explicitly written for the emulation, we might as
	215	well load it directly from an ELF image. */
	216	firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
b57e3e97	217	machine->firmware ?: "hppa-firmware.img");
a72bd606 HD	218	if (firmware_filename == NULL) {
	219	error_report("no firmware provided");
	220	exit(1);
	221	}
	222
4366e1db	223	size = load_elf(firmware_filename, NULL, NULL, NULL,
6cdda0ff	224	&firmware_entry, &firmware_low, &firmware_high, NULL,
a72bd606 HD	225	true, EM_PARISC, 0, 0);
	226
	227	/* Unfortunately, load_elf sign-extends reading elf32. */
	228	firmware_entry = (target_ureg)firmware_entry;
	229	firmware_low = (target_ureg)firmware_low;
	230	firmware_high = (target_ureg)firmware_high;
	231
	232	if (size < 0) {
	233	error_report("could not load firmware '%s'", firmware_filename);
	234	exit(1);
	235	}
691cbbad RH	236	qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
	237	"-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
	238	firmware_low, firmware_high, firmware_entry);
8262863d	239	if (firmware_low < FIRMWARE_START \|\| firmware_high >= FIRMWARE_END) {
a72bd606 HD	240	error_report("Firmware overlaps with memory or IO space");
	241	exit(1);
	242	}
	243	g_free(firmware_filename);
	244
	245	rom_region = g_new(MemoryRegion, 1);
6a3a2e82 IM	246	memory_region_init_ram(rom_region, NULL, "firmware",
6a3a2e82 IM	247	(FIRMWARE_END - FIRMWARE_START), &error_fatal);
a72bd606 HD	248	memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
	249
	250	/* Load kernel */
	251	if (kernel_filename) {
4366e1db	252	size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
6cdda0ff	253	NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
a72bd606 HD	254	true, EM_PARISC, 0, 0);
	255
	256	/* Unfortunately, load_elf sign-extends reading elf32. */
	257	kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
	258	kernel_low = (target_ureg)kernel_low;
	259	kernel_high = (target_ureg)kernel_high;
	260
	261	if (size < 0) {
	262	error_report("could not load kernel '%s'", kernel_filename);
	263	exit(1);
	264	}
691cbbad RH	265	qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
691cbbad RH	266	"-0x%08" PRIx64 ", entry at 0x%08" PRIx64
c108cc59 PMD	267	", size %" PRIu64 " kB\n",
c108cc59 PMD	268	kernel_low, kernel_high, kernel_entry, size / KiB);
a72bd606 HD	269
	270	if (kernel_cmdline) {
	271	cpu[0]->env.gr[24] = 0x4000;
	272	pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
	273	TARGET_PAGE_SIZE, kernel_cmdline);
	274	}
	275
	276	if (initrd_filename) {
	277	ram_addr_t initrd_base;
f3839fda	278	int64_t initrd_size;
a72bd606 HD	279
	280	initrd_size = get_image_size(initrd_filename);
	281	if (initrd_size < 0) {
	282	error_report("could not load initial ram disk '%s'",
	283	initrd_filename);
	284	exit(1);
	285	}
	286
	287	/* Load the initrd image high in memory.
	288	Mirror the algorithm used by palo:
	289	(1) Due to sign-extension problems and PDC,
	290	put the initrd no higher than 1G.
	291	(2) Reserve 64k for stack. */
bfdf22bc	292	initrd_base = MIN(machine->ram_size, 1 * GiB);
c108cc59	293	initrd_base = initrd_base - 64 * KiB;
a72bd606 HD	294	initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
	295
	296	if (initrd_base < kernel_high) {
	297	error_report("kernel and initial ram disk too large!");
	298	exit(1);
	299	}
	300
	301	load_image_targphys(initrd_filename, initrd_base, initrd_size);
	302	cpu[0]->env.gr[23] = initrd_base;
	303	cpu[0]->env.gr[22] = initrd_base + initrd_size;
	304	}
	305	}
	306
	307	if (!kernel_entry) {
	308	/* When booting via firmware, tell firmware if we want interactive
	309	* mode (kernel_entry=1), and to boot from CD (gr[24]='d')
	310	* or hard disc * (gr[24]='c').
	311	*/
	312	kernel_entry = boot_menu ? 1 : 0;
	313	cpu[0]->env.gr[24] = machine->boot_order[0];
	314	}
	315
	316	/* We jump to the firmware entry routine and pass the
	317	* various parameters in registers. After firmware initialization,
	318	* firmware will start the Linux kernel with ramdisk and cmdline.
	319	*/
bfdf22bc	320	cpu[0]->env.gr[26] = machine->ram_size;
a72bd606 HD	321	cpu[0]->env.gr[25] = kernel_entry;
	322
	323	/* tell firmware how many SMP CPUs to present in inventory table */
	324	cpu[0]->env.gr[21] = smp_cpus;
24576007 HD	325
	326	/* tell firmware fw_cfg port */
	327	cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
813dff13 HD	328	}
813dff13 HD	329
a0628599	330	static void hppa_machine_reset(MachineState *ms)
a72bd606	331	{
33decbd2	332	unsigned int smp_cpus = ms->smp.cpus;
a72bd606 HD	333	int i;
	334
	335	qemu_devices_reset();
	336
	337	/* Start all CPUs at the firmware entry point.
	338	* Monarch CPU will initialize firmware, secondary CPUs
	339	* will enter a small idle look and wait for rendevouz. */
	340	for (i = 0; i < smp_cpus; i++) {
	341	cpu_set_pc(CPU(cpu[i]), firmware_entry);
	342	cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
	343	}
	344
	345	/* already initialized by machine_hppa_init()? */
bfdf22bc	346	if (cpu[0]->env.gr[26] == ms->ram_size) {
a72bd606 HD	347	return;
	348	}
	349
bfdf22bc	350	cpu[0]->env.gr[26] = ms->ram_size;
a72bd606 HD	351	cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
	352	cpu[0]->env.gr[24] = 'c';
	353	/* gr22/gr23 unused, no initrd while reboot. */
	354	cpu[0]->env.gr[21] = smp_cpus;
24576007 HD	355	/* tell firmware fw_cfg port */
24576007 HD	356	cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
a72bd606 HD	357	}
	358
	359
813dff13 HD	360	static void machine_hppa_machine_init(MachineClass *mc)
	361	{
	362	mc->desc = "HPPA generic machine";
a72bd606	363	mc->default_cpu_type = TYPE_HPPA_CPU;
813dff13	364	mc->init = machine_hppa_init;
a72bd606	365	mc->reset = hppa_machine_reset;
813dff13	366	mc->block_default_type = IF_SCSI;
a72bd606 HD	367	mc->max_cpus = HPPA_MAX_CPUS;
a72bd606 HD	368	mc->default_cpus = 1;
ea0ac7f6	369	mc->is_default = true;
d23b6caa	370	mc->default_ram_size = 512 * MiB;
813dff13	371	mc->default_boot_order = "cd";
7c59c1e0	372	mc->default_ram_id = "ram";
813dff13 HD	373	}
	374
	375	DEFINE_MACHINE("hppa", machine_hppa_machine_init)