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lasi: move from hw/hppa to hw/misc
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CommitLineData
813dff13
HD
1/*
2 * QEMU HPPA hardware system emulator.
3 * Copyright 2018 Helge Deller <deller@gmx.de>
4 */
5
6#include "qemu/osdep.h"
2c65db5e 7#include "qemu/datadir.h"
813dff13 8#include "cpu.h"
813dff13
HD
9#include "elf.h"
10#include "hw/loader.h"
813dff13 11#include "qemu/error-report.h"
71e8a915 12#include "sysemu/reset.h"
813dff13 13#include "sysemu/sysemu.h"
b28c4a64 14#include "sysemu/runstate.h"
bcdb9064 15#include "hw/rtc/mc146818rtc.h"
813dff13
HD
16#include "hw/timer/i8254.h"
17#include "hw/char/serial.h"
9701e569 18#include "hw/char/parallel.h"
134ba73f 19#include "hw/intc/i8259.h"
d26c575c 20#include "hw/input/lasips2.h"
376b8519 21#include "hw/net/lasi_82596.h"
4a4554c6 22#include "hw/nmi.h"
134ba73f 23#include "hw/pci/pci.h"
0db9350e 24#include "hw/pci-host/dino.h"
45f569a1 25#include "hw/misc/lasi.h"
070e9a1e 26#include "hppa_sys.h"
c108cc59 27#include "qemu/units.h"
813dff13 28#include "qapi/error.h"
852c27e2 29#include "net/net.h"
691cbbad 30#include "qemu/log.h"
e07c4f44 31#include "net/net.h"
813dff13 32
a72bd606
HD
33#define MAX_IDE_BUS 2
34
28b71a2e
HD
35#define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */
36
b28c4a64
HD
37#define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
38
39static void hppa_powerdown_req(Notifier *n, void *opaque)
40{
41 hwaddr soft_power_reg = HPA_POWER_BUTTON;
42 uint32_t val;
43
44 val = ldl_be_phys(&address_space_memory, soft_power_reg);
45 if ((val >> 8) == 0) {
46 /* immediately shut down when under hardware control */
47 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
48 return;
49 }
50
51 /* clear bit 31 to indicate that the power switch was pressed. */
52 val &= ~1;
53 stl_be_phys(&address_space_memory, soft_power_reg, val);
54}
55
56static Notifier hppa_system_powerdown_notifier = {
57 .notify = hppa_powerdown_req
58};
59
60
a72bd606
HD
61static ISABus *hppa_isa_bus(void)
62{
63 ISABus *isa_bus;
64 qemu_irq *isa_irqs;
65 MemoryRegion *isa_region;
66
67 isa_region = g_new(MemoryRegion, 1);
68 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
69 NULL, "isa-io", 0x800);
70 memory_region_add_subregion(get_system_memory(), IDE_HPA,
71 isa_region);
72
73 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
74 &error_abort);
75 isa_irqs = i8259_init(isa_bus,
76 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
77 NULL);
78 isa_bus_irqs(isa_bus, isa_irqs);
79
80 return isa_bus;
81}
82
83static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
84{
85 addr &= (0x10000000 - 1);
86 return addr;
87}
88
89static HPPACPU *cpu[HPPA_MAX_CPUS];
90static uint64_t firmware_entry;
813dff13 91
32ff8bf2
HD
92static void fw_cfg_boot_set(void *opaque, const char *boot_device,
93 Error **errp)
94{
95 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
96}
97
28b71a2e
HD
98static FWCfgState *create_fw_cfg(MachineState *ms)
99{
100 FWCfgState *fw_cfg;
101 uint64_t val;
102
24576007 103 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
28b71a2e
HD
104 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
105 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
bfdf22bc 106 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
28b71a2e
HD
107
108 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
109 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
110 g_memdup(&val, sizeof(val)), sizeof(val));
111
df5c6a50
HD
112 val = cpu_to_le64(HPPA_TLB_ENTRIES);
113 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
114 g_memdup(&val, sizeof(val)), sizeof(val));
115
116 val = cpu_to_le64(HPPA_BTLB_ENTRIES);
117 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
118 g_memdup(&val, sizeof(val)), sizeof(val));
119
b28c4a64
HD
120 val = cpu_to_le64(HPA_POWER_BUTTON);
121 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
122 g_memdup(&val, sizeof(val)), sizeof(val));
123
32ff8bf2
HD
124 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]);
125 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
126
28b71a2e
HD
127 return fw_cfg;
128}
129
e881e3c8
MCA
130static LasiState *lasi_init(void)
131{
132 DeviceState *dev;
133
134 dev = qdev_new(TYPE_LASI_CHIP);
135 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
136
137 return LASI_CHIP(dev);
138}
139
0d068996
MCA
140static DinoState *dino_init(MemoryRegion *addr_space)
141{
142 DeviceState *dev;
143
144 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE);
145 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space),
146 &error_fatal);
147 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
148
149 return DINO_PCI_HOST_BRIDGE(dev);
150}
151
813dff13
HD
152static void machine_hppa_init(MachineState *machine)
153{
a72bd606
HD
154 const char *kernel_filename = machine->kernel_filename;
155 const char *kernel_cmdline = machine->kernel_cmdline;
156 const char *initrd_filename = machine->initrd_filename;
2683758c 157 DeviceState *dev, *dino_dev, *lasi_dev;
a72bd606
HD
158 PCIBus *pci_bus;
159 ISABus *isa_bus;
a72bd606
HD
160 char *firmware_filename;
161 uint64_t firmware_low, firmware_high;
162 long size;
163 uint64_t kernel_entry = 0, kernel_low, kernel_high;
164 MemoryRegion *addr_space = get_system_memory();
165 MemoryRegion *rom_region;
a72bd606
HD
166 MemoryRegion *cpu_region;
167 long i;
33decbd2 168 unsigned int smp_cpus = machine->smp.cpus;
4765384c 169 SysBusDevice *s;
a72bd606 170
a72bd606
HD
171 /* Create CPUs. */
172 for (i = 0; i < smp_cpus; i++) {
266a880e 173 char *name = g_strdup_printf("cpu%ld-io-eir", i);
a72bd606
HD
174 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
175
176 cpu_region = g_new(MemoryRegion, 1);
177 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
266a880e 178 cpu[i], name, 4);
a72bd606
HD
179 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
180 cpu_region);
266a880e 181 g_free(name);
a72bd606
HD
182 }
183
a72bd606 184 /* Main memory region. */
b7746b11
PMD
185 if (machine->ram_size > 3 * GiB) {
186 error_report("RAM size is currently restricted to 3GB");
187 exit(EXIT_FAILURE);
188 }
7c59c1e0
IM
189 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
190
a72bd606 191
376b8519 192 /* Init Lasi chip */
e881e3c8 193 lasi_dev = DEVICE(lasi_init());
2683758c
MCA
194 memory_region_add_subregion(addr_space, LASI_HPA,
195 sysbus_mmio_get_region(
196 SYS_BUS_DEVICE(lasi_dev), 0));
376b8519 197
a72bd606 198 /* Init Dino (PCI host bus chip). */
36f9bbdb 199 dino_dev = DEVICE(dino_init(addr_space));
efdb3ce2
MCA
200 memory_region_add_subregion(addr_space, DINO_HPA,
201 sysbus_mmio_get_region(
202 SYS_BUS_DEVICE(dino_dev), 0));
05245daf 203 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci"));
a72bd606
HD
204 assert(pci_bus);
205
206 /* Create ISA bus. */
207 isa_bus = hppa_isa_bus();
208 assert(isa_bus);
209
210 /* Realtime clock, used by firmware for PDC_TOD call. */
36f9bbdb 211 mc146818_rtc_init(isa_bus, 2000, NULL);
a72bd606
HD
212
213 /* Serial code setup. */
9bca0edb 214 if (serial_hd(0)) {
a72bd606 215 uint32_t addr = DINO_UART_HPA + 0x800;
a4b74c19
MCA
216 serial_mm_init(addr_space, addr, 0,
217 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT),
9bca0edb 218 115200, serial_hd(0), DEVICE_BIG_ENDIAN);
a72bd606
HD
219 }
220
2da547b8
MCA
221 if (serial_hd(1)) {
222 /* Serial port */
223 serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0,
224 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 8000000 / 16,
225 serial_hd(1), DEVICE_BIG_ENDIAN);
226 }
227
9701e569
MCA
228 /* Parallel port */
229 parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0,
230 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA),
231 parallel_hds[0]);
232
28b71a2e
HD
233 /* fw_cfg configuration interface */
234 create_fw_cfg(machine);
235
a72bd606 236 /* SCSI disk setup. */
877eb21d
MCA
237 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
238 lsi53c8xx_handle_legacy_cmdline(dev);
a72bd606 239
4765384c
SS
240 /* Graphics setup. */
241 if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
3e80f690 242 dev = qdev_new("artist");
4765384c 243 s = SYS_BUS_DEVICE(dev);
3c6ef471 244 sysbus_realize_and_unref(s, &error_fatal);
4765384c
SS
245 sysbus_mmio_map(s, 0, LASI_GFX_HPA);
246 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
247 }
248
0e6de551 249 /* Network setup. */
c3c3fe47
MCA
250 if (enable_lasi_lan()) {
251 lasi_82596_init(addr_space, LASI_LAN_HPA,
252 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA));
253 }
254
a72bd606 255 for (i = 0; i < nb_nics; i++) {
376b8519 256 if (!enable_lasi_lan()) {
0e6de551 257 pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL);
376b8519 258 }
a72bd606
HD
259 }
260
d26c575c
MCA
261 /* PS/2 Keyboard/Mouse */
262 lasips2_init(addr_space, LASI_PS2KBD_HPA,
263 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA));
264
b28c4a64
HD
265 /* register power switch emulation */
266 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
267
a72bd606
HD
268 /* Load firmware. Given that this is not "real" firmware,
269 but one explicitly written for the emulation, we might as
270 well load it directly from an ELF image. */
271 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
b57e3e97 272 machine->firmware ?: "hppa-firmware.img");
a72bd606
HD
273 if (firmware_filename == NULL) {
274 error_report("no firmware provided");
275 exit(1);
276 }
277
4366e1db 278 size = load_elf(firmware_filename, NULL, NULL, NULL,
6cdda0ff 279 &firmware_entry, &firmware_low, &firmware_high, NULL,
a72bd606
HD
280 true, EM_PARISC, 0, 0);
281
282 /* Unfortunately, load_elf sign-extends reading elf32. */
283 firmware_entry = (target_ureg)firmware_entry;
284 firmware_low = (target_ureg)firmware_low;
285 firmware_high = (target_ureg)firmware_high;
286
287 if (size < 0) {
288 error_report("could not load firmware '%s'", firmware_filename);
289 exit(1);
290 }
691cbbad
RH
291 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
292 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
293 firmware_low, firmware_high, firmware_entry);
8262863d 294 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) {
a72bd606
HD
295 error_report("Firmware overlaps with memory or IO space");
296 exit(1);
297 }
298 g_free(firmware_filename);
299
300 rom_region = g_new(MemoryRegion, 1);
6a3a2e82
IM
301 memory_region_init_ram(rom_region, NULL, "firmware",
302 (FIRMWARE_END - FIRMWARE_START), &error_fatal);
a72bd606
HD
303 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
304
305 /* Load kernel */
306 if (kernel_filename) {
4366e1db 307 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
6cdda0ff 308 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
a72bd606
HD
309 true, EM_PARISC, 0, 0);
310
311 /* Unfortunately, load_elf sign-extends reading elf32. */
312 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
313 kernel_low = (target_ureg)kernel_low;
314 kernel_high = (target_ureg)kernel_high;
315
316 if (size < 0) {
317 error_report("could not load kernel '%s'", kernel_filename);
318 exit(1);
319 }
691cbbad
RH
320 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
321 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64
c108cc59
PMD
322 ", size %" PRIu64 " kB\n",
323 kernel_low, kernel_high, kernel_entry, size / KiB);
a72bd606
HD
324
325 if (kernel_cmdline) {
326 cpu[0]->env.gr[24] = 0x4000;
327 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
328 TARGET_PAGE_SIZE, kernel_cmdline);
329 }
330
331 if (initrd_filename) {
332 ram_addr_t initrd_base;
f3839fda 333 int64_t initrd_size;
a72bd606
HD
334
335 initrd_size = get_image_size(initrd_filename);
336 if (initrd_size < 0) {
337 error_report("could not load initial ram disk '%s'",
338 initrd_filename);
339 exit(1);
340 }
341
342 /* Load the initrd image high in memory.
343 Mirror the algorithm used by palo:
344 (1) Due to sign-extension problems and PDC,
345 put the initrd no higher than 1G.
346 (2) Reserve 64k for stack. */
bfdf22bc 347 initrd_base = MIN(machine->ram_size, 1 * GiB);
c108cc59 348 initrd_base = initrd_base - 64 * KiB;
a72bd606
HD
349 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
350
351 if (initrd_base < kernel_high) {
352 error_report("kernel and initial ram disk too large!");
353 exit(1);
354 }
355
356 load_image_targphys(initrd_filename, initrd_base, initrd_size);
357 cpu[0]->env.gr[23] = initrd_base;
358 cpu[0]->env.gr[22] = initrd_base + initrd_size;
359 }
360 }
361
362 if (!kernel_entry) {
363 /* When booting via firmware, tell firmware if we want interactive
364 * mode (kernel_entry=1), and to boot from CD (gr[24]='d')
365 * or hard disc * (gr[24]='c').
366 */
367 kernel_entry = boot_menu ? 1 : 0;
368 cpu[0]->env.gr[24] = machine->boot_order[0];
369 }
370
371 /* We jump to the firmware entry routine and pass the
372 * various parameters in registers. After firmware initialization,
373 * firmware will start the Linux kernel with ramdisk and cmdline.
374 */
bfdf22bc 375 cpu[0]->env.gr[26] = machine->ram_size;
a72bd606
HD
376 cpu[0]->env.gr[25] = kernel_entry;
377
378 /* tell firmware how many SMP CPUs to present in inventory table */
379 cpu[0]->env.gr[21] = smp_cpus;
24576007
HD
380
381 /* tell firmware fw_cfg port */
382 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
813dff13
HD
383}
384
a0628599 385static void hppa_machine_reset(MachineState *ms)
a72bd606 386{
33decbd2 387 unsigned int smp_cpus = ms->smp.cpus;
a72bd606
HD
388 int i;
389
390 qemu_devices_reset();
391
392 /* Start all CPUs at the firmware entry point.
393 * Monarch CPU will initialize firmware, secondary CPUs
394 * will enter a small idle look and wait for rendevouz. */
395 for (i = 0; i < smp_cpus; i++) {
396 cpu_set_pc(CPU(cpu[i]), firmware_entry);
397 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
398 }
399
400 /* already initialized by machine_hppa_init()? */
bfdf22bc 401 if (cpu[0]->env.gr[26] == ms->ram_size) {
a72bd606
HD
402 return;
403 }
404
bfdf22bc 405 cpu[0]->env.gr[26] = ms->ram_size;
a72bd606
HD
406 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
407 cpu[0]->env.gr[24] = 'c';
408 /* gr22/gr23 unused, no initrd while reboot. */
409 cpu[0]->env.gr[21] = smp_cpus;
24576007
HD
410 /* tell firmware fw_cfg port */
411 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
a72bd606
HD
412}
413
4a4554c6
HD
414static void hppa_nmi(NMIState *n, int cpu_index, Error **errp)
415{
416 CPUState *cs;
417
418 CPU_FOREACH(cs) {
419 cpu_interrupt(cs, CPU_INTERRUPT_NMI);
420 }
421}
a72bd606 422
813dff13
HD
423static void machine_hppa_machine_init(MachineClass *mc)
424{
0d98fbb5 425 mc->desc = "HPPA B160L machine";
a72bd606 426 mc->default_cpu_type = TYPE_HPPA_CPU;
813dff13 427 mc->init = machine_hppa_init;
a72bd606 428 mc->reset = hppa_machine_reset;
813dff13 429 mc->block_default_type = IF_SCSI;
a72bd606
HD
430 mc->max_cpus = HPPA_MAX_CPUS;
431 mc->default_cpus = 1;
ea0ac7f6 432 mc->is_default = true;
d23b6caa 433 mc->default_ram_size = 512 * MiB;
813dff13 434 mc->default_boot_order = "cd";
7c59c1e0 435 mc->default_ram_id = "ram";
813dff13
HD
436}
437
4a4554c6
HD
438static void machine_hppa_machine_init_class_init(ObjectClass *oc, void *data)
439{
440 MachineClass *mc = MACHINE_CLASS(oc);
441 machine_hppa_machine_init(mc);
442
443 NMIClass *nc = NMI_CLASS(oc);
444 nc->nmi_monitor_handler = hppa_nmi;
445}
446
447static const TypeInfo machine_hppa_machine_init_typeinfo = {
448 .name = ("hppa" "-machine"),
449 .parent = "machine",
450 .class_init = machine_hppa_machine_init_class_init,
451 .interfaces = (InterfaceInfo[]) {
452 { TYPE_NMI },
453 { }
454 },
455};
456
457static void machine_hppa_machine_init_register_types(void)
458{
459 type_register_static(&machine_hppa_machine_init_typeinfo);
460}
461
462type_init(machine_hppa_machine_init_register_types)