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Commit | Line | Data |
---|---|---|
813dff13 HD |
1 | /* |
2 | * QEMU HPPA hardware system emulator. | |
a536f564 HD |
3 | * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de> |
4 | * | |
5 | * This work is licensed under the GNU GPL license version 2 or later. | |
813dff13 HD |
6 | */ |
7 | ||
8 | #include "qemu/osdep.h" | |
2c65db5e | 9 | #include "qemu/datadir.h" |
813dff13 | 10 | #include "cpu.h" |
813dff13 HD |
11 | #include "elf.h" |
12 | #include "hw/loader.h" | |
813dff13 | 13 | #include "qemu/error-report.h" |
71e8a915 | 14 | #include "sysemu/reset.h" |
813dff13 | 15 | #include "sysemu/sysemu.h" |
b28c4a64 | 16 | #include "sysemu/runstate.h" |
bcdb9064 | 17 | #include "hw/rtc/mc146818rtc.h" |
813dff13 HD |
18 | #include "hw/timer/i8254.h" |
19 | #include "hw/char/serial.h" | |
9701e569 | 20 | #include "hw/char/parallel.h" |
134ba73f | 21 | #include "hw/intc/i8259.h" |
d26c575c | 22 | #include "hw/input/lasips2.h" |
376b8519 | 23 | #include "hw/net/lasi_82596.h" |
4a4554c6 | 24 | #include "hw/nmi.h" |
2ed4faa0 | 25 | #include "hw/usb.h" |
134ba73f | 26 | #include "hw/pci/pci.h" |
7df6f751 | 27 | #include "hw/pci/pci_device.h" |
2ed4faa0 | 28 | #include "hw/pci-host/astro.h" |
0db9350e | 29 | #include "hw/pci-host/dino.h" |
45f569a1 | 30 | #include "hw/misc/lasi.h" |
148da670 | 31 | #include "hppa_hardware.h" |
c108cc59 | 32 | #include "qemu/units.h" |
813dff13 | 33 | #include "qapi/error.h" |
852c27e2 | 34 | #include "net/net.h" |
691cbbad | 35 | #include "qemu/log.h" |
813dff13 | 36 | |
a536f564 | 37 | #define MIN_SEABIOS_HPPA_VERSION 10 /* require at least this fw version */ |
28b71a2e | 38 | |
b28c4a64 HD |
39 | #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) |
40 | ||
932befaa MCA |
41 | #define enable_lasi_lan() 0 |
42 | ||
7df6f751 | 43 | static DeviceState *lasi_dev; |
932befaa | 44 | |
b28c4a64 HD |
45 | static void hppa_powerdown_req(Notifier *n, void *opaque) |
46 | { | |
47 | hwaddr soft_power_reg = HPA_POWER_BUTTON; | |
48 | uint32_t val; | |
49 | ||
50 | val = ldl_be_phys(&address_space_memory, soft_power_reg); | |
51 | if ((val >> 8) == 0) { | |
52 | /* immediately shut down when under hardware control */ | |
53 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); | |
54 | return; | |
55 | } | |
56 | ||
57 | /* clear bit 31 to indicate that the power switch was pressed. */ | |
58 | val &= ~1; | |
59 | stl_be_phys(&address_space_memory, soft_power_reg, val); | |
60 | } | |
61 | ||
62 | static Notifier hppa_system_powerdown_notifier = { | |
63 | .notify = hppa_powerdown_req | |
64 | }; | |
65 | ||
28f5332a MCA |
66 | /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ |
67 | static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) | |
68 | { | |
69 | return 0; | |
70 | } | |
71 | ||
72 | static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) | |
73 | { | |
74 | } | |
75 | ||
76 | static const MemoryRegionOps hppa_pci_ignore_ops = { | |
77 | .read = ignore_read, | |
78 | .write = ignore_write, | |
79 | .endianness = DEVICE_BIG_ENDIAN, | |
80 | .valid = { | |
81 | .min_access_size = 1, | |
82 | .max_access_size = 8, | |
83 | }, | |
84 | .impl = { | |
85 | .min_access_size = 1, | |
86 | .max_access_size = 8, | |
87 | }, | |
88 | }; | |
b28c4a64 | 89 | |
f386a16e | 90 | static ISABus *hppa_isa_bus(hwaddr addr) |
a72bd606 HD |
91 | { |
92 | ISABus *isa_bus; | |
93 | qemu_irq *isa_irqs; | |
94 | MemoryRegion *isa_region; | |
95 | ||
96 | isa_region = g_new(MemoryRegion, 1); | |
97 | memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, | |
98 | NULL, "isa-io", 0x800); | |
f386a16e | 99 | memory_region_add_subregion(get_system_memory(), addr, isa_region); |
a72bd606 HD |
100 | |
101 | isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, | |
102 | &error_abort); | |
a536f564 | 103 | isa_irqs = i8259_init(isa_bus, NULL); |
7067887e | 104 | isa_bus_register_input_irqs(isa_bus, isa_irqs); |
a72bd606 HD |
105 | |
106 | return isa_bus; | |
107 | } | |
108 | ||
e2c41ee5 HD |
109 | /* |
110 | * Helper functions to emulate RTC clock and DebugOutputPort | |
111 | */ | |
112 | static time_t rtc_ref; | |
113 | ||
114 | static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size) | |
115 | { | |
116 | uint64_t val = 0; | |
117 | ||
118 | switch (addr) { | |
119 | case 0: /* RTC clock */ | |
120 | val = time(NULL); | |
121 | val += rtc_ref; | |
122 | break; | |
123 | case 8: /* DebugOutputPort */ | |
124 | return 0xe9; /* readback */ | |
125 | } | |
126 | return val; | |
127 | } | |
128 | ||
129 | static void io_cpu_write(void *opaque, hwaddr addr, | |
130 | uint64_t val, unsigned size) | |
131 | { | |
132 | unsigned char ch; | |
133 | Chardev *debugout; | |
134 | ||
135 | switch (addr) { | |
136 | case 0: /* RTC clock */ | |
137 | rtc_ref = val - time(NULL); | |
138 | break; | |
139 | case 8: /* DebugOutputPort */ | |
140 | ch = val; | |
141 | debugout = serial_hd(0); | |
142 | if (debugout) { | |
143 | qemu_chr_fe_write_all(debugout->be, &ch, 1); | |
144 | } else { | |
145 | fprintf(stderr, "%c", ch); | |
146 | } | |
147 | break; | |
148 | } | |
149 | } | |
150 | ||
151 | static const MemoryRegionOps hppa_io_helper_ops = { | |
152 | .read = io_cpu_read, | |
153 | .write = io_cpu_write, | |
154 | .endianness = DEVICE_BIG_ENDIAN, | |
155 | .valid = { | |
156 | .min_access_size = 1, | |
157 | .max_access_size = 8, | |
158 | }, | |
159 | .impl = { | |
160 | .min_access_size = 1, | |
161 | .max_access_size = 8, | |
162 | }, | |
163 | }; | |
164 | ||
f386a16e | 165 | typedef uint64_t TranslateFn(void *opaque, uint64_t addr); |
e2c41ee5 | 166 | |
f386a16e | 167 | static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr) |
a72bd606 HD |
168 | { |
169 | addr &= (0x10000000 - 1); | |
170 | return addr; | |
171 | } | |
172 | ||
f386a16e RH |
173 | static uint64_t translate_pa10(void *dummy, uint64_t addr) |
174 | { | |
175 | return (uint32_t)addr; | |
176 | } | |
177 | ||
178 | static uint64_t translate_pa20(void *dummy, uint64_t addr) | |
179 | { | |
180 | return hppa_abs_to_phys_pa2_w0(addr); | |
181 | } | |
182 | ||
a72bd606 HD |
183 | static HPPACPU *cpu[HPPA_MAX_CPUS]; |
184 | static uint64_t firmware_entry; | |
813dff13 | 185 | |
32ff8bf2 HD |
186 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
187 | Error **errp) | |
188 | { | |
189 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); | |
190 | } | |
191 | ||
f386a16e RH |
192 | static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus, |
193 | hwaddr addr) | |
28b71a2e HD |
194 | { |
195 | FWCfgState *fw_cfg; | |
196 | uint64_t val; | |
069d2966 | 197 | const char qemu_version[] = QEMU_VERSION; |
bcd4dd4c | 198 | MachineClass *mc = MACHINE_GET_CLASS(ms); |
9cf2112b | 199 | int btlb_entries = HPPA_BTLB_ENTRIES(&cpu[0]->env); |
bcd4dd4c | 200 | int len; |
28b71a2e | 201 | |
f386a16e | 202 | fw_cfg = fw_cfg_init_mem(addr, addr + 4); |
28b71a2e HD |
203 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); |
204 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); | |
bfdf22bc | 205 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); |
28b71a2e HD |
206 | |
207 | val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); | |
208 | fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", | |
209 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
210 | ||
9cf2112b | 211 | val = cpu_to_le64(HPPA_TLB_ENTRIES - btlb_entries); |
df5c6a50 HD |
212 | fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", |
213 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
214 | ||
9cf2112b | 215 | val = cpu_to_le64(btlb_entries); |
bcd4dd4c HD |
216 | fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", |
217 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
218 | ||
219 | len = strlen(mc->name) + 1; | |
220 | fw_cfg_add_file(fw_cfg, "/etc/hppa/machine", | |
221 | g_memdup(mc->name, len), len); | |
222 | ||
b28c4a64 | 223 | val = cpu_to_le64(HPA_POWER_BUTTON); |
bcd4dd4c HD |
224 | fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr", |
225 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
226 | ||
e2c41ee5 HD |
227 | val = cpu_to_le64(CPU_HPA + 16); |
228 | fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr", | |
229 | g_memdup(&val, sizeof(val)), sizeof(val)); | |
230 | ||
bcd4dd4c HD |
231 | val = cpu_to_le64(CPU_HPA + 24); |
232 | fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort", | |
b28c4a64 HD |
233 | g_memdup(&val, sizeof(val)), sizeof(val)); |
234 | ||
97ec4d21 | 235 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); |
32ff8bf2 HD |
236 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
237 | ||
069d2966 HD |
238 | fw_cfg_add_file(fw_cfg, "/etc/qemu-version", |
239 | g_memdup(qemu_version, sizeof(qemu_version)), | |
240 | sizeof(qemu_version)); | |
241 | ||
bcd4dd4c HD |
242 | fw_cfg_add_extra_pci_roots(pci_bus, fw_cfg); |
243 | ||
28b71a2e HD |
244 | return fw_cfg; |
245 | } | |
246 | ||
e881e3c8 MCA |
247 | static LasiState *lasi_init(void) |
248 | { | |
249 | DeviceState *dev; | |
250 | ||
251 | dev = qdev_new(TYPE_LASI_CHIP); | |
252 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); | |
253 | ||
254 | return LASI_CHIP(dev); | |
255 | } | |
256 | ||
0d068996 MCA |
257 | static DinoState *dino_init(MemoryRegion *addr_space) |
258 | { | |
259 | DeviceState *dev; | |
260 | ||
261 | dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); | |
262 | object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), | |
263 | &error_fatal); | |
264 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); | |
265 | ||
266 | return DINO_PCI_HOST_BRIDGE(dev); | |
267 | } | |
268 | ||
7df6f751 HD |
269 | /* |
270 | * Step 1: Create CPUs and Memory | |
271 | */ | |
f386a16e | 272 | static TranslateFn *machine_HP_common_init_cpus(MachineState *machine) |
813dff13 | 273 | { |
a72bd606 | 274 | MemoryRegion *addr_space = get_system_memory(); |
33decbd2 | 275 | unsigned int smp_cpus = machine->smp.cpus; |
f386a16e RH |
276 | TranslateFn *translate; |
277 | MemoryRegion *cpu_region; | |
a72bd606 | 278 | |
a72bd606 | 279 | /* Create CPUs. */ |
f386a16e | 280 | for (unsigned int i = 0; i < smp_cpus; i++) { |
a72bd606 | 281 | cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); |
f386a16e RH |
282 | } |
283 | ||
284 | /* | |
285 | * For now, treat address layout as if PSW_W is clear. | |
286 | * TODO: create a proper hppa64 board model and load elf64 firmware. | |
287 | */ | |
288 | if (hppa_is_pa20(&cpu[0]->env)) { | |
289 | translate = translate_pa20; | |
290 | } else { | |
291 | translate = translate_pa10; | |
292 | } | |
293 | ||
294 | for (unsigned int i = 0; i < smp_cpus; i++) { | |
295 | g_autofree char *name = g_strdup_printf("cpu%u-io-eir", i); | |
a72bd606 HD |
296 | |
297 | cpu_region = g_new(MemoryRegion, 1); | |
298 | memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, | |
266a880e | 299 | cpu[i], name, 4); |
f386a16e RH |
300 | memory_region_add_subregion(addr_space, |
301 | translate(NULL, CPU_HPA + i * 0x1000), | |
a72bd606 HD |
302 | cpu_region); |
303 | } | |
304 | ||
e2c41ee5 HD |
305 | /* RTC and DebugOutputPort on CPU #0 */ |
306 | cpu_region = g_new(MemoryRegion, 1); | |
307 | memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops, | |
308 | cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t)); | |
f386a16e RH |
309 | memory_region_add_subregion(addr_space, translate(NULL, CPU_HPA + 16), |
310 | cpu_region); | |
e2c41ee5 | 311 | |
a72bd606 | 312 | /* Main memory region. */ |
b7746b11 PMD |
313 | if (machine->ram_size > 3 * GiB) { |
314 | error_report("RAM size is currently restricted to 3GB"); | |
315 | exit(EXIT_FAILURE); | |
316 | } | |
7c59c1e0 | 317 | memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); |
f386a16e RH |
318 | |
319 | return translate; | |
7df6f751 | 320 | } |
7c59c1e0 | 321 | |
7df6f751 HD |
322 | /* |
323 | * Last creation step: Add SCSI discs, NICs, graphics & load firmware | |
324 | */ | |
f386a16e RH |
325 | static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus, |
326 | TranslateFn *translate) | |
7df6f751 HD |
327 | { |
328 | const char *kernel_filename = machine->kernel_filename; | |
329 | const char *kernel_cmdline = machine->kernel_cmdline; | |
330 | const char *initrd_filename = machine->initrd_filename; | |
331 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
332 | DeviceState *dev; | |
2ed4faa0 | 333 | PCIDevice *pci_dev; |
7df6f751 HD |
334 | char *firmware_filename; |
335 | uint64_t firmware_low, firmware_high; | |
336 | long size; | |
337 | uint64_t kernel_entry = 0, kernel_low, kernel_high; | |
338 | MemoryRegion *addr_space = get_system_memory(); | |
339 | MemoryRegion *rom_region; | |
340 | long i; | |
341 | unsigned int smp_cpus = machine->smp.cpus; | |
342 | SysBusDevice *s; | |
28b71a2e | 343 | |
a72bd606 | 344 | /* SCSI disk setup. */ |
877eb21d MCA |
345 | dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); |
346 | lsi53c8xx_handle_legacy_cmdline(dev); | |
a72bd606 | 347 | |
4765384c SS |
348 | /* Graphics setup. */ |
349 | if (machine->enable_graphics && vga_interface_type != VGA_NONE) { | |
f9bcb2d6 | 350 | vga_interface_created = true; |
3e80f690 | 351 | dev = qdev_new("artist"); |
4765384c | 352 | s = SYS_BUS_DEVICE(dev); |
3c6ef471 | 353 | sysbus_realize_and_unref(s, &error_fatal); |
f386a16e RH |
354 | sysbus_mmio_map(s, 0, translate(NULL, LASI_GFX_HPA)); |
355 | sysbus_mmio_map(s, 1, translate(NULL, ARTIST_FB_ADDR)); | |
4765384c SS |
356 | } |
357 | ||
0e6de551 | 358 | /* Network setup. */ |
c3c3fe47 | 359 | if (enable_lasi_lan()) { |
f386a16e | 360 | lasi_82596_init(addr_space, translate(NULL, LASI_LAN_HPA), |
c3c3fe47 MCA |
361 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); |
362 | } | |
363 | ||
a72bd606 | 364 | for (i = 0; i < nb_nics; i++) { |
376b8519 | 365 | if (!enable_lasi_lan()) { |
9f8981a9 | 366 | pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL); |
376b8519 | 367 | } |
a72bd606 HD |
368 | } |
369 | ||
2ed4faa0 HD |
370 | /* BMC board: HP Powerbar SP2 Diva (with console only) */ |
371 | pci_dev = pci_new(-1, "pci-serial"); | |
372 | if (!lasi_dev) { | |
373 | /* bind default keyboard/serial to Diva card */ | |
374 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev", serial_hd(0)); | |
375 | } | |
376 | qdev_prop_set_uint8(DEVICE(pci_dev), "prog_if", 0); | |
377 | pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); | |
378 | pci_config_set_vendor_id(pci_dev->config, PCI_VENDOR_ID_HP); | |
379 | pci_config_set_device_id(pci_dev->config, 0x1048); | |
380 | pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID], PCI_VENDOR_ID_HP); | |
381 | pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_ID], 0x1227); /* Powerbar */ | |
382 | ||
383 | /* create a second serial PCI card when running Astro */ | |
384 | if (!lasi_dev) { | |
385 | pci_dev = pci_new(-1, "pci-serial-4x"); | |
386 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev1", serial_hd(1)); | |
387 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev2", serial_hd(2)); | |
388 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev3", serial_hd(3)); | |
389 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev4", serial_hd(4)); | |
390 | pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); | |
391 | } | |
392 | ||
393 | /* create USB OHCI controller for USB keyboard & mouse on Astro machines */ | |
394 | if (!lasi_dev && machine->enable_graphics) { | |
395 | pci_create_simple(pci_bus, -1, "pci-ohci"); | |
396 | usb_create_simple(usb_bus_find(-1), "usb-kbd"); | |
397 | usb_create_simple(usb_bus_find(-1), "usb-mouse"); | |
398 | } | |
399 | ||
b28c4a64 HD |
400 | /* register power switch emulation */ |
401 | qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); | |
402 | ||
7df6f751 | 403 | /* fw_cfg configuration interface */ |
f386a16e | 404 | create_fw_cfg(machine, pci_bus, translate(NULL, FW_CFG_IO_BASE)); |
7df6f751 | 405 | |
a72bd606 HD |
406 | /* Load firmware. Given that this is not "real" firmware, |
407 | but one explicitly written for the emulation, we might as | |
408 | well load it directly from an ELF image. */ | |
409 | firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, | |
b57e3e97 | 410 | machine->firmware ?: "hppa-firmware.img"); |
a72bd606 HD |
411 | if (firmware_filename == NULL) { |
412 | error_report("no firmware provided"); | |
413 | exit(1); | |
414 | } | |
415 | ||
f386a16e | 416 | size = load_elf(firmware_filename, NULL, translate, NULL, |
6cdda0ff | 417 | &firmware_entry, &firmware_low, &firmware_high, NULL, |
a72bd606 HD |
418 | true, EM_PARISC, 0, 0); |
419 | ||
a72bd606 HD |
420 | if (size < 0) { |
421 | error_report("could not load firmware '%s'", firmware_filename); | |
422 | exit(1); | |
423 | } | |
691cbbad RH |
424 | qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 |
425 | "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", | |
426 | firmware_low, firmware_high, firmware_entry); | |
f386a16e RH |
427 | if (firmware_low < translate(NULL, FIRMWARE_START) || |
428 | firmware_high >= translate(NULL, FIRMWARE_END)) { | |
a72bd606 HD |
429 | error_report("Firmware overlaps with memory or IO space"); |
430 | exit(1); | |
431 | } | |
432 | g_free(firmware_filename); | |
433 | ||
434 | rom_region = g_new(MemoryRegion, 1); | |
6a3a2e82 IM |
435 | memory_region_init_ram(rom_region, NULL, "firmware", |
436 | (FIRMWARE_END - FIRMWARE_START), &error_fatal); | |
f386a16e RH |
437 | memory_region_add_subregion(addr_space, |
438 | translate(NULL, FIRMWARE_START), rom_region); | |
a72bd606 HD |
439 | |
440 | /* Load kernel */ | |
441 | if (kernel_filename) { | |
f386a16e | 442 | size = load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys, |
6cdda0ff | 443 | NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, |
a72bd606 HD |
444 | true, EM_PARISC, 0, 0); |
445 | ||
f386a16e | 446 | kernel_entry = linux_kernel_virt_to_phys(NULL, kernel_entry); |
a72bd606 HD |
447 | |
448 | if (size < 0) { | |
449 | error_report("could not load kernel '%s'", kernel_filename); | |
450 | exit(1); | |
451 | } | |
691cbbad RH |
452 | qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 |
453 | "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 | |
c108cc59 PMD |
454 | ", size %" PRIu64 " kB\n", |
455 | kernel_low, kernel_high, kernel_entry, size / KiB); | |
a72bd606 HD |
456 | |
457 | if (kernel_cmdline) { | |
458 | cpu[0]->env.gr[24] = 0x4000; | |
459 | pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], | |
460 | TARGET_PAGE_SIZE, kernel_cmdline); | |
461 | } | |
462 | ||
463 | if (initrd_filename) { | |
464 | ram_addr_t initrd_base; | |
f3839fda | 465 | int64_t initrd_size; |
a72bd606 HD |
466 | |
467 | initrd_size = get_image_size(initrd_filename); | |
468 | if (initrd_size < 0) { | |
469 | error_report("could not load initial ram disk '%s'", | |
470 | initrd_filename); | |
471 | exit(1); | |
472 | } | |
473 | ||
474 | /* Load the initrd image high in memory. | |
475 | Mirror the algorithm used by palo: | |
476 | (1) Due to sign-extension problems and PDC, | |
477 | put the initrd no higher than 1G. | |
478 | (2) Reserve 64k for stack. */ | |
bfdf22bc | 479 | initrd_base = MIN(machine->ram_size, 1 * GiB); |
c108cc59 | 480 | initrd_base = initrd_base - 64 * KiB; |
a72bd606 HD |
481 | initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; |
482 | ||
483 | if (initrd_base < kernel_high) { | |
484 | error_report("kernel and initial ram disk too large!"); | |
485 | exit(1); | |
486 | } | |
487 | ||
488 | load_image_targphys(initrd_filename, initrd_base, initrd_size); | |
489 | cpu[0]->env.gr[23] = initrd_base; | |
490 | cpu[0]->env.gr[22] = initrd_base + initrd_size; | |
491 | } | |
492 | } | |
493 | ||
494 | if (!kernel_entry) { | |
495 | /* When booting via firmware, tell firmware if we want interactive | |
496 | * mode (kernel_entry=1), and to boot from CD (gr[24]='d') | |
497 | * or hard disc * (gr[24]='c'). | |
498 | */ | |
97ec4d21 PB |
499 | kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; |
500 | cpu[0]->env.gr[24] = machine->boot_config.order[0]; | |
a72bd606 HD |
501 | } |
502 | ||
503 | /* We jump to the firmware entry routine and pass the | |
504 | * various parameters in registers. After firmware initialization, | |
505 | * firmware will start the Linux kernel with ramdisk and cmdline. | |
506 | */ | |
bfdf22bc | 507 | cpu[0]->env.gr[26] = machine->ram_size; |
a72bd606 HD |
508 | cpu[0]->env.gr[25] = kernel_entry; |
509 | ||
510 | /* tell firmware how many SMP CPUs to present in inventory table */ | |
511 | cpu[0]->env.gr[21] = smp_cpus; | |
24576007 HD |
512 | |
513 | /* tell firmware fw_cfg port */ | |
514 | cpu[0]->env.gr[19] = FW_CFG_IO_BASE; | |
813dff13 HD |
515 | } |
516 | ||
7df6f751 HD |
517 | /* |
518 | * Create HP B160L workstation | |
519 | */ | |
520 | static void machine_HP_B160L_init(MachineState *machine) | |
521 | { | |
522 | DeviceState *dev, *dino_dev; | |
523 | MemoryRegion *addr_space = get_system_memory(); | |
f386a16e | 524 | TranslateFn *translate; |
7df6f751 HD |
525 | ISABus *isa_bus; |
526 | PCIBus *pci_bus; | |
527 | ||
528 | /* Create CPUs and RAM. */ | |
f386a16e | 529 | translate = machine_HP_common_init_cpus(machine); |
7df6f751 HD |
530 | |
531 | /* Init Lasi chip */ | |
532 | lasi_dev = DEVICE(lasi_init()); | |
f386a16e | 533 | memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA), |
7df6f751 HD |
534 | sysbus_mmio_get_region( |
535 | SYS_BUS_DEVICE(lasi_dev), 0)); | |
536 | ||
537 | /* Init Dino (PCI host bus chip). */ | |
538 | dino_dev = DEVICE(dino_init(addr_space)); | |
f386a16e | 539 | memory_region_add_subregion(addr_space, translate(NULL, DINO_HPA), |
7df6f751 HD |
540 | sysbus_mmio_get_region( |
541 | SYS_BUS_DEVICE(dino_dev), 0)); | |
542 | pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); | |
543 | assert(pci_bus); | |
544 | ||
545 | /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ | |
f386a16e | 546 | isa_bus = hppa_isa_bus(translate(NULL, IDE_HPA)); |
7df6f751 HD |
547 | assert(isa_bus); |
548 | ||
549 | /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ | |
f386a16e | 550 | serial_mm_init(addr_space, translate(NULL, LASI_UART_HPA + 0x800), 0, |
7df6f751 HD |
551 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, |
552 | serial_hd(0), DEVICE_BIG_ENDIAN); | |
553 | ||
f386a16e | 554 | serial_mm_init(addr_space, translate(NULL, DINO_UART_HPA + 0x800), 0, |
7df6f751 HD |
555 | qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, |
556 | serial_hd(1), DEVICE_BIG_ENDIAN); | |
557 | ||
558 | /* Parallel port */ | |
f386a16e | 559 | parallel_mm_init(addr_space, translate(NULL, LASI_LPT_HPA + 0x800), 0, |
7df6f751 HD |
560 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), |
561 | parallel_hds[0]); | |
562 | ||
563 | /* PS/2 Keyboard/Mouse */ | |
564 | dev = qdev_new(TYPE_LASIPS2); | |
565 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); | |
566 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, | |
567 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); | |
f386a16e RH |
568 | memory_region_add_subregion(addr_space, |
569 | translate(NULL, LASI_PS2KBD_HPA), | |
7df6f751 HD |
570 | sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), |
571 | 0)); | |
f386a16e RH |
572 | memory_region_add_subregion(addr_space, |
573 | translate(NULL, LASI_PS2KBD_HPA + 0x100), | |
7df6f751 HD |
574 | sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), |
575 | 1)); | |
576 | ||
577 | /* Add SCSI discs, NICs, graphics & load firmware */ | |
f386a16e | 578 | machine_HP_common_init_tail(machine, pci_bus, translate); |
7df6f751 HD |
579 | } |
580 | ||
2ed4faa0 HD |
581 | static AstroState *astro_init(void) |
582 | { | |
583 | DeviceState *dev; | |
584 | ||
585 | dev = qdev_new(TYPE_ASTRO_CHIP); | |
586 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); | |
587 | ||
588 | return ASTRO_CHIP(dev); | |
589 | } | |
590 | ||
591 | /* | |
592 | * Create HP C3700 workstation | |
593 | */ | |
594 | static void machine_HP_C3700_init(MachineState *machine) | |
595 | { | |
596 | PCIBus *pci_bus; | |
597 | AstroState *astro; | |
598 | DeviceState *astro_dev; | |
599 | MemoryRegion *addr_space = get_system_memory(); | |
f386a16e | 600 | TranslateFn *translate; |
2ed4faa0 HD |
601 | |
602 | /* Create CPUs and RAM. */ | |
f386a16e | 603 | translate = machine_HP_common_init_cpus(machine); |
2ed4faa0 HD |
604 | |
605 | /* Init Astro and the Elroys (PCI host bus chips). */ | |
606 | astro = astro_init(); | |
607 | astro_dev = DEVICE(astro); | |
f386a16e | 608 | memory_region_add_subregion(addr_space, translate(NULL, ASTRO_HPA), |
2ed4faa0 HD |
609 | sysbus_mmio_get_region( |
610 | SYS_BUS_DEVICE(astro_dev), 0)); | |
611 | pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(astro->elroy[0]), "pci")); | |
612 | assert(pci_bus); | |
613 | ||
614 | /* Add SCSI discs, NICs, graphics & load firmware */ | |
f386a16e | 615 | machine_HP_common_init_tail(machine, pci_bus, translate); |
2ed4faa0 HD |
616 | } |
617 | ||
7966d70f | 618 | static void hppa_machine_reset(MachineState *ms, ShutdownCause reason) |
a72bd606 | 619 | { |
33decbd2 | 620 | unsigned int smp_cpus = ms->smp.cpus; |
a72bd606 HD |
621 | int i; |
622 | ||
7966d70f | 623 | qemu_devices_reset(reason); |
a72bd606 HD |
624 | |
625 | /* Start all CPUs at the firmware entry point. | |
626 | * Monarch CPU will initialize firmware, secondary CPUs | |
50ba97e9 | 627 | * will enter a small idle loop and wait for rendevouz. */ |
a72bd606 | 628 | for (i = 0; i < smp_cpus; i++) { |
50ba97e9 HD |
629 | CPUState *cs = CPU(cpu[i]); |
630 | ||
631 | cpu_set_pc(cs, firmware_entry); | |
632 | cpu[i]->env.psw = PSW_Q; | |
a72bd606 | 633 | cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; |
50ba97e9 HD |
634 | |
635 | cs->exception_index = -1; | |
636 | cs->halted = 0; | |
a72bd606 HD |
637 | } |
638 | ||
639 | /* already initialized by machine_hppa_init()? */ | |
bfdf22bc | 640 | if (cpu[0]->env.gr[26] == ms->ram_size) { |
a72bd606 HD |
641 | return; |
642 | } | |
643 | ||
bfdf22bc | 644 | cpu[0]->env.gr[26] = ms->ram_size; |
a72bd606 HD |
645 | cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ |
646 | cpu[0]->env.gr[24] = 'c'; | |
647 | /* gr22/gr23 unused, no initrd while reboot. */ | |
648 | cpu[0]->env.gr[21] = smp_cpus; | |
24576007 HD |
649 | /* tell firmware fw_cfg port */ |
650 | cpu[0]->env.gr[19] = FW_CFG_IO_BASE; | |
a72bd606 HD |
651 | } |
652 | ||
4a4554c6 HD |
653 | static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) |
654 | { | |
655 | CPUState *cs; | |
656 | ||
657 | CPU_FOREACH(cs) { | |
658 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); | |
659 | } | |
660 | } | |
a72bd606 | 661 | |
7df6f751 | 662 | static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data) |
813dff13 | 663 | { |
42cc2bf6 MCA |
664 | MachineClass *mc = MACHINE_CLASS(oc); |
665 | NMIClass *nc = NMI_CLASS(oc); | |
666 | ||
7df6f751 | 667 | mc->desc = "HP B160L workstation"; |
a72bd606 | 668 | mc->default_cpu_type = TYPE_HPPA_CPU; |
7df6f751 | 669 | mc->init = machine_HP_B160L_init; |
a72bd606 | 670 | mc->reset = hppa_machine_reset; |
813dff13 | 671 | mc->block_default_type = IF_SCSI; |
a72bd606 HD |
672 | mc->max_cpus = HPPA_MAX_CPUS; |
673 | mc->default_cpus = 1; | |
ea0ac7f6 | 674 | mc->is_default = true; |
d23b6caa | 675 | mc->default_ram_size = 512 * MiB; |
813dff13 | 676 | mc->default_boot_order = "cd"; |
7c59c1e0 | 677 | mc->default_ram_id = "ram"; |
9f8981a9 | 678 | mc->default_nic = "tulip"; |
813dff13 | 679 | |
4a4554c6 HD |
680 | nc->nmi_monitor_handler = hppa_nmi; |
681 | } | |
682 | ||
7df6f751 HD |
683 | static const TypeInfo HP_B160L_machine_init_typeinfo = { |
684 | .name = MACHINE_TYPE_NAME("B160L"), | |
c165905c | 685 | .parent = TYPE_MACHINE, |
7df6f751 | 686 | .class_init = HP_B160L_machine_init_class_init, |
4a4554c6 HD |
687 | .interfaces = (InterfaceInfo[]) { |
688 | { TYPE_NMI }, | |
689 | { } | |
690 | }, | |
691 | }; | |
692 | ||
2ed4faa0 HD |
693 | static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data) |
694 | { | |
695 | MachineClass *mc = MACHINE_CLASS(oc); | |
696 | NMIClass *nc = NMI_CLASS(oc); | |
697 | ||
698 | mc->desc = "HP C3700 workstation"; | |
699 | mc->default_cpu_type = TYPE_HPPA_CPU; | |
700 | mc->init = machine_HP_C3700_init; | |
701 | mc->reset = hppa_machine_reset; | |
702 | mc->block_default_type = IF_SCSI; | |
703 | mc->max_cpus = HPPA_MAX_CPUS; | |
704 | mc->default_cpus = 1; | |
705 | mc->is_default = false; | |
706 | mc->default_ram_size = 1024 * MiB; | |
707 | mc->default_boot_order = "cd"; | |
708 | mc->default_ram_id = "ram"; | |
709 | mc->default_nic = "tulip"; | |
710 | ||
711 | nc->nmi_monitor_handler = hppa_nmi; | |
712 | } | |
713 | ||
714 | static const TypeInfo HP_C3700_machine_init_typeinfo = { | |
715 | .name = MACHINE_TYPE_NAME("C3700"), | |
716 | .parent = TYPE_MACHINE, | |
717 | .class_init = HP_C3700_machine_init_class_init, | |
718 | .interfaces = (InterfaceInfo[]) { | |
719 | { TYPE_NMI }, | |
720 | { } | |
721 | }, | |
722 | }; | |
723 | ||
297d4103 | 724 | static void hppa_machine_init_register_types(void) |
4a4554c6 | 725 | { |
7df6f751 | 726 | type_register_static(&HP_B160L_machine_init_typeinfo); |
2ed4faa0 | 727 | type_register_static(&HP_C3700_machine_init_typeinfo); |
4a4554c6 HD |
728 | } |
729 | ||
297d4103 | 730 | type_init(hppa_machine_init_register_types) |