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3ead03bd AZ |
1 | /* |
2 | * Bit-Bang i2c emulation extracted from | |
3 | * Marvell MV88W8618 / Freecom MusicPal emulation. | |
4 | * | |
5 | * Copyright (c) 2008 Jan Kiszka | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GNU GPL v2. |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
3ead03bd | 11 | */ |
0b8fa32f | 12 | |
0430891c | 13 | #include "qemu/osdep.h" |
64552b6b | 14 | #include "hw/irq.h" |
d718b747 | 15 | #include "hw/i2c/bitbang_i2c.h" |
83c9f4ca | 16 | #include "hw/sysbus.h" |
0b8fa32f | 17 | #include "qemu/module.h" |
3ead03bd | 18 | |
3cd035d8 PB |
19 | //#define DEBUG_BITBANG_I2C |
20 | ||
21 | #ifdef DEBUG_BITBANG_I2C | |
22 | #define DPRINTF(fmt, ...) \ | |
23 | do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0) | |
24 | #else | |
25 | #define DPRINTF(fmt, ...) do {} while(0) | |
26 | #endif | |
27 | ||
3ead03bd AZ |
28 | static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) |
29 | { | |
3cd035d8 | 30 | DPRINTF("STOP\n"); |
3ead03bd AZ |
31 | if (i2c->current_addr >= 0) |
32 | i2c_end_transfer(i2c->bus); | |
33 | i2c->current_addr = -1; | |
34 | i2c->state = STOPPED; | |
35 | } | |
36 | ||
3cd035d8 PB |
37 | /* Set device data pin. */ |
38 | static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) | |
39 | { | |
40 | i2c->device_out = level; | |
41 | //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out); | |
42 | return level & i2c->last_data; | |
43 | } | |
44 | ||
45 | /* Leave device data pin unodified. */ | |
46 | static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) | |
47 | { | |
48 | return bitbang_i2c_ret(i2c, i2c->device_out); | |
49 | } | |
50 | ||
51 | /* Returns data line level. */ | |
52 | int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) | |
3ead03bd | 53 | { |
3ead03bd | 54 | int data; |
3ead03bd | 55 | |
3cd035d8 PB |
56 | if (level != 0 && level != 1) { |
57 | abort(); | |
58 | } | |
3ead03bd | 59 | |
3cd035d8 PB |
60 | if (line == BITBANG_I2C_SDA) { |
61 | if (level == i2c->last_data) { | |
62 | return bitbang_i2c_nop(i2c); | |
63 | } | |
64 | i2c->last_data = level; | |
65 | if (i2c->last_clock == 0) { | |
66 | return bitbang_i2c_nop(i2c); | |
67 | } | |
68 | if (level == 0) { | |
69 | DPRINTF("START\n"); | |
70 | /* START condition. */ | |
3ead03bd | 71 | i2c->state = SENDING_BIT7; |
3cd035d8 PB |
72 | i2c->current_addr = -1; |
73 | } else { | |
74 | /* STOP condition. */ | |
3ead03bd | 75 | bitbang_i2c_enter_stop(i2c); |
3cd035d8 PB |
76 | } |
77 | return bitbang_i2c_ret(i2c, 1); | |
78 | } | |
79 | ||
80 | data = i2c->last_data; | |
81 | if (i2c->last_clock == level) { | |
82 | return bitbang_i2c_nop(i2c); | |
83 | } | |
84 | i2c->last_clock = level; | |
85 | if (level == 0) { | |
86 | /* State is set/read at the start of the clock pulse. | |
87 | release the data line at the end. */ | |
88 | return bitbang_i2c_ret(i2c, 1); | |
89 | } | |
90 | switch (i2c->state) { | |
91 | case STOPPED: | |
2eb9f241 | 92 | case SENT_NACK: |
3cd035d8 | 93 | return bitbang_i2c_ret(i2c, 1); |
3ead03bd AZ |
94 | |
95 | case SENDING_BIT7 ... SENDING_BIT0: | |
3cd035d8 PB |
96 | i2c->buffer = (i2c->buffer << 1) | data; |
97 | /* will end up in WAITING_FOR_ACK */ | |
98 | i2c->state++; | |
99 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd AZ |
100 | |
101 | case WAITING_FOR_ACK: | |
9706e016 PM |
102 | { |
103 | int ret; | |
104 | ||
3cd035d8 PB |
105 | if (i2c->current_addr < 0) { |
106 | i2c->current_addr = i2c->buffer; | |
107 | DPRINTF("Address 0x%02x\n", i2c->current_addr); | |
9706e016 PM |
108 | ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, |
109 | i2c->current_addr & 1); | |
3cd035d8 PB |
110 | } else { |
111 | DPRINTF("Sent 0x%02x\n", i2c->buffer); | |
9706e016 PM |
112 | ret = i2c_send(i2c->bus, i2c->buffer); |
113 | } | |
114 | if (ret) { | |
115 | /* NACK (either addressing a nonexistent device, or the | |
116 | * device we were sending to decided to NACK us). | |
117 | */ | |
118 | DPRINTF("Got NACK\n"); | |
119 | bitbang_i2c_enter_stop(i2c); | |
120 | return bitbang_i2c_ret(i2c, 1); | |
3cd035d8 PB |
121 | } |
122 | if (i2c->current_addr & 1) { | |
123 | i2c->state = RECEIVING_BIT7; | |
124 | } else { | |
125 | i2c->state = SENDING_BIT7; | |
126 | } | |
127 | return bitbang_i2c_ret(i2c, 0); | |
9706e016 | 128 | } |
3cd035d8 PB |
129 | case RECEIVING_BIT7: |
130 | i2c->buffer = i2c_recv(i2c->bus); | |
131 | DPRINTF("RX byte 0x%02x\n", i2c->buffer); | |
132 | /* Fall through... */ | |
133 | case RECEIVING_BIT6 ... RECEIVING_BIT0: | |
134 | data = i2c->buffer >> 7; | |
135 | /* will end up in SENDING_ACK */ | |
136 | i2c->state++; | |
137 | i2c->buffer <<= 1; | |
138 | return bitbang_i2c_ret(i2c, data); | |
3ead03bd AZ |
139 | |
140 | case SENDING_ACK: | |
3cd035d8 PB |
141 | i2c->state = RECEIVING_BIT7; |
142 | if (data != 0) { | |
143 | DPRINTF("NACKED\n"); | |
2eb9f241 | 144 | i2c->state = SENT_NACK; |
3cd035d8 PB |
145 | i2c_nack(i2c->bus); |
146 | } else { | |
147 | DPRINTF("ACKED\n"); | |
148 | } | |
149 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd | 150 | } |
3cd035d8 PB |
151 | abort(); |
152 | } | |
153 | ||
41742927 | 154 | void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus) |
3cd035d8 | 155 | { |
3cd035d8 PB |
156 | s->bus = bus; |
157 | s->last_data = 1; | |
158 | s->last_clock = 1; | |
159 | s->device_out = 1; | |
3cd035d8 | 160 | } |
3ead03bd | 161 | |
3cd035d8 | 162 | /* GPIO interface. */ |
cc3c3b8a AF |
163 | |
164 | #define TYPE_GPIO_I2C "gpio_i2c" | |
165 | #define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C) | |
166 | ||
167 | typedef struct GPIOI2CState { | |
168 | SysBusDevice parent_obj; | |
169 | ||
cffac71b | 170 | MemoryRegion dummy_iomem; |
41742927 | 171 | bitbang_i2c_interface bitbang; |
3cd035d8 PB |
172 | int last_level; |
173 | qemu_irq out; | |
174 | } GPIOI2CState; | |
175 | ||
176 | static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) | |
177 | { | |
178 | GPIOI2CState *s = opaque; | |
179 | ||
41742927 | 180 | level = bitbang_i2c_set(&s->bitbang, irq, level); |
3cd035d8 PB |
181 | if (level != s->last_level) { |
182 | s->last_level = level; | |
183 | qemu_set_irq(s->out, level); | |
184 | } | |
3ead03bd AZ |
185 | } |
186 | ||
00b2f758 | 187 | static void gpio_i2c_init(Object *obj) |
3ead03bd | 188 | { |
00b2f758 XZ |
189 | DeviceState *dev = DEVICE(obj); |
190 | GPIOI2CState *s = GPIO_I2C(obj); | |
191 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | |
a5c82852 | 192 | I2CBus *bus; |
3ead03bd | 193 | |
00b2f758 | 194 | memory_region_init(&s->dummy_iomem, obj, "gpio_i2c", 0); |
cc3c3b8a | 195 | sysbus_init_mmio(sbd, &s->dummy_iomem); |
3ead03bd | 196 | |
cc3c3b8a | 197 | bus = i2c_init_bus(dev, "i2c"); |
41742927 | 198 | bitbang_i2c_init(&s->bitbang, bus); |
3ead03bd | 199 | |
cc3c3b8a AF |
200 | qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2); |
201 | qdev_init_gpio_out(dev, &s->out, 1); | |
3ead03bd AZ |
202 | } |
203 | ||
999e12bb AL |
204 | static void gpio_i2c_class_init(ObjectClass *klass, void *data) |
205 | { | |
39bffca2 | 206 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 207 | |
125ee0ed | 208 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
39bffca2 | 209 | dc->desc = "Virtual GPIO to I2C bridge"; |
999e12bb AL |
210 | } |
211 | ||
8c43a6f0 | 212 | static const TypeInfo gpio_i2c_info = { |
cc3c3b8a | 213 | .name = TYPE_GPIO_I2C, |
39bffca2 AL |
214 | .parent = TYPE_SYS_BUS_DEVICE, |
215 | .instance_size = sizeof(GPIOI2CState), | |
00b2f758 | 216 | .instance_init = gpio_i2c_init, |
39bffca2 | 217 | .class_init = gpio_i2c_class_init, |
3cd035d8 PB |
218 | }; |
219 | ||
83f7d43a | 220 | static void bitbang_i2c_register_types(void) |
3ead03bd | 221 | { |
39bffca2 | 222 | type_register_static(&gpio_i2c_info); |
3ead03bd AZ |
223 | } |
224 | ||
83f7d43a | 225 | type_init(bitbang_i2c_register_types) |