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Commit | Line | Data |
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5fafdf24 | 1 | /* |
0ff596d0 PB |
2 | * QEMU I2C bus interface. |
3 | * | |
4 | * Copyright (c) 2007 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the LGPL. |
0ff596d0 PB |
8 | */ |
9 | ||
0430891c | 10 | #include "qemu/osdep.h" |
0d09e41a | 11 | #include "hw/i2c/i2c.h" |
a27bd6c7 | 12 | #include "hw/qdev-properties.h" |
d6454270 | 13 | #include "migration/vmstate.h" |
3e80f690 | 14 | #include "qapi/error.h" |
0b8fa32f | 15 | #include "qemu/module.h" |
08bb9b34 | 16 | #include "trace.h" |
0ff596d0 | 17 | |
71ae65e5 IM |
18 | #define I2C_BROADCAST 0x00 |
19 | ||
3cb75a7c PB |
20 | static Property i2c_props[] = { |
21 | DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0), | |
22 | DEFINE_PROP_END_OF_LIST(), | |
23 | }; | |
24 | ||
0d936928 AL |
25 | static const TypeInfo i2c_bus_info = { |
26 | .name = TYPE_I2C_BUS, | |
27 | .parent = TYPE_BUS, | |
a5c82852 | 28 | .instance_size = sizeof(I2CBus), |
10c4c98a GH |
29 | }; |
30 | ||
44b1ff31 | 31 | static int i2c_bus_pre_save(void *opaque) |
c701b35b | 32 | { |
a5c82852 | 33 | I2CBus *bus = opaque; |
c701b35b | 34 | |
2293c27f FK |
35 | bus->saved_address = -1; |
36 | if (!QLIST_EMPTY(&bus->current_devs)) { | |
37 | if (!bus->broadcast) { | |
38 | bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address; | |
71ae65e5 IM |
39 | } else { |
40 | bus->saved_address = I2C_BROADCAST; | |
2293c27f FK |
41 | } |
42 | } | |
44b1ff31 DDAG |
43 | |
44 | return 0; | |
c701b35b PB |
45 | } |
46 | ||
8d0eb050 JQ |
47 | static const VMStateDescription vmstate_i2c_bus = { |
48 | .name = "i2c_bus", | |
49 | .version_id = 1, | |
50 | .minimum_version_id = 1, | |
8d0eb050 | 51 | .pre_save = i2c_bus_pre_save, |
35d08458 | 52 | .fields = (VMStateField[]) { |
a5c82852 | 53 | VMSTATE_UINT8(saved_address, I2CBus), |
8d0eb050 JQ |
54 | VMSTATE_END_OF_LIST() |
55 | } | |
56 | }; | |
57 | ||
0ff596d0 | 58 | /* Create a new I2C bus. */ |
a5c82852 | 59 | I2CBus *i2c_init_bus(DeviceState *parent, const char *name) |
0ff596d0 | 60 | { |
a5c82852 | 61 | I2CBus *bus; |
0ff596d0 | 62 | |
fef7fbc9 | 63 | bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name)); |
2293c27f | 64 | QLIST_INIT(&bus->current_devs); |
1df2c9a2 | 65 | vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_i2c_bus, bus); |
0ff596d0 PB |
66 | return bus; |
67 | } | |
68 | ||
9e07bdf8 | 69 | void i2c_set_slave_address(I2CSlave *dev, uint8_t address) |
0ff596d0 PB |
70 | { |
71 | dev->address = address; | |
72 | } | |
73 | ||
74 | /* Return nonzero if bus is busy. */ | |
a5c82852 | 75 | int i2c_bus_busy(I2CBus *bus) |
0ff596d0 | 76 | { |
2293c27f | 77 | return !QLIST_EMPTY(&bus->current_devs); |
0ff596d0 PB |
78 | } |
79 | ||
d307c28c | 80 | /* TODO: Make this handle multiple masters. */ |
cc083d8a | 81 | /* |
d307c28c CM |
82 | * Start or continue an i2c transaction. When this is called for the |
83 | * first time or after an i2c_end_transfer(), if it returns an error | |
84 | * the bus transaction is terminated (or really never started). If | |
85 | * this is called after another i2c_start_transfer() without an | |
86 | * intervening i2c_end_transfer(), and it returns an error, the | |
87 | * transaction will not be terminated. The caller must do it. | |
88 | * | |
89 | * This corresponds with the way real hardware works. The SMBus | |
90 | * protocol uses a start transfer to switch from write to read mode | |
91 | * without releasing the bus. If that fails, the bus is still | |
92 | * in a transaction. | |
cc083d8a | 93 | */ |
a5c82852 | 94 | int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv) |
0ff596d0 | 95 | { |
0866aca1 | 96 | BusChild *kid; |
b5ea9327 | 97 | I2CSlaveClass *sc; |
2293c27f | 98 | I2CNode *node; |
d307c28c | 99 | bool bus_scanned = false; |
2293c27f | 100 | |
71ae65e5 | 101 | if (address == I2C_BROADCAST) { |
2293c27f FK |
102 | /* |
103 | * This is a broadcast, the current_devs will be all the devices of the | |
104 | * bus. | |
105 | */ | |
106 | bus->broadcast = true; | |
107 | } | |
0ff596d0 | 108 | |
0fa758c3 CM |
109 | /* |
110 | * If there are already devices in the list, that means we are in | |
111 | * the middle of a transaction and we shouldn't rescan the bus. | |
112 | * | |
113 | * This happens with any SMBus transaction, even on a pure I2C | |
114 | * device. The interface does a transaction start without | |
115 | * terminating the previous transaction. | |
116 | */ | |
117 | if (QLIST_EMPTY(&bus->current_devs)) { | |
118 | QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) { | |
119 | DeviceState *qdev = kid->child; | |
120 | I2CSlave *candidate = I2C_SLAVE(qdev); | |
121 | if ((candidate->address == address) || (bus->broadcast)) { | |
122 | node = g_malloc(sizeof(struct I2CNode)); | |
123 | node->elt = candidate; | |
124 | QLIST_INSERT_HEAD(&bus->current_devs, node, next); | |
125 | if (!bus->broadcast) { | |
126 | break; | |
127 | } | |
2293c27f | 128 | } |
b3a21988 | 129 | } |
d307c28c | 130 | bus_scanned = true; |
0ff596d0 PB |
131 | } |
132 | ||
2293c27f | 133 | if (QLIST_EMPTY(&bus->current_devs)) { |
0ff596d0 | 134 | return 1; |
b5ea9327 | 135 | } |
0ff596d0 | 136 | |
2293c27f | 137 | QLIST_FOREACH(node, &bus->current_devs, next) { |
08bb9b34 | 138 | I2CSlave *s = node->elt; |
d307c28c CM |
139 | int rv; |
140 | ||
08bb9b34 | 141 | sc = I2C_SLAVE_GET_CLASS(s); |
2293c27f FK |
142 | /* If the bus is already busy, assume this is a repeated |
143 | start condition. */ | |
d307c28c | 144 | |
2293c27f | 145 | if (sc->event) { |
08bb9b34 PMD |
146 | trace_i2c_event("start", s->address); |
147 | rv = sc->event(s, recv ? I2C_START_RECV : I2C_START_SEND); | |
d307c28c CM |
148 | if (rv && !bus->broadcast) { |
149 | if (bus_scanned) { | |
150 | /* First call, terminate the transfer. */ | |
151 | i2c_end_transfer(bus); | |
152 | } | |
153 | return rv; | |
154 | } | |
2293c27f | 155 | } |
b5ea9327 | 156 | } |
0ff596d0 PB |
157 | return 0; |
158 | } | |
159 | ||
a5c82852 | 160 | void i2c_end_transfer(I2CBus *bus) |
0ff596d0 | 161 | { |
b5ea9327 | 162 | I2CSlaveClass *sc; |
2293c27f | 163 | I2CNode *node, *next; |
0ff596d0 | 164 | |
2293c27f | 165 | QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) { |
08bb9b34 PMD |
166 | I2CSlave *s = node->elt; |
167 | sc = I2C_SLAVE_GET_CLASS(s); | |
2293c27f | 168 | if (sc->event) { |
08bb9b34 PMD |
169 | trace_i2c_event("finish", s->address); |
170 | sc->event(s, I2C_FINISH); | |
2293c27f FK |
171 | } |
172 | QLIST_REMOVE(node, next); | |
173 | g_free(node); | |
b5ea9327 | 174 | } |
2293c27f | 175 | bus->broadcast = false; |
0ff596d0 PB |
176 | } |
177 | ||
056fca7b | 178 | int i2c_send_recv(I2CBus *bus, uint8_t *data, bool send) |
0ff596d0 | 179 | { |
b5ea9327 | 180 | I2CSlaveClass *sc; |
08bb9b34 | 181 | I2CSlave *s; |
2293c27f FK |
182 | I2CNode *node; |
183 | int ret = 0; | |
184 | ||
056fca7b PC |
185 | if (send) { |
186 | QLIST_FOREACH(node, &bus->current_devs, next) { | |
08bb9b34 PMD |
187 | s = node->elt; |
188 | sc = I2C_SLAVE_GET_CLASS(s); | |
056fca7b | 189 | if (sc->send) { |
08bb9b34 PMD |
190 | trace_i2c_send(s->address, *data); |
191 | ret = ret || sc->send(s, *data); | |
056fca7b PC |
192 | } else { |
193 | ret = -1; | |
194 | } | |
195 | } | |
196 | return ret ? -1 : 0; | |
197 | } else { | |
2ac4c5f4 CM |
198 | ret = 0xff; |
199 | if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) { | |
200 | sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt); | |
201 | if (sc->recv) { | |
202 | s = QLIST_FIRST(&bus->current_devs)->elt; | |
203 | ret = sc->recv(s); | |
204 | trace_i2c_recv(s->address, ret); | |
056fca7b PC |
205 | } |
206 | } | |
2ac4c5f4 CM |
207 | *data = ret; |
208 | return 0; | |
b5ea9327 | 209 | } |
0ff596d0 PB |
210 | } |
211 | ||
056fca7b | 212 | int i2c_send(I2CBus *bus, uint8_t data) |
0ff596d0 | 213 | { |
056fca7b PC |
214 | return i2c_send_recv(bus, &data, true); |
215 | } | |
0ff596d0 | 216 | |
2ac4c5f4 | 217 | uint8_t i2c_recv(I2CBus *bus) |
056fca7b | 218 | { |
2ac4c5f4 | 219 | uint8_t data = 0xff; |
b5ea9327 | 220 | |
2ac4c5f4 CM |
221 | i2c_send_recv(bus, &data, false); |
222 | return data; | |
0ff596d0 PB |
223 | } |
224 | ||
a5c82852 | 225 | void i2c_nack(I2CBus *bus) |
0ff596d0 | 226 | { |
b5ea9327 | 227 | I2CSlaveClass *sc; |
2293c27f | 228 | I2CNode *node; |
0ff596d0 | 229 | |
2293c27f | 230 | if (QLIST_EMPTY(&bus->current_devs)) { |
0ff596d0 | 231 | return; |
b5ea9327 | 232 | } |
0ff596d0 | 233 | |
2293c27f FK |
234 | QLIST_FOREACH(node, &bus->current_devs, next) { |
235 | sc = I2C_SLAVE_GET_CLASS(node->elt); | |
236 | if (sc->event) { | |
08bb9b34 | 237 | trace_i2c_event("nack", node->elt->address); |
2293c27f FK |
238 | sc->event(node->elt, I2C_NACK); |
239 | } | |
b5ea9327 | 240 | } |
0ff596d0 PB |
241 | } |
242 | ||
bcbe8068 | 243 | static int i2c_slave_post_load(void *opaque, int version_id) |
aa941b94 | 244 | { |
9e07bdf8 | 245 | I2CSlave *dev = opaque; |
a5c82852 | 246 | I2CBus *bus; |
2293c27f FK |
247 | I2CNode *node; |
248 | ||
fef7fbc9 | 249 | bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev))); |
71ae65e5 IM |
250 | if ((bus->saved_address == dev->address) || |
251 | (bus->saved_address == I2C_BROADCAST)) { | |
2293c27f FK |
252 | node = g_malloc(sizeof(struct I2CNode)); |
253 | node->elt = dev; | |
254 | QLIST_INSERT_HEAD(&bus->current_devs, node, next); | |
fe8de492 | 255 | } |
bcbe8068 JQ |
256 | return 0; |
257 | } | |
258 | ||
1894839f | 259 | const VMStateDescription vmstate_i2c_slave = { |
9e07bdf8 | 260 | .name = "I2CSlave", |
bcbe8068 JQ |
261 | .version_id = 1, |
262 | .minimum_version_id = 1, | |
bcbe8068 | 263 | .post_load = i2c_slave_post_load, |
35d08458 | 264 | .fields = (VMStateField[]) { |
9e07bdf8 | 265 | VMSTATE_UINT8(address, I2CSlave), |
bcbe8068 JQ |
266 | VMSTATE_END_OF_LIST() |
267 | } | |
268 | }; | |
269 | ||
db437ca6 | 270 | I2CSlave *i2c_slave_new(const char *name, uint8_t addr) |
fe8de492 PB |
271 | { |
272 | DeviceState *dev; | |
273 | ||
3e80f690 | 274 | dev = qdev_new(name); |
5b7f5327 | 275 | qdev_prop_set_uint8(dev, "address", addr); |
db437ca6 | 276 | return I2C_SLAVE(dev); |
d88c42ff PMD |
277 | } |
278 | ||
279 | bool i2c_realize_and_unref(DeviceState *dev, I2CBus *bus, Error **errp) | |
280 | { | |
281 | return qdev_realize_and_unref(dev, &bus->qbus, errp); | |
282 | } | |
283 | ||
284 | DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr) | |
285 | { | |
db437ca6 | 286 | I2CSlave *dev = i2c_slave_new(name, addr); |
d88c42ff | 287 | |
db437ca6 | 288 | i2c_realize_and_unref(DEVICE(dev), bus, &error_fatal); |
d88c42ff | 289 | |
db437ca6 | 290 | return DEVICE(dev); |
aa941b94 | 291 | } |
b5ea9327 | 292 | |
39bffca2 AL |
293 | static void i2c_slave_class_init(ObjectClass *klass, void *data) |
294 | { | |
295 | DeviceClass *k = DEVICE_CLASS(klass); | |
125ee0ed | 296 | set_bit(DEVICE_CATEGORY_MISC, k->categories); |
0d936928 | 297 | k->bus_type = TYPE_I2C_BUS; |
4f67d30b | 298 | device_class_set_props(k, i2c_props); |
39bffca2 AL |
299 | } |
300 | ||
8c43a6f0 | 301 | static const TypeInfo i2c_slave_type_info = { |
b5ea9327 AL |
302 | .name = TYPE_I2C_SLAVE, |
303 | .parent = TYPE_DEVICE, | |
304 | .instance_size = sizeof(I2CSlave), | |
305 | .abstract = true, | |
306 | .class_size = sizeof(I2CSlaveClass), | |
39bffca2 | 307 | .class_init = i2c_slave_class_init, |
b5ea9327 AL |
308 | }; |
309 | ||
83f7d43a | 310 | static void i2c_slave_register_types(void) |
b5ea9327 | 311 | { |
0d936928 | 312 | type_register_static(&i2c_bus_info); |
b5ea9327 AL |
313 | type_register_static(&i2c_slave_type_info); |
314 | } | |
315 | ||
83f7d43a | 316 | type_init(i2c_slave_register_types) |