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72c194f7 MT |
1 | /* Support for generating ACPI tables and passing them to Guests |
2 | * | |
3 | * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net> | |
4 | * Copyright (C) 2006 Fabrice Bellard | |
5 | * Copyright (C) 2013 Red Hat Inc | |
6 | * | |
7 | * Author: Michael S. Tsirkin <mst@redhat.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | ||
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | ||
19 | * You should have received a copy of the GNU General Public License along | |
20 | * with this program; if not, see <http://www.gnu.org/licenses/>. | |
21 | */ | |
22 | ||
23 | #include "acpi-build.h" | |
24 | #include <stddef.h> | |
25 | #include <glib.h> | |
26 | #include "qemu-common.h" | |
27 | #include "qemu/bitmap.h" | |
07fb6176 | 28 | #include "qemu/osdep.h" |
72c194f7 | 29 | #include "qemu/range.h" |
07fb6176 | 30 | #include "qemu/error-report.h" |
72c194f7 MT |
31 | #include "hw/pci/pci.h" |
32 | #include "qom/cpu.h" | |
33 | #include "hw/i386/pc.h" | |
34 | #include "target-i386/cpu.h" | |
35 | #include "hw/timer/hpet.h" | |
36 | #include "hw/i386/acpi-defs.h" | |
37 | #include "hw/acpi/acpi.h" | |
38 | #include "hw/nvram/fw_cfg.h" | |
0058ae1d | 39 | #include "hw/acpi/bios-linker-loader.h" |
72c194f7 | 40 | #include "hw/loader.h" |
15bce1b7 | 41 | #include "hw/isa/isa.h" |
bef3492d | 42 | #include "hw/acpi/memory_hotplug.h" |
711b20b4 SB |
43 | #include "sysemu/tpm.h" |
44 | #include "hw/acpi/tpm.h" | |
72c194f7 MT |
45 | |
46 | /* Supported chipsets: */ | |
47 | #include "hw/acpi/piix4.h" | |
99fd437d | 48 | #include "hw/acpi/pcihp.h" |
72c194f7 MT |
49 | #include "hw/i386/ich9.h" |
50 | #include "hw/pci/pci_bus.h" | |
51 | #include "hw/pci-host/q35.h" | |
d4eb9119 | 52 | #include "hw/i386/intel_iommu.h" |
72c194f7 MT |
53 | |
54 | #include "hw/i386/q35-acpi-dsdt.hex" | |
55 | #include "hw/i386/acpi-dsdt.hex" | |
56 | ||
19934e0e IM |
57 | #include "hw/acpi/aml-build.h" |
58 | ||
72c194f7 MT |
59 | #include "qapi/qmp/qint.h" |
60 | #include "qom/qom-qobject.h" | |
ad5b88b1 | 61 | #include "exec/ram_addr.h" |
72c194f7 | 62 | |
07fb6176 PB |
63 | /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and |
64 | * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows | |
65 | * a little bit, there should be plenty of free space since the DSDT | |
66 | * shrunk by ~1.5k between QEMU 2.0 and QEMU 2.1. | |
67 | */ | |
68 | #define ACPI_BUILD_LEGACY_CPU_AML_SIZE 97 | |
69 | #define ACPI_BUILD_ALIGN_SIZE 0x1000 | |
70 | ||
868270f2 | 71 | #define ACPI_BUILD_TABLE_SIZE 0x20000 |
18045fb9 | 72 | |
a1666142 MT |
73 | /* Reserve RAM space for tables: add another order of magnitude. */ |
74 | #define ACPI_BUILD_TABLE_MAX_SIZE 0x200000 | |
75 | ||
8b310fc4 GA |
76 | /* #define DEBUG_ACPI_BUILD */ |
77 | #ifdef DEBUG_ACPI_BUILD | |
78 | #define ACPI_BUILD_DPRINTF(fmt, ...) \ | |
79 | do {printf("ACPI_BUILD: " fmt, ## __VA_ARGS__); } while (0) | |
80 | #else | |
81 | #define ACPI_BUILD_DPRINTF(fmt, ...) | |
82 | #endif | |
83 | ||
72c194f7 | 84 | typedef struct AcpiCpuInfo { |
798325ed | 85 | DECLARE_BITMAP(found_cpus, ACPI_CPU_HOTPLUG_ID_LIMIT); |
72c194f7 MT |
86 | } AcpiCpuInfo; |
87 | ||
88 | typedef struct AcpiMcfgInfo { | |
89 | uint64_t mcfg_base; | |
90 | uint32_t mcfg_size; | |
91 | } AcpiMcfgInfo; | |
92 | ||
93 | typedef struct AcpiPmInfo { | |
94 | bool s3_disabled; | |
95 | bool s4_disabled; | |
133a2da4 | 96 | bool pcihp_bridge_en; |
72c194f7 MT |
97 | uint8_t s4_val; |
98 | uint16_t sci_int; | |
99 | uint8_t acpi_enable_cmd; | |
100 | uint8_t acpi_disable_cmd; | |
101 | uint32_t gpe0_blk; | |
102 | uint32_t gpe0_blk_len; | |
103 | uint32_t io_base; | |
104 | } AcpiPmInfo; | |
105 | ||
106 | typedef struct AcpiMiscInfo { | |
107 | bool has_hpet; | |
711b20b4 | 108 | bool has_tpm; |
72c194f7 MT |
109 | DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX); |
110 | const unsigned char *dsdt_code; | |
111 | unsigned dsdt_size; | |
112 | uint16_t pvpanic_port; | |
113 | } AcpiMiscInfo; | |
114 | ||
99fd437d MT |
115 | typedef struct AcpiBuildPciBusHotplugState { |
116 | GArray *device_table; | |
117 | GArray *notify_table; | |
118 | struct AcpiBuildPciBusHotplugState *parent; | |
133a2da4 | 119 | bool pcihp_bridge_en; |
99fd437d MT |
120 | } AcpiBuildPciBusHotplugState; |
121 | ||
72c194f7 MT |
122 | static void acpi_get_dsdt(AcpiMiscInfo *info) |
123 | { | |
8977557a | 124 | uint16_t *applesmc_sta; |
72c194f7 MT |
125 | Object *piix = piix4_pm_find(); |
126 | Object *lpc = ich9_lpc_find(); | |
127 | assert(!!piix != !!lpc); | |
128 | ||
129 | if (piix) { | |
130 | info->dsdt_code = AcpiDsdtAmlCode; | |
131 | info->dsdt_size = sizeof AcpiDsdtAmlCode; | |
8977557a | 132 | applesmc_sta = piix_dsdt_applesmc_sta; |
72c194f7 MT |
133 | } |
134 | if (lpc) { | |
135 | info->dsdt_code = Q35AcpiDsdtAmlCode; | |
136 | info->dsdt_size = sizeof Q35AcpiDsdtAmlCode; | |
8977557a | 137 | applesmc_sta = q35_dsdt_applesmc_sta; |
72c194f7 | 138 | } |
15bce1b7 GS |
139 | |
140 | /* Patch in appropriate value for AppleSMC _STA */ | |
8977557a GS |
141 | *(uint8_t *)(info->dsdt_code + *applesmc_sta) = |
142 | applesmc_find() ? 0x0b : 0x00; | |
72c194f7 MT |
143 | } |
144 | ||
145 | static | |
146 | int acpi_add_cpu_info(Object *o, void *opaque) | |
147 | { | |
148 | AcpiCpuInfo *cpu = opaque; | |
149 | uint64_t apic_id; | |
150 | ||
151 | if (object_dynamic_cast(o, TYPE_CPU)) { | |
152 | apic_id = object_property_get_int(o, "apic-id", NULL); | |
798325ed | 153 | assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT); |
72c194f7 MT |
154 | |
155 | set_bit(apic_id, cpu->found_cpus); | |
156 | } | |
157 | ||
158 | object_child_foreach(o, acpi_add_cpu_info, opaque); | |
159 | return 0; | |
160 | } | |
161 | ||
162 | static void acpi_get_cpu_info(AcpiCpuInfo *cpu) | |
163 | { | |
164 | Object *root = object_get_root(); | |
165 | ||
166 | memset(cpu->found_cpus, 0, sizeof cpu->found_cpus); | |
167 | object_child_foreach(root, acpi_add_cpu_info, cpu); | |
168 | } | |
169 | ||
170 | static void acpi_get_pm_info(AcpiPmInfo *pm) | |
171 | { | |
172 | Object *piix = piix4_pm_find(); | |
173 | Object *lpc = ich9_lpc_find(); | |
174 | Object *obj = NULL; | |
175 | QObject *o; | |
176 | ||
177 | if (piix) { | |
178 | obj = piix; | |
179 | } | |
180 | if (lpc) { | |
181 | obj = lpc; | |
182 | } | |
183 | assert(obj); | |
184 | ||
185 | /* Fill in optional s3/s4 related properties */ | |
186 | o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); | |
187 | if (o) { | |
188 | pm->s3_disabled = qint_get_int(qobject_to_qint(o)); | |
189 | } else { | |
190 | pm->s3_disabled = false; | |
191 | } | |
097a97a6 | 192 | qobject_decref(o); |
72c194f7 MT |
193 | o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL); |
194 | if (o) { | |
195 | pm->s4_disabled = qint_get_int(qobject_to_qint(o)); | |
196 | } else { | |
197 | pm->s4_disabled = false; | |
198 | } | |
097a97a6 | 199 | qobject_decref(o); |
72c194f7 MT |
200 | o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL); |
201 | if (o) { | |
202 | pm->s4_val = qint_get_int(qobject_to_qint(o)); | |
203 | } else { | |
204 | pm->s4_val = false; | |
205 | } | |
097a97a6 | 206 | qobject_decref(o); |
72c194f7 MT |
207 | |
208 | /* Fill in mandatory properties */ | |
209 | pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL); | |
210 | ||
211 | pm->acpi_enable_cmd = object_property_get_int(obj, | |
212 | ACPI_PM_PROP_ACPI_ENABLE_CMD, | |
213 | NULL); | |
214 | pm->acpi_disable_cmd = object_property_get_int(obj, | |
215 | ACPI_PM_PROP_ACPI_DISABLE_CMD, | |
216 | NULL); | |
217 | pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE, | |
218 | NULL); | |
219 | pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK, | |
220 | NULL); | |
221 | pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN, | |
222 | NULL); | |
133a2da4 IM |
223 | pm->pcihp_bridge_en = |
224 | object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support", | |
225 | NULL); | |
72c194f7 MT |
226 | } |
227 | ||
72c194f7 MT |
228 | static void acpi_get_misc_info(AcpiMiscInfo *info) |
229 | { | |
230 | info->has_hpet = hpet_find(); | |
711b20b4 | 231 | info->has_tpm = tpm_find(); |
72c194f7 MT |
232 | info->pvpanic_port = pvpanic_port(); |
233 | } | |
234 | ||
235 | static void acpi_get_pci_info(PcPciInfo *info) | |
236 | { | |
237 | Object *pci_host; | |
238 | bool ambiguous; | |
239 | ||
240 | pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); | |
241 | g_assert(!ambiguous); | |
242 | g_assert(pci_host); | |
243 | ||
244 | info->w32.begin = object_property_get_int(pci_host, | |
245 | PCI_HOST_PROP_PCI_HOLE_START, | |
246 | NULL); | |
247 | info->w32.end = object_property_get_int(pci_host, | |
248 | PCI_HOST_PROP_PCI_HOLE_END, | |
249 | NULL); | |
250 | info->w64.begin = object_property_get_int(pci_host, | |
251 | PCI_HOST_PROP_PCI_HOLE64_START, | |
252 | NULL); | |
253 | info->w64.end = object_property_get_int(pci_host, | |
254 | PCI_HOST_PROP_PCI_HOLE64_END, | |
255 | NULL); | |
256 | } | |
257 | ||
258 | #define ACPI_BUILD_APPNAME "Bochs" | |
259 | #define ACPI_BUILD_APPNAME6 "BOCHS " | |
260 | #define ACPI_BUILD_APPNAME4 "BXPC" | |
261 | ||
72c194f7 MT |
262 | #define ACPI_BUILD_TABLE_FILE "etc/acpi/tables" |
263 | #define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp" | |
42a5b308 | 264 | #define ACPI_BUILD_TPMLOG_FILE "etc/tpm/log" |
72c194f7 MT |
265 | |
266 | static void | |
267 | build_header(GArray *linker, GArray *table_data, | |
821e3227 | 268 | AcpiTableHeader *h, const char *sig, int len, uint8_t rev) |
72c194f7 | 269 | { |
821e3227 | 270 | memcpy(&h->signature, sig, 4); |
72c194f7 MT |
271 | h->length = cpu_to_le32(len); |
272 | h->revision = rev; | |
273 | memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6); | |
274 | memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4); | |
821e3227 | 275 | memcpy(h->oem_table_id + 4, sig, 4); |
72c194f7 MT |
276 | h->oem_revision = cpu_to_le32(1); |
277 | memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4); | |
278 | h->asl_compiler_revision = cpu_to_le32(1); | |
279 | h->checksum = 0; | |
280 | /* Checksum to be filled in by Guest linker */ | |
281 | bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE, | |
282 | table_data->data, h, len, &h->checksum); | |
283 | } | |
284 | ||
99fd437d MT |
285 | static GArray *build_alloc_method(const char *name, uint8_t arg_count) |
286 | { | |
287 | GArray *method = build_alloc_array(); | |
288 | ||
eae8bded | 289 | build_append_namestring(method, "%s", name); |
99fd437d MT |
290 | build_append_byte(method, arg_count); /* MethodFlags: ArgCount */ |
291 | ||
292 | return method; | |
293 | } | |
294 | ||
295 | static void build_append_and_cleanup_method(GArray *device, GArray *method) | |
296 | { | |
297 | uint8_t op = 0x14; /* MethodOp */ | |
298 | ||
661875e9 | 299 | build_package(method, op); |
99fd437d MT |
300 | |
301 | build_append_array(device, method); | |
302 | build_free_array(method); | |
303 | } | |
304 | ||
305 | static void build_append_notify_target_ifequal(GArray *method, | |
306 | GArray *target_name, | |
307 | uint32_t value, int size) | |
72c194f7 MT |
308 | { |
309 | GArray *notify = build_alloc_array(); | |
310 | uint8_t op = 0xA0; /* IfOp */ | |
311 | ||
312 | build_append_byte(notify, 0x93); /* LEqualOp */ | |
313 | build_append_byte(notify, 0x68); /* Arg0Op */ | |
314 | build_append_value(notify, value, size); | |
315 | build_append_byte(notify, 0x86); /* NotifyOp */ | |
316 | build_append_array(notify, target_name); | |
317 | build_append_byte(notify, 0x69); /* Arg1Op */ | |
318 | ||
319 | /* Pack it up */ | |
661875e9 | 320 | build_package(notify, op); |
72c194f7 MT |
321 | |
322 | build_append_array(method, notify); | |
323 | ||
324 | build_free_array(notify); | |
325 | } | |
326 | ||
99fd437d | 327 | /* End here */ |
72c194f7 MT |
328 | #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */ |
329 | ||
330 | static inline void *acpi_data_push(GArray *table_data, unsigned size) | |
331 | { | |
332 | unsigned off = table_data->len; | |
333 | g_array_set_size(table_data, off + size); | |
334 | return table_data->data + off; | |
335 | } | |
336 | ||
337 | static unsigned acpi_data_len(GArray *table) | |
338 | { | |
134d42d6 | 339 | #if GLIB_CHECK_VERSION(2, 22, 0) |
b15654c2 MT |
340 | assert(g_array_get_element_size(table) == 1); |
341 | #endif | |
342 | return table->len; | |
72c194f7 MT |
343 | } |
344 | ||
345 | static void acpi_align_size(GArray *blob, unsigned align) | |
346 | { | |
347 | /* Align size to multiple of given size. This reduces the chance | |
348 | * we need to change size in the future (breaking cross version migration). | |
349 | */ | |
134d42d6 | 350 | g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align)); |
72c194f7 MT |
351 | } |
352 | ||
b4e5a4bf MT |
353 | /* Set a value within table in a safe manner */ |
354 | #define ACPI_BUILD_SET_LE(table, size, off, bits, val) \ | |
355 | do { \ | |
356 | uint64_t ACPI_BUILD_SET_LE_val = cpu_to_le64(val); \ | |
357 | memcpy(acpi_data_get_ptr(table, size, off, \ | |
358 | (bits) / BITS_PER_BYTE), \ | |
359 | &ACPI_BUILD_SET_LE_val, \ | |
360 | (bits) / BITS_PER_BYTE); \ | |
361 | } while (0) | |
72c194f7 MT |
362 | |
363 | static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size, | |
364 | unsigned off, unsigned size) | |
365 | { | |
366 | assert(off + size > off); | |
367 | assert(off + size <= table_size); | |
368 | return table_data + off; | |
369 | } | |
370 | ||
371 | static inline void acpi_add_table(GArray *table_offsets, GArray *table_data) | |
372 | { | |
373 | uint32_t offset = cpu_to_le32(table_data->len); | |
374 | g_array_append_val(table_offsets, offset); | |
375 | } | |
376 | ||
377 | /* FACS */ | |
378 | static void | |
379 | build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info) | |
380 | { | |
381 | AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs); | |
821e3227 | 382 | memcpy(&facs->signature, "FACS", 4); |
72c194f7 MT |
383 | facs->length = cpu_to_le32(sizeof(*facs)); |
384 | } | |
385 | ||
386 | /* Load chipset information in FADT */ | |
387 | static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm) | |
388 | { | |
389 | fadt->model = 1; | |
390 | fadt->reserved1 = 0; | |
391 | fadt->sci_int = cpu_to_le16(pm->sci_int); | |
392 | fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD); | |
393 | fadt->acpi_enable = pm->acpi_enable_cmd; | |
394 | fadt->acpi_disable = pm->acpi_disable_cmd; | |
395 | /* EVT, CNT, TMR offset matches hw/acpi/core.c */ | |
396 | fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base); | |
397 | fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04); | |
398 | fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08); | |
399 | fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk); | |
400 | /* EVT, CNT, TMR length matches hw/acpi/core.c */ | |
401 | fadt->pm1_evt_len = 4; | |
402 | fadt->pm1_cnt_len = 2; | |
403 | fadt->pm_tmr_len = 4; | |
404 | fadt->gpe0_blk_len = pm->gpe0_blk_len; | |
405 | fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */ | |
406 | fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */ | |
407 | fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) | | |
408 | (1 << ACPI_FADT_F_PROC_C1) | | |
409 | (1 << ACPI_FADT_F_SLP_BUTTON) | | |
410 | (1 << ACPI_FADT_F_RTC_S4)); | |
411 | fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK); | |
07b81ed9 HZ |
412 | /* APIC destination mode ("Flat Logical") has an upper limit of 8 CPUs |
413 | * For more than 8 CPUs, "Clustered Logical" mode has to be used | |
414 | */ | |
415 | if (max_cpus > 8) { | |
416 | fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL); | |
417 | } | |
72c194f7 MT |
418 | } |
419 | ||
420 | ||
421 | /* FADT */ | |
422 | static void | |
423 | build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm, | |
424 | unsigned facs, unsigned dsdt) | |
425 | { | |
426 | AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt)); | |
427 | ||
428 | fadt->firmware_ctrl = cpu_to_le32(facs); | |
429 | /* FACS address to be filled by Guest linker */ | |
430 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, | |
431 | ACPI_BUILD_TABLE_FILE, | |
432 | table_data, &fadt->firmware_ctrl, | |
433 | sizeof fadt->firmware_ctrl); | |
434 | ||
435 | fadt->dsdt = cpu_to_le32(dsdt); | |
436 | /* DSDT address to be filled by Guest linker */ | |
437 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, | |
438 | ACPI_BUILD_TABLE_FILE, | |
439 | table_data, &fadt->dsdt, | |
440 | sizeof fadt->dsdt); | |
441 | ||
442 | fadt_setup(fadt, pm); | |
443 | ||
444 | build_header(linker, table_data, | |
821e3227 | 445 | (void *)fadt, "FACP", sizeof(*fadt), 1); |
72c194f7 MT |
446 | } |
447 | ||
448 | static void | |
449 | build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu, | |
450 | PcGuestInfo *guest_info) | |
451 | { | |
452 | int madt_start = table_data->len; | |
453 | ||
454 | AcpiMultipleApicTable *madt; | |
455 | AcpiMadtIoApic *io_apic; | |
456 | AcpiMadtIntsrcovr *intsrcovr; | |
457 | AcpiMadtLocalNmi *local_nmi; | |
458 | int i; | |
459 | ||
460 | madt = acpi_data_push(table_data, sizeof *madt); | |
461 | madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS); | |
462 | madt->flags = cpu_to_le32(1); | |
463 | ||
464 | for (i = 0; i < guest_info->apic_id_limit; i++) { | |
465 | AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic); | |
466 | apic->type = ACPI_APIC_PROCESSOR; | |
467 | apic->length = sizeof(*apic); | |
468 | apic->processor_id = i; | |
469 | apic->local_apic_id = i; | |
470 | if (test_bit(i, cpu->found_cpus)) { | |
471 | apic->flags = cpu_to_le32(1); | |
472 | } else { | |
473 | apic->flags = cpu_to_le32(0); | |
474 | } | |
475 | } | |
476 | io_apic = acpi_data_push(table_data, sizeof *io_apic); | |
477 | io_apic->type = ACPI_APIC_IO; | |
478 | io_apic->length = sizeof(*io_apic); | |
479 | #define ACPI_BUILD_IOAPIC_ID 0x0 | |
480 | io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID; | |
481 | io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS); | |
482 | io_apic->interrupt = cpu_to_le32(0); | |
483 | ||
484 | if (guest_info->apic_xrupt_override) { | |
485 | intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); | |
486 | intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; | |
487 | intsrcovr->length = sizeof(*intsrcovr); | |
488 | intsrcovr->source = 0; | |
489 | intsrcovr->gsi = cpu_to_le32(2); | |
490 | intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */ | |
491 | } | |
492 | for (i = 1; i < 16; i++) { | |
493 | #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) | |
494 | if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) { | |
495 | /* No need for a INT source override structure. */ | |
496 | continue; | |
497 | } | |
498 | intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); | |
499 | intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; | |
500 | intsrcovr->length = sizeof(*intsrcovr); | |
501 | intsrcovr->source = i; | |
502 | intsrcovr->gsi = cpu_to_le32(i); | |
503 | intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */ | |
504 | } | |
505 | ||
506 | local_nmi = acpi_data_push(table_data, sizeof *local_nmi); | |
507 | local_nmi->type = ACPI_APIC_LOCAL_NMI; | |
508 | local_nmi->length = sizeof(*local_nmi); | |
509 | local_nmi->processor_id = 0xff; /* all processors */ | |
510 | local_nmi->flags = cpu_to_le16(0); | |
511 | local_nmi->lint = 1; /* ACPI_LINT1 */ | |
512 | ||
513 | build_header(linker, table_data, | |
821e3227 | 514 | (void *)(table_data->data + madt_start), "APIC", |
72c194f7 MT |
515 | table_data->len - madt_start, 1); |
516 | } | |
517 | ||
518 | /* Encode a hex value */ | |
519 | static inline char acpi_get_hex(uint32_t val) | |
520 | { | |
521 | val &= 0x0f; | |
522 | return (val <= 9) ? ('0' + val) : ('A' + val - 10); | |
523 | } | |
524 | ||
525 | #include "hw/i386/ssdt-proc.hex" | |
526 | ||
527 | /* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */ | |
528 | #define ACPI_PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2) | |
529 | #define ACPI_PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4) | |
530 | #define ACPI_PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start) | |
531 | #define ACPI_PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start) | |
532 | #define ACPI_PROC_AML (ssdp_proc_aml + *ssdt_proc_start) | |
533 | ||
534 | /* 0x5B 0x82 DeviceOp PkgLength NameString */ | |
535 | #define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1) | |
536 | #define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start) | |
537 | #define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start) | |
538 | #define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start) | |
539 | #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start) | |
540 | #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start) | |
541 | ||
8dcf525a MT |
542 | #define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1) |
543 | #define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start) | |
544 | #define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start) | |
545 | #define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start) | |
546 | ||
547 | #define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1) | |
548 | #define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start) | |
549 | #define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start) | |
550 | #define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start) | |
551 | ||
552 | #define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1) | |
553 | #define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start) | |
554 | #define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start) | |
555 | #define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start) | |
556 | ||
bef3492d IM |
557 | #include "hw/i386/ssdt-mem.hex" |
558 | ||
559 | /* 0x5B 0x82 DeviceOp PkgLength NameString DimmID */ | |
560 | #define ACPI_MEM_OFFSET_HEX (*ssdt_mem_name - *ssdt_mem_start + 2) | |
561 | #define ACPI_MEM_OFFSET_ID (*ssdt_mem_id - *ssdt_mem_start + 7) | |
562 | #define ACPI_MEM_SIZEOF (*ssdt_mem_end - *ssdt_mem_start) | |
563 | #define ACPI_MEM_AML (ssdm_mem_aml + *ssdt_mem_start) | |
564 | ||
72c194f7 MT |
565 | #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */ |
566 | #define ACPI_SSDT_HEADER_LENGTH 36 | |
567 | ||
568 | #include "hw/i386/ssdt-misc.hex" | |
569 | #include "hw/i386/ssdt-pcihp.hex" | |
711b20b4 | 570 | #include "hw/i386/ssdt-tpm.hex" |
72c194f7 MT |
571 | |
572 | static void | |
99fd437d MT |
573 | build_append_notify_method(GArray *device, const char *name, |
574 | const char *format, int count) | |
72c194f7 MT |
575 | { |
576 | int i; | |
99fd437d | 577 | GArray *method = build_alloc_method(name, 2); |
72c194f7 | 578 | |
99fd437d | 579 | for (i = 0; i < count; i++) { |
72c194f7 | 580 | GArray *target = build_alloc_array(); |
eae8bded | 581 | build_append_namestring(target, format, i); |
72c194f7 | 582 | assert(i < 256); /* Fits in 1 byte */ |
99fd437d | 583 | build_append_notify_target_ifequal(method, target, i, 1); |
72c194f7 MT |
584 | build_free_array(target); |
585 | } | |
72c194f7 | 586 | |
99fd437d | 587 | build_append_and_cleanup_method(device, method); |
72c194f7 MT |
588 | } |
589 | ||
99fd437d | 590 | static void patch_pcihp(int slot, uint8_t *ssdt_ptr) |
72c194f7 | 591 | { |
99fd437d MT |
592 | unsigned devfn = PCI_DEVFN(slot, 0); |
593 | ||
594 | ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
595 | ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
72c194f7 MT |
596 | ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot; |
597 | ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot; | |
99fd437d MT |
598 | } |
599 | ||
8dcf525a MT |
600 | static void patch_pcinohp(int slot, uint8_t *ssdt_ptr) |
601 | { | |
602 | unsigned devfn = PCI_DEVFN(slot, 0); | |
603 | ||
604 | ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
605 | ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
606 | ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot; | |
607 | } | |
608 | ||
609 | static void patch_pcivga(int slot, uint8_t *ssdt_ptr) | |
610 | { | |
611 | unsigned devfn = PCI_DEVFN(slot, 0); | |
612 | ||
613 | ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
614 | ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
615 | ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot; | |
616 | } | |
617 | ||
618 | static void patch_pciqxl(int slot, uint8_t *ssdt_ptr) | |
619 | { | |
620 | unsigned devfn = PCI_DEVFN(slot, 0); | |
621 | ||
622 | ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
623 | ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
624 | ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot; | |
625 | } | |
626 | ||
99fd437d MT |
627 | /* Assign BSEL property to all buses. In the future, this can be changed |
628 | * to only assign to buses that support hotplug. | |
629 | */ | |
630 | static void *acpi_set_bsel(PCIBus *bus, void *opaque) | |
631 | { | |
632 | unsigned *bsel_alloc = opaque; | |
633 | unsigned *bus_bsel; | |
634 | ||
39b888bd | 635 | if (qbus_is_hotpluggable(BUS(bus))) { |
99fd437d MT |
636 | bus_bsel = g_malloc(sizeof *bus_bsel); |
637 | ||
638 | *bus_bsel = (*bsel_alloc)++; | |
639 | object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, | |
640 | bus_bsel, NULL); | |
641 | } | |
642 | ||
643 | return bsel_alloc; | |
644 | } | |
645 | ||
646 | static void acpi_set_pci_info(void) | |
647 | { | |
648 | PCIBus *bus = find_i440fx(); /* TODO: Q35 support */ | |
649 | unsigned bsel_alloc = 0; | |
650 | ||
651 | if (bus) { | |
652 | /* Scan all PCI buses. Set property to enable acpi based hotplug. */ | |
653 | pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc); | |
654 | } | |
655 | } | |
656 | ||
657 | static void build_pci_bus_state_init(AcpiBuildPciBusHotplugState *state, | |
133a2da4 IM |
658 | AcpiBuildPciBusHotplugState *parent, |
659 | bool pcihp_bridge_en) | |
99fd437d MT |
660 | { |
661 | state->parent = parent; | |
662 | state->device_table = build_alloc_array(); | |
663 | state->notify_table = build_alloc_array(); | |
133a2da4 | 664 | state->pcihp_bridge_en = pcihp_bridge_en; |
99fd437d MT |
665 | } |
666 | ||
667 | static void build_pci_bus_state_cleanup(AcpiBuildPciBusHotplugState *state) | |
668 | { | |
669 | build_free_array(state->device_table); | |
670 | build_free_array(state->notify_table); | |
671 | } | |
672 | ||
673 | static void *build_pci_bus_begin(PCIBus *bus, void *parent_state) | |
674 | { | |
675 | AcpiBuildPciBusHotplugState *parent = parent_state; | |
676 | AcpiBuildPciBusHotplugState *child = g_malloc(sizeof *child); | |
677 | ||
133a2da4 | 678 | build_pci_bus_state_init(child, parent, parent->pcihp_bridge_en); |
99fd437d MT |
679 | |
680 | return child; | |
681 | } | |
682 | ||
683 | static void build_pci_bus_end(PCIBus *bus, void *bus_state) | |
684 | { | |
685 | AcpiBuildPciBusHotplugState *child = bus_state; | |
686 | AcpiBuildPciBusHotplugState *parent = child->parent; | |
687 | GArray *bus_table = build_alloc_array(); | |
688 | DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX); | |
8dcf525a MT |
689 | DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX); |
690 | DECLARE_BITMAP(slot_device_system, PCI_SLOT_MAX); | |
691 | DECLARE_BITMAP(slot_device_vga, PCI_SLOT_MAX); | |
692 | DECLARE_BITMAP(slot_device_qxl, PCI_SLOT_MAX); | |
99fd437d MT |
693 | uint8_t op; |
694 | int i; | |
695 | QObject *bsel; | |
696 | GArray *method; | |
697 | bool bus_hotplug_support = false; | |
698 | ||
133a2da4 | 699 | /* |
093a35e5 MT |
700 | * Skip bridge subtree creation if bridge hotplug is disabled |
701 | * to make acpi tables compatible with legacy machine types. | |
702 | */ | |
133a2da4 | 703 | if (!child->pcihp_bridge_en && bus->parent_dev) { |
16771613 MT |
704 | build_free_array(bus_table); |
705 | build_pci_bus_state_cleanup(child); | |
706 | g_free(child); | |
133a2da4 IM |
707 | return; |
708 | } | |
709 | ||
99fd437d MT |
710 | if (bus->parent_dev) { |
711 | op = 0x82; /* DeviceOp */ | |
eae8bded | 712 | build_append_namestring(bus_table, "S%.02X", |
99fd437d MT |
713 | bus->parent_dev->devfn); |
714 | build_append_byte(bus_table, 0x08); /* NameOp */ | |
eae8bded | 715 | build_append_namestring(bus_table, "_SUN"); |
99fd437d MT |
716 | build_append_value(bus_table, PCI_SLOT(bus->parent_dev->devfn), 1); |
717 | build_append_byte(bus_table, 0x08); /* NameOp */ | |
eae8bded | 718 | build_append_namestring(bus_table, "_ADR"); |
99fd437d MT |
719 | build_append_value(bus_table, (PCI_SLOT(bus->parent_dev->devfn) << 16) | |
720 | PCI_FUNC(bus->parent_dev->devfn), 4); | |
721 | } else { | |
722 | op = 0x10; /* ScopeOp */; | |
eae8bded | 723 | build_append_namestring(bus_table, "PCI0"); |
99fd437d | 724 | } |
72c194f7 | 725 | |
99fd437d MT |
726 | bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL); |
727 | if (bsel) { | |
728 | build_append_byte(bus_table, 0x08); /* NameOp */ | |
eae8bded | 729 | build_append_namestring(bus_table, "BSEL"); |
99fd437d | 730 | build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel))); |
99fd437d | 731 | memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable); |
8dcf525a MT |
732 | } else { |
733 | /* No bsel - no slots are hot-pluggable */ | |
734 | memset(slot_hotplug_enable, 0x00, sizeof slot_hotplug_enable); | |
735 | } | |
99fd437d | 736 | |
8dcf525a MT |
737 | memset(slot_device_present, 0x00, sizeof slot_device_present); |
738 | memset(slot_device_system, 0x00, sizeof slot_device_present); | |
739 | memset(slot_device_vga, 0x00, sizeof slot_device_vga); | |
740 | memset(slot_device_qxl, 0x00, sizeof slot_device_qxl); | |
99fd437d | 741 | |
8dcf525a MT |
742 | for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) { |
743 | DeviceClass *dc; | |
744 | PCIDeviceClass *pc; | |
745 | PCIDevice *pdev = bus->devices[i]; | |
746 | int slot = PCI_SLOT(i); | |
093a35e5 | 747 | bool bridge_in_acpi; |
99fd437d | 748 | |
8dcf525a MT |
749 | if (!pdev) { |
750 | continue; | |
751 | } | |
99fd437d | 752 | |
8dcf525a MT |
753 | set_bit(slot, slot_device_present); |
754 | pc = PCI_DEVICE_GET_CLASS(pdev); | |
755 | dc = DEVICE_GET_CLASS(pdev); | |
99fd437d | 756 | |
093a35e5 MT |
757 | /* When hotplug for bridges is enabled, bridges are |
758 | * described in ACPI separately (see build_pci_bus_end). | |
759 | * In this case they aren't themselves hot-pluggable. | |
760 | */ | |
761 | bridge_in_acpi = pc->is_bridge && child->pcihp_bridge_en; | |
762 | ||
763 | if (pc->class_id == PCI_CLASS_BRIDGE_ISA || bridge_in_acpi) { | |
8dcf525a | 764 | set_bit(slot, slot_device_system); |
99fd437d MT |
765 | } |
766 | ||
8dcf525a MT |
767 | if (pc->class_id == PCI_CLASS_DISPLAY_VGA) { |
768 | set_bit(slot, slot_device_vga); | |
769 | ||
770 | if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) { | |
771 | set_bit(slot, slot_device_qxl); | |
99fd437d MT |
772 | } |
773 | } | |
774 | ||
093a35e5 | 775 | if (!dc->hotpluggable || bridge_in_acpi) { |
8dcf525a MT |
776 | clear_bit(slot, slot_hotplug_enable); |
777 | } | |
778 | } | |
779 | ||
780 | /* Append Device object for each slot */ | |
781 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
782 | bool can_eject = test_bit(i, slot_hotplug_enable); | |
783 | bool present = test_bit(i, slot_device_present); | |
784 | bool vga = test_bit(i, slot_device_vga); | |
785 | bool qxl = test_bit(i, slot_device_qxl); | |
786 | bool system = test_bit(i, slot_device_system); | |
787 | if (can_eject) { | |
788 | void *pcihp = acpi_data_push(bus_table, | |
789 | ACPI_PCIHP_SIZEOF); | |
790 | memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); | |
791 | patch_pcihp(i, pcihp); | |
792 | bus_hotplug_support = true; | |
793 | } else if (qxl) { | |
794 | void *pcihp = acpi_data_push(bus_table, | |
795 | ACPI_PCIQXL_SIZEOF); | |
796 | memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF); | |
797 | patch_pciqxl(i, pcihp); | |
798 | } else if (vga) { | |
799 | void *pcihp = acpi_data_push(bus_table, | |
800 | ACPI_PCIVGA_SIZEOF); | |
801 | memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF); | |
802 | patch_pcivga(i, pcihp); | |
803 | } else if (system) { | |
b89834f4 | 804 | /* Nothing to do: system devices are in DSDT or in SSDT above. */ |
8dcf525a MT |
805 | } else if (present) { |
806 | void *pcihp = acpi_data_push(bus_table, | |
807 | ACPI_PCINOHP_SIZEOF); | |
808 | memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF); | |
809 | patch_pcinohp(i, pcihp); | |
810 | } | |
811 | } | |
812 | ||
813 | if (bsel) { | |
99fd437d MT |
814 | method = build_alloc_method("DVNT", 2); |
815 | ||
816 | for (i = 0; i < PCI_SLOT_MAX; i++) { | |
817 | GArray *notify; | |
818 | uint8_t op; | |
819 | ||
820 | if (!test_bit(i, slot_hotplug_enable)) { | |
821 | continue; | |
822 | } | |
823 | ||
824 | notify = build_alloc_array(); | |
825 | op = 0xA0; /* IfOp */ | |
826 | ||
827 | build_append_byte(notify, 0x7B); /* AndOp */ | |
828 | build_append_byte(notify, 0x68); /* Arg0Op */ | |
d9631b90 | 829 | build_append_int(notify, 0x1U << i); |
99fd437d MT |
830 | build_append_byte(notify, 0x00); /* NullName */ |
831 | build_append_byte(notify, 0x86); /* NotifyOp */ | |
eae8bded | 832 | build_append_namestring(notify, "S%.02X", PCI_DEVFN(i, 0)); |
99fd437d MT |
833 | build_append_byte(notify, 0x69); /* Arg1Op */ |
834 | ||
835 | /* Pack it up */ | |
661875e9 | 836 | build_package(notify, op); |
99fd437d MT |
837 | |
838 | build_append_array(method, notify); | |
839 | ||
840 | build_free_array(notify); | |
841 | } | |
842 | ||
843 | build_append_and_cleanup_method(bus_table, method); | |
844 | } | |
845 | ||
846 | /* Append PCNT method to notify about events on local and child buses. | |
847 | * Add unconditionally for root since DSDT expects it. | |
72c194f7 | 848 | */ |
99fd437d MT |
849 | if (bus_hotplug_support || child->notify_table->len || !bus->parent_dev) { |
850 | method = build_alloc_method("PCNT", 0); | |
851 | ||
852 | /* If bus supports hotplug select it and notify about local events */ | |
853 | if (bsel) { | |
854 | build_append_byte(method, 0x70); /* StoreOp */ | |
855 | build_append_int(method, qint_get_int(qobject_to_qint(bsel))); | |
eae8bded IM |
856 | build_append_namestring(method, "BNUM"); |
857 | build_append_namestring(method, "DVNT"); | |
858 | build_append_namestring(method, "PCIU"); | |
99fd437d | 859 | build_append_int(method, 1); /* Device Check */ |
eae8bded IM |
860 | build_append_namestring(method, "DVNT"); |
861 | build_append_namestring(method, "PCID"); | |
99fd437d MT |
862 | build_append_int(method, 3); /* Eject Request */ |
863 | } | |
864 | ||
865 | /* Notify about child bus events in any case */ | |
866 | build_append_array(method, child->notify_table); | |
867 | ||
868 | build_append_and_cleanup_method(bus_table, method); | |
869 | ||
870 | /* Append description of child buses */ | |
871 | build_append_array(bus_table, child->device_table); | |
872 | ||
873 | /* Pack it up */ | |
874 | if (bus->parent_dev) { | |
875 | build_extop_package(bus_table, op); | |
876 | } else { | |
661875e9 | 877 | build_package(bus_table, op); |
99fd437d | 878 | } |
72c194f7 | 879 | |
99fd437d MT |
880 | /* Append our bus description to parent table */ |
881 | build_append_array(parent->device_table, bus_table); | |
882 | ||
883 | /* Also tell parent how to notify us, invoking PCNT method. | |
884 | * At the moment this is not needed for root as we have a single root. | |
885 | */ | |
886 | if (bus->parent_dev) { | |
eae8bded IM |
887 | build_append_namestring(parent->notify_table, "^PCNT.S%.02X", |
888 | bus->parent_dev->devfn); | |
99fd437d | 889 | } |
72c194f7 | 890 | } |
99fd437d | 891 | |
097a97a6 | 892 | qobject_decref(bsel); |
99fd437d MT |
893 | build_free_array(bus_table); |
894 | build_pci_bus_state_cleanup(child); | |
895 | g_free(child); | |
72c194f7 MT |
896 | } |
897 | ||
898 | static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size) | |
899 | { | |
b4e5a4bf | 900 | ACPI_BUILD_SET_LE(start, size, acpi_pci32_start[0], 32, pci->w32.begin); |
72c194f7 | 901 | |
b4e5a4bf | 902 | ACPI_BUILD_SET_LE(start, size, acpi_pci32_end[0], 32, pci->w32.end - 1); |
72c194f7 MT |
903 | |
904 | if (pci->w64.end || pci->w64.begin) { | |
b4e5a4bf MT |
905 | ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 1); |
906 | ACPI_BUILD_SET_LE(start, size, acpi_pci64_start[0], 64, pci->w64.begin); | |
907 | ACPI_BUILD_SET_LE(start, size, acpi_pci64_end[0], 64, pci->w64.end - 1); | |
908 | ACPI_BUILD_SET_LE(start, size, acpi_pci64_length[0], 64, pci->w64.end - pci->w64.begin); | |
72c194f7 | 909 | } else { |
b4e5a4bf | 910 | ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 0); |
72c194f7 MT |
911 | } |
912 | } | |
913 | ||
914 | static void | |
915 | build_ssdt(GArray *table_data, GArray *linker, | |
916 | AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc, | |
917 | PcPciInfo *pci, PcGuestInfo *guest_info) | |
918 | { | |
bef3492d IM |
919 | MachineState *machine = MACHINE(qdev_get_machine()); |
920 | uint32_t nr_mem = machine->ram_slots; | |
2fd71f1b | 921 | unsigned acpi_cpus = guest_info->apic_id_limit; |
72c194f7 MT |
922 | int ssdt_start = table_data->len; |
923 | uint8_t *ssdt_ptr; | |
924 | int i; | |
925 | ||
2fd71f1b LE |
926 | /* The current AML generator can cover the APIC ID range [0..255], |
927 | * inclusive, for VCPU hotplug. */ | |
928 | QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256); | |
929 | g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT); | |
930 | ||
72c194f7 MT |
931 | /* Copy header and patch values in the S3_ / S4_ / S5_ packages */ |
932 | ssdt_ptr = acpi_data_push(table_data, sizeof(ssdp_misc_aml)); | |
933 | memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml)); | |
934 | if (pm->s3_disabled) { | |
935 | ssdt_ptr[acpi_s3_name[0]] = 'X'; | |
936 | } | |
937 | if (pm->s4_disabled) { | |
938 | ssdt_ptr[acpi_s4_name[0]] = 'X'; | |
939 | } else { | |
940 | ssdt_ptr[acpi_s4_pkg[0] + 1] = ssdt_ptr[acpi_s4_pkg[0] + 3] = | |
941 | pm->s4_val; | |
942 | } | |
943 | ||
944 | patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml)); | |
945 | ||
eee822e3 MT |
946 | ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml), |
947 | ssdt_isa_pest[0], 16, misc->pvpanic_port); | |
72c194f7 | 948 | |
bef3492d IM |
949 | ACPI_BUILD_SET_LE(ssdt_ptr, sizeof(ssdp_misc_aml), |
950 | ssdt_mctrl_nr_slots[0], 32, nr_mem); | |
951 | ||
72c194f7 MT |
952 | { |
953 | GArray *sb_scope = build_alloc_array(); | |
954 | uint8_t op = 0x10; /* ScopeOp */ | |
955 | ||
eae8bded | 956 | build_append_namestring(sb_scope, "_SB"); |
72c194f7 MT |
957 | |
958 | /* build Processor object for each processor */ | |
959 | for (i = 0; i < acpi_cpus; i++) { | |
960 | uint8_t *proc = acpi_data_push(sb_scope, ACPI_PROC_SIZEOF); | |
961 | memcpy(proc, ACPI_PROC_AML, ACPI_PROC_SIZEOF); | |
962 | proc[ACPI_PROC_OFFSET_CPUHEX] = acpi_get_hex(i >> 4); | |
963 | proc[ACPI_PROC_OFFSET_CPUHEX+1] = acpi_get_hex(i); | |
964 | proc[ACPI_PROC_OFFSET_CPUID1] = i; | |
965 | proc[ACPI_PROC_OFFSET_CPUID2] = i; | |
966 | } | |
967 | ||
968 | /* build this code: | |
969 | * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...} | |
970 | */ | |
971 | /* Arg0 = Processor ID = APIC ID */ | |
99fd437d | 972 | build_append_notify_method(sb_scope, "NTFY", "CP%0.02X", acpi_cpus); |
72c194f7 MT |
973 | |
974 | /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" */ | |
975 | build_append_byte(sb_scope, 0x08); /* NameOp */ | |
eae8bded | 976 | build_append_namestring(sb_scope, "CPON"); |
72c194f7 MT |
977 | |
978 | { | |
979 | GArray *package = build_alloc_array(); | |
b4f4d548 MT |
980 | uint8_t op; |
981 | ||
982 | /* | |
983 | * Note: The ability to create variable-sized packages was first introduced in ACPI 2.0. ACPI 1.0 only | |
984 | * allowed fixed-size packages with up to 255 elements. | |
985 | * Windows guests up to win2k8 fail when VarPackageOp is used. | |
986 | */ | |
987 | if (acpi_cpus <= 255) { | |
988 | op = 0x12; /* PackageOp */ | |
989 | build_append_byte(package, acpi_cpus); /* NumElements */ | |
990 | } else { | |
991 | op = 0x13; /* VarPackageOp */ | |
992 | build_append_int(package, acpi_cpus); /* VarNumElements */ | |
993 | } | |
72c194f7 | 994 | |
72c194f7 MT |
995 | for (i = 0; i < acpi_cpus; i++) { |
996 | uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00; | |
997 | build_append_byte(package, b); | |
998 | } | |
999 | ||
661875e9 | 1000 | build_package(package, op); |
72c194f7 MT |
1001 | build_append_array(sb_scope, package); |
1002 | build_free_array(package); | |
1003 | } | |
1004 | ||
bef3492d IM |
1005 | if (nr_mem) { |
1006 | assert(nr_mem <= ACPI_MAX_RAM_SLOTS); | |
1007 | /* build memory devices */ | |
1008 | for (i = 0; i < nr_mem; i++) { | |
1009 | char id[3]; | |
1010 | uint8_t *mem = acpi_data_push(sb_scope, ACPI_MEM_SIZEOF); | |
1011 | ||
1012 | snprintf(id, sizeof(id), "%02X", i); | |
1013 | memcpy(mem, ACPI_MEM_AML, ACPI_MEM_SIZEOF); | |
1014 | memcpy(mem + ACPI_MEM_OFFSET_HEX, id, 2); | |
1015 | memcpy(mem + ACPI_MEM_OFFSET_ID, id, 2); | |
1016 | } | |
1017 | ||
1018 | /* build Method(MEMORY_SLOT_NOTIFY_METHOD, 2) { | |
1019 | * If (LEqual(Arg0, 0x00)) {Notify(MP00, Arg1)} ... | |
1020 | */ | |
1021 | build_append_notify_method(sb_scope, | |
1022 | stringify(MEMORY_SLOT_NOTIFY_METHOD), | |
1023 | "MP%0.02X", nr_mem); | |
1024 | } | |
1025 | ||
72c194f7 | 1026 | { |
99fd437d | 1027 | AcpiBuildPciBusHotplugState hotplug_state; |
8dcf525a MT |
1028 | Object *pci_host; |
1029 | PCIBus *bus = NULL; | |
1030 | bool ambiguous; | |
1031 | ||
1032 | pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); | |
1033 | if (!ambiguous && pci_host) { | |
1034 | bus = PCI_HOST_BRIDGE(pci_host)->bus; | |
1035 | } | |
72c194f7 | 1036 | |
133a2da4 | 1037 | build_pci_bus_state_init(&hotplug_state, NULL, pm->pcihp_bridge_en); |
72c194f7 | 1038 | |
99fd437d MT |
1039 | if (bus) { |
1040 | /* Scan all PCI buses. Generate tables to support hotplug. */ | |
1041 | pci_for_each_bus_depth_first(bus, build_pci_bus_begin, | |
1042 | build_pci_bus_end, &hotplug_state); | |
72c194f7 MT |
1043 | } |
1044 | ||
99fd437d MT |
1045 | build_append_array(sb_scope, hotplug_state.device_table); |
1046 | build_pci_bus_state_cleanup(&hotplug_state); | |
72c194f7 | 1047 | } |
661875e9 | 1048 | build_package(sb_scope, op); |
72c194f7 MT |
1049 | build_append_array(table_data, sb_scope); |
1050 | build_free_array(sb_scope); | |
1051 | } | |
1052 | ||
1053 | build_header(linker, table_data, | |
1054 | (void *)(table_data->data + ssdt_start), | |
821e3227 | 1055 | "SSDT", table_data->len - ssdt_start, 1); |
72c194f7 MT |
1056 | } |
1057 | ||
1058 | static void | |
1059 | build_hpet(GArray *table_data, GArray *linker) | |
1060 | { | |
1061 | Acpi20Hpet *hpet; | |
1062 | ||
1063 | hpet = acpi_data_push(table_data, sizeof(*hpet)); | |
1064 | /* Note timer_block_id value must be kept in sync with value advertised by | |
1065 | * emulated hpet | |
1066 | */ | |
1067 | hpet->timer_block_id = cpu_to_le32(0x8086a201); | |
1068 | hpet->addr.address = cpu_to_le64(HPET_BASE); | |
1069 | build_header(linker, table_data, | |
821e3227 | 1070 | (void *)hpet, "HPET", sizeof(*hpet), 1); |
72c194f7 MT |
1071 | } |
1072 | ||
711b20b4 | 1073 | static void |
42a5b308 | 1074 | build_tpm_tcpa(GArray *table_data, GArray *linker, GArray *tcpalog) |
711b20b4 SB |
1075 | { |
1076 | Acpi20Tcpa *tcpa = acpi_data_push(table_data, sizeof *tcpa); | |
42a5b308 | 1077 | uint64_t log_area_start_address = acpi_data_len(tcpalog); |
711b20b4 SB |
1078 | |
1079 | tcpa->platform_class = cpu_to_le16(TPM_TCPA_ACPI_CLASS_CLIENT); | |
1080 | tcpa->log_area_minimum_length = cpu_to_le32(TPM_LOG_AREA_MINIMUM_SIZE); | |
1081 | tcpa->log_area_start_address = cpu_to_le64(log_area_start_address); | |
1082 | ||
42a5b308 SB |
1083 | bios_linker_loader_alloc(linker, ACPI_BUILD_TPMLOG_FILE, 1, |
1084 | false /* high memory */); | |
1085 | ||
711b20b4 SB |
1086 | /* log area start address to be filled by Guest linker */ |
1087 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, | |
42a5b308 | 1088 | ACPI_BUILD_TPMLOG_FILE, |
711b20b4 SB |
1089 | table_data, &tcpa->log_area_start_address, |
1090 | sizeof(tcpa->log_area_start_address)); | |
1091 | ||
1092 | build_header(linker, table_data, | |
1093 | (void *)tcpa, "TCPA", sizeof(*tcpa), 2); | |
1094 | ||
42a5b308 | 1095 | acpi_data_push(tcpalog, TPM_LOG_AREA_MINIMUM_SIZE); |
711b20b4 SB |
1096 | } |
1097 | ||
1098 | static void | |
1099 | build_tpm_ssdt(GArray *table_data, GArray *linker) | |
1100 | { | |
1101 | void *tpm_ptr; | |
1102 | ||
1103 | tpm_ptr = acpi_data_push(table_data, sizeof(ssdt_tpm_aml)); | |
1104 | memcpy(tpm_ptr, ssdt_tpm_aml, sizeof(ssdt_tpm_aml)); | |
1105 | } | |
1106 | ||
04ed3ea8 IM |
1107 | typedef enum { |
1108 | MEM_AFFINITY_NOFLAGS = 0, | |
1109 | MEM_AFFINITY_ENABLED = (1 << 0), | |
1110 | MEM_AFFINITY_HOTPLUGGABLE = (1 << 1), | |
1111 | MEM_AFFINITY_NON_VOLATILE = (1 << 2), | |
1112 | } MemoryAffinityFlags; | |
1113 | ||
72c194f7 | 1114 | static void |
04ed3ea8 IM |
1115 | acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, |
1116 | uint64_t len, int node, MemoryAffinityFlags flags) | |
72c194f7 MT |
1117 | { |
1118 | numamem->type = ACPI_SRAT_MEMORY; | |
1119 | numamem->length = sizeof(*numamem); | |
1120 | memset(numamem->proximity, 0, 4); | |
1121 | numamem->proximity[0] = node; | |
04ed3ea8 | 1122 | numamem->flags = cpu_to_le32(flags); |
72c194f7 MT |
1123 | numamem->base_addr = cpu_to_le64(base); |
1124 | numamem->range_length = cpu_to_le64(len); | |
1125 | } | |
1126 | ||
1127 | static void | |
dd0247e0 | 1128 | build_srat(GArray *table_data, GArray *linker, PcGuestInfo *guest_info) |
72c194f7 MT |
1129 | { |
1130 | AcpiSystemResourceAffinityTable *srat; | |
1131 | AcpiSratProcessorAffinity *core; | |
1132 | AcpiSratMemoryAffinity *numamem; | |
1133 | ||
1134 | int i; | |
1135 | uint64_t curnode; | |
1136 | int srat_start, numa_start, slots; | |
1137 | uint64_t mem_len, mem_base, next_base; | |
cec65193 IM |
1138 | PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); |
1139 | ram_addr_t hotplugabble_address_space_size = | |
1140 | object_property_get_int(OBJECT(pcms), PC_MACHINE_MEMHP_REGION_SIZE, | |
1141 | NULL); | |
72c194f7 MT |
1142 | |
1143 | srat_start = table_data->len; | |
1144 | ||
1145 | srat = acpi_data_push(table_data, sizeof *srat); | |
1146 | srat->reserved1 = cpu_to_le32(1); | |
1147 | core = (void *)(srat + 1); | |
1148 | ||
1149 | for (i = 0; i < guest_info->apic_id_limit; ++i) { | |
1150 | core = acpi_data_push(table_data, sizeof *core); | |
1151 | core->type = ACPI_SRAT_PROCESSOR; | |
1152 | core->length = sizeof(*core); | |
1153 | core->local_apic_id = i; | |
1154 | curnode = guest_info->node_cpu[i]; | |
1155 | core->proximity_lo = curnode; | |
1156 | memset(core->proximity_hi, 0, 3); | |
1157 | core->local_sapic_eid = 0; | |
dd0247e0 | 1158 | core->flags = cpu_to_le32(1); |
72c194f7 MT |
1159 | } |
1160 | ||
1161 | ||
1162 | /* the memory map is a bit tricky, it contains at least one hole | |
1163 | * from 640k-1M and possibly another one from 3.5G-4G. | |
1164 | */ | |
1165 | next_base = 0; | |
1166 | numa_start = table_data->len; | |
1167 | ||
1168 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 | 1169 | acpi_build_srat_memory(numamem, 0, 640*1024, 0, MEM_AFFINITY_ENABLED); |
72c194f7 MT |
1170 | next_base = 1024 * 1024; |
1171 | for (i = 1; i < guest_info->numa_nodes + 1; ++i) { | |
1172 | mem_base = next_base; | |
1173 | mem_len = guest_info->node_mem[i - 1]; | |
1174 | if (i == 1) { | |
1175 | mem_len -= 1024 * 1024; | |
1176 | } | |
1177 | next_base = mem_base + mem_len; | |
1178 | ||
1179 | /* Cut out the ACPI_PCI hole */ | |
4c8a949b EH |
1180 | if (mem_base <= guest_info->ram_size_below_4g && |
1181 | next_base > guest_info->ram_size_below_4g) { | |
1182 | mem_len -= next_base - guest_info->ram_size_below_4g; | |
72c194f7 MT |
1183 | if (mem_len > 0) { |
1184 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 IM |
1185 | acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, |
1186 | MEM_AFFINITY_ENABLED); | |
72c194f7 MT |
1187 | } |
1188 | mem_base = 1ULL << 32; | |
4c8a949b EH |
1189 | mem_len = next_base - guest_info->ram_size_below_4g; |
1190 | next_base += (1ULL << 32) - guest_info->ram_size_below_4g; | |
72c194f7 MT |
1191 | } |
1192 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 IM |
1193 | acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, |
1194 | MEM_AFFINITY_ENABLED); | |
72c194f7 MT |
1195 | } |
1196 | slots = (table_data->len - numa_start) / sizeof *numamem; | |
1197 | for (; slots < guest_info->numa_nodes + 2; slots++) { | |
1198 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 | 1199 | acpi_build_srat_memory(numamem, 0, 0, 0, MEM_AFFINITY_NOFLAGS); |
72c194f7 MT |
1200 | } |
1201 | ||
cec65193 IM |
1202 | /* |
1203 | * Entry is required for Windows to enable memory hotplug in OS. | |
1204 | * Memory devices may override proximity set by this entry, | |
1205 | * providing _PXM method if necessary. | |
1206 | */ | |
1207 | if (hotplugabble_address_space_size) { | |
1208 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
1209 | acpi_build_srat_memory(numamem, pcms->hotplug_memory_base, | |
1210 | hotplugabble_address_space_size, 0, | |
1211 | MEM_AFFINITY_HOTPLUGGABLE | | |
1212 | MEM_AFFINITY_ENABLED); | |
1213 | } | |
1214 | ||
72c194f7 MT |
1215 | build_header(linker, table_data, |
1216 | (void *)(table_data->data + srat_start), | |
821e3227 | 1217 | "SRAT", |
72c194f7 MT |
1218 | table_data->len - srat_start, 1); |
1219 | } | |
1220 | ||
1221 | static void | |
1222 | build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info) | |
1223 | { | |
1224 | AcpiTableMcfg *mcfg; | |
821e3227 | 1225 | const char *sig; |
72c194f7 MT |
1226 | int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); |
1227 | ||
1228 | mcfg = acpi_data_push(table_data, len); | |
1229 | mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base); | |
1230 | /* Only a single allocation so no need to play with segments */ | |
1231 | mcfg->allocation[0].pci_segment = cpu_to_le16(0); | |
1232 | mcfg->allocation[0].start_bus_number = 0; | |
1233 | mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1); | |
1234 | ||
1235 | /* MCFG is used for ECAM which can be enabled or disabled by guest. | |
1236 | * To avoid table size changes (which create migration issues), | |
1237 | * always create the table even if there are no allocations, | |
1238 | * but set the signature to a reserved value in this case. | |
1239 | * ACPI spec requires OSPMs to ignore such tables. | |
1240 | */ | |
1241 | if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) { | |
821e3227 MT |
1242 | /* Reserved signature: ignored by OSPM */ |
1243 | sig = "QEMU"; | |
72c194f7 | 1244 | } else { |
821e3227 | 1245 | sig = "MCFG"; |
72c194f7 MT |
1246 | } |
1247 | build_header(linker, table_data, (void *)mcfg, sig, len, 1); | |
1248 | } | |
1249 | ||
d4eb9119 LT |
1250 | static void |
1251 | build_dmar_q35(GArray *table_data, GArray *linker) | |
1252 | { | |
1253 | int dmar_start = table_data->len; | |
1254 | ||
1255 | AcpiTableDmar *dmar; | |
1256 | AcpiDmarHardwareUnit *drhd; | |
1257 | ||
1258 | dmar = acpi_data_push(table_data, sizeof(*dmar)); | |
1259 | dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1; | |
1260 | dmar->flags = 0; /* No intr_remap for now */ | |
1261 | ||
1262 | /* DMAR Remapping Hardware Unit Definition structure */ | |
1263 | drhd = acpi_data_push(table_data, sizeof(*drhd)); | |
1264 | drhd->type = cpu_to_le16(ACPI_DMAR_TYPE_HARDWARE_UNIT); | |
1265 | drhd->length = cpu_to_le16(sizeof(*drhd)); /* No device scope now */ | |
1266 | drhd->flags = ACPI_DMAR_INCLUDE_PCI_ALL; | |
1267 | drhd->pci_segment = cpu_to_le16(0); | |
1268 | drhd->address = cpu_to_le64(Q35_HOST_BRIDGE_IOMMU_ADDR); | |
1269 | ||
1270 | build_header(linker, table_data, (void *)(table_data->data + dmar_start), | |
1271 | "DMAR", table_data->len - dmar_start, 1); | |
1272 | } | |
1273 | ||
72c194f7 MT |
1274 | static void |
1275 | build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc) | |
1276 | { | |
53db092a MT |
1277 | AcpiTableHeader *dsdt; |
1278 | ||
72c194f7 | 1279 | assert(misc->dsdt_code && misc->dsdt_size); |
53db092a | 1280 | |
72c194f7 MT |
1281 | dsdt = acpi_data_push(table_data, misc->dsdt_size); |
1282 | memcpy(dsdt, misc->dsdt_code, misc->dsdt_size); | |
53db092a MT |
1283 | |
1284 | memset(dsdt, 0, sizeof *dsdt); | |
821e3227 | 1285 | build_header(linker, table_data, dsdt, "DSDT", |
53db092a | 1286 | misc->dsdt_size, 1); |
72c194f7 MT |
1287 | } |
1288 | ||
1289 | /* Build final rsdt table */ | |
1290 | static void | |
1291 | build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets) | |
1292 | { | |
1293 | AcpiRsdtDescriptorRev1 *rsdt; | |
1294 | size_t rsdt_len; | |
1295 | int i; | |
1296 | ||
1297 | rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len; | |
1298 | rsdt = acpi_data_push(table_data, rsdt_len); | |
1299 | memcpy(rsdt->table_offset_entry, table_offsets->data, | |
1300 | sizeof(uint32_t) * table_offsets->len); | |
1301 | for (i = 0; i < table_offsets->len; ++i) { | |
1302 | /* rsdt->table_offset_entry to be filled by Guest linker */ | |
1303 | bios_linker_loader_add_pointer(linker, | |
1304 | ACPI_BUILD_TABLE_FILE, | |
1305 | ACPI_BUILD_TABLE_FILE, | |
1306 | table_data, &rsdt->table_offset_entry[i], | |
1307 | sizeof(uint32_t)); | |
1308 | } | |
1309 | build_header(linker, table_data, | |
821e3227 | 1310 | (void *)rsdt, "RSDT", rsdt_len, 1); |
72c194f7 MT |
1311 | } |
1312 | ||
1313 | static GArray * | |
1314 | build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt) | |
1315 | { | |
1316 | AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp); | |
1317 | ||
d67aadcc | 1318 | bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 16, |
72c194f7 MT |
1319 | true /* fseg memory */); |
1320 | ||
821e3227 | 1321 | memcpy(&rsdp->signature, "RSD PTR ", 8); |
72c194f7 MT |
1322 | memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6); |
1323 | rsdp->rsdt_physical_address = cpu_to_le32(rsdt); | |
1324 | /* Address to be filled by Guest linker */ | |
1325 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE, | |
1326 | ACPI_BUILD_TABLE_FILE, | |
1327 | rsdp_table, &rsdp->rsdt_physical_address, | |
1328 | sizeof rsdp->rsdt_physical_address); | |
1329 | rsdp->checksum = 0; | |
1330 | /* Checksum to be filled by Guest linker */ | |
1331 | bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE, | |
1332 | rsdp, rsdp, sizeof *rsdp, &rsdp->checksum); | |
1333 | ||
1334 | return rsdp_table; | |
1335 | } | |
1336 | ||
1337 | typedef | |
1338 | struct AcpiBuildTables { | |
1339 | GArray *table_data; | |
1340 | GArray *rsdp; | |
42a5b308 | 1341 | GArray *tcpalog; |
72c194f7 MT |
1342 | GArray *linker; |
1343 | } AcpiBuildTables; | |
1344 | ||
1345 | static inline void acpi_build_tables_init(AcpiBuildTables *tables) | |
1346 | { | |
1347 | tables->rsdp = g_array_new(false, true /* clear */, 1); | |
1348 | tables->table_data = g_array_new(false, true /* clear */, 1); | |
42a5b308 | 1349 | tables->tcpalog = g_array_new(false, true /* clear */, 1); |
72c194f7 MT |
1350 | tables->linker = bios_linker_loader_init(); |
1351 | } | |
1352 | ||
1353 | static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre) | |
1354 | { | |
1355 | void *linker_data = bios_linker_loader_cleanup(tables->linker); | |
ac369a77 | 1356 | g_free(linker_data); |
72c194f7 | 1357 | g_array_free(tables->rsdp, mfre); |
ac369a77 | 1358 | g_array_free(tables->table_data, true); |
42a5b308 | 1359 | g_array_free(tables->tcpalog, mfre); |
72c194f7 MT |
1360 | } |
1361 | ||
1362 | typedef | |
1363 | struct AcpiBuildState { | |
1364 | /* Copy of table in RAM (for patching). */ | |
ad5b88b1 | 1365 | ram_addr_t table_ram; |
72c194f7 MT |
1366 | /* Is table patched? */ |
1367 | uint8_t patched; | |
1368 | PcGuestInfo *guest_info; | |
d70414a5 | 1369 | void *rsdp; |
42d85900 | 1370 | ram_addr_t rsdp_ram; |
6e00619b | 1371 | ram_addr_t linker_ram; |
72c194f7 MT |
1372 | } AcpiBuildState; |
1373 | ||
1374 | static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) | |
1375 | { | |
1376 | Object *pci_host; | |
1377 | QObject *o; | |
1378 | bool ambiguous; | |
1379 | ||
1380 | pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); | |
1381 | g_assert(!ambiguous); | |
1382 | g_assert(pci_host); | |
1383 | ||
1384 | o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL); | |
1385 | if (!o) { | |
1386 | return false; | |
1387 | } | |
1388 | mcfg->mcfg_base = qint_get_int(qobject_to_qint(o)); | |
097a97a6 | 1389 | qobject_decref(o); |
72c194f7 MT |
1390 | |
1391 | o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL); | |
1392 | assert(o); | |
1393 | mcfg->mcfg_size = qint_get_int(qobject_to_qint(o)); | |
097a97a6 | 1394 | qobject_decref(o); |
72c194f7 MT |
1395 | return true; |
1396 | } | |
1397 | ||
d4eb9119 LT |
1398 | static bool acpi_has_iommu(void) |
1399 | { | |
1400 | bool ambiguous; | |
1401 | Object *intel_iommu; | |
1402 | ||
1403 | intel_iommu = object_resolve_path_type("", TYPE_INTEL_IOMMU_DEVICE, | |
1404 | &ambiguous); | |
1405 | return intel_iommu && !ambiguous; | |
1406 | } | |
1407 | ||
72c194f7 MT |
1408 | static |
1409 | void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables) | |
1410 | { | |
1411 | GArray *table_offsets; | |
07fb6176 | 1412 | unsigned facs, ssdt, dsdt, rsdt; |
72c194f7 MT |
1413 | AcpiCpuInfo cpu; |
1414 | AcpiPmInfo pm; | |
1415 | AcpiMiscInfo misc; | |
1416 | AcpiMcfgInfo mcfg; | |
1417 | PcPciInfo pci; | |
1418 | uint8_t *u; | |
07fb6176 | 1419 | size_t aml_len = 0; |
72c194f7 MT |
1420 | |
1421 | acpi_get_cpu_info(&cpu); | |
1422 | acpi_get_pm_info(&pm); | |
1423 | acpi_get_dsdt(&misc); | |
72c194f7 MT |
1424 | acpi_get_misc_info(&misc); |
1425 | acpi_get_pci_info(&pci); | |
1426 | ||
1427 | table_offsets = g_array_new(false, true /* clear */, | |
1428 | sizeof(uint32_t)); | |
8b310fc4 | 1429 | ACPI_BUILD_DPRINTF("init ACPI tables\n"); |
72c194f7 MT |
1430 | |
1431 | bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE, | |
1432 | 64 /* Ensure FACS is aligned */, | |
1433 | false /* high memory */); | |
1434 | ||
1435 | /* | |
1436 | * FACS is pointed to by FADT. | |
1437 | * We place it first since it's the only table that has alignment | |
1438 | * requirements. | |
1439 | */ | |
1440 | facs = tables->table_data->len; | |
1441 | build_facs(tables->table_data, tables->linker, guest_info); | |
1442 | ||
1443 | /* DSDT is pointed to by FADT */ | |
1444 | dsdt = tables->table_data->len; | |
1445 | build_dsdt(tables->table_data, tables->linker, &misc); | |
1446 | ||
07fb6176 PB |
1447 | /* Count the size of the DSDT and SSDT, we will need it for legacy |
1448 | * sizing of ACPI tables. | |
1449 | */ | |
1450 | aml_len += tables->table_data->len - dsdt; | |
1451 | ||
72c194f7 MT |
1452 | /* ACPI tables pointed to by RSDT */ |
1453 | acpi_add_table(table_offsets, tables->table_data); | |
1454 | build_fadt(tables->table_data, tables->linker, &pm, facs, dsdt); | |
72c194f7 | 1455 | |
07fb6176 | 1456 | ssdt = tables->table_data->len; |
9ac1c4c0 | 1457 | acpi_add_table(table_offsets, tables->table_data); |
72c194f7 MT |
1458 | build_ssdt(tables->table_data, tables->linker, &cpu, &pm, &misc, &pci, |
1459 | guest_info); | |
07fb6176 | 1460 | aml_len += tables->table_data->len - ssdt; |
72c194f7 | 1461 | |
72c194f7 | 1462 | acpi_add_table(table_offsets, tables->table_data); |
9ac1c4c0 MT |
1463 | build_madt(tables->table_data, tables->linker, &cpu, guest_info); |
1464 | ||
72c194f7 | 1465 | if (misc.has_hpet) { |
9ac1c4c0 | 1466 | acpi_add_table(table_offsets, tables->table_data); |
72c194f7 | 1467 | build_hpet(tables->table_data, tables->linker); |
711b20b4 SB |
1468 | } |
1469 | if (misc.has_tpm) { | |
1470 | acpi_add_table(table_offsets, tables->table_data); | |
42a5b308 | 1471 | build_tpm_tcpa(tables->table_data, tables->linker, tables->tcpalog); |
711b20b4 SB |
1472 | |
1473 | acpi_add_table(table_offsets, tables->table_data); | |
1474 | build_tpm_ssdt(tables->table_data, tables->linker); | |
72c194f7 MT |
1475 | } |
1476 | if (guest_info->numa_nodes) { | |
1477 | acpi_add_table(table_offsets, tables->table_data); | |
dd0247e0 | 1478 | build_srat(tables->table_data, tables->linker, guest_info); |
72c194f7 MT |
1479 | } |
1480 | if (acpi_get_mcfg(&mcfg)) { | |
1481 | acpi_add_table(table_offsets, tables->table_data); | |
1482 | build_mcfg_q35(tables->table_data, tables->linker, &mcfg); | |
1483 | } | |
d4eb9119 LT |
1484 | if (acpi_has_iommu()) { |
1485 | acpi_add_table(table_offsets, tables->table_data); | |
1486 | build_dmar_q35(tables->table_data, tables->linker); | |
1487 | } | |
72c194f7 MT |
1488 | |
1489 | /* Add tables supplied by user (if any) */ | |
1490 | for (u = acpi_table_first(); u; u = acpi_table_next(u)) { | |
1491 | unsigned len = acpi_table_len(u); | |
1492 | ||
1493 | acpi_add_table(table_offsets, tables->table_data); | |
1494 | g_array_append_vals(tables->table_data, u, len); | |
1495 | } | |
1496 | ||
1497 | /* RSDT is pointed to by RSDP */ | |
1498 | rsdt = tables->table_data->len; | |
1499 | build_rsdt(tables->table_data, tables->linker, table_offsets); | |
1500 | ||
1501 | /* RSDP is in FSEG memory, so allocate it separately */ | |
1502 | build_rsdp(tables->rsdp, tables->linker, rsdt); | |
1503 | ||
07fb6176 | 1504 | /* We'll expose it all to Guest so we want to reduce |
72c194f7 | 1505 | * chance of size changes. |
07fb6176 PB |
1506 | * |
1507 | * We used to align the tables to 4k, but of course this would | |
1508 | * too simple to be enough. 4k turned out to be too small an | |
1509 | * alignment very soon, and in fact it is almost impossible to | |
1510 | * keep the table size stable for all (max_cpus, max_memory_slots) | |
1511 | * combinations. So the table size is always 64k for pc-i440fx-2.1 | |
1512 | * and we give an error if the table grows beyond that limit. | |
1513 | * | |
1514 | * We still have the problem of migrating from "-M pc-i440fx-2.0". For | |
1515 | * that, we exploit the fact that QEMU 2.1 generates _smaller_ tables | |
1516 | * than 2.0 and we can always pad the smaller tables with zeros. We can | |
1517 | * then use the exact size of the 2.0 tables. | |
1518 | * | |
1519 | * All this is for PIIX4, since QEMU 2.0 didn't support Q35 migration. | |
72c194f7 | 1520 | */ |
07fb6176 PB |
1521 | if (guest_info->legacy_acpi_table_size) { |
1522 | /* Subtracting aml_len gives the size of fixed tables. Then add the | |
1523 | * size of the PIIX4 DSDT/SSDT in QEMU 2.0. | |
1524 | */ | |
1525 | int legacy_aml_len = | |
1526 | guest_info->legacy_acpi_table_size + | |
1527 | ACPI_BUILD_LEGACY_CPU_AML_SIZE * max_cpus; | |
1528 | int legacy_table_size = | |
1529 | ROUND_UP(tables->table_data->len - aml_len + legacy_aml_len, | |
1530 | ACPI_BUILD_ALIGN_SIZE); | |
1531 | if (tables->table_data->len > legacy_table_size) { | |
1532 | /* Should happen only with PCI bridges and -M pc-i440fx-2.0. */ | |
868270f2 | 1533 | error_report("Warning: migration may not work."); |
07fb6176 PB |
1534 | } |
1535 | g_array_set_size(tables->table_data, legacy_table_size); | |
1536 | } else { | |
868270f2 MT |
1537 | /* Make sure we have a buffer in case we need to resize the tables. */ |
1538 | if (tables->table_data->len > ACPI_BUILD_TABLE_SIZE / 2) { | |
18045fb9 | 1539 | /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */ |
868270f2 MT |
1540 | error_report("Warning: ACPI tables are larger than 64k."); |
1541 | error_report("Warning: migration may not work."); | |
1542 | error_report("Warning: please remove CPUs, NUMA nodes, " | |
1543 | "memory slots or PCI bridges."); | |
18045fb9 | 1544 | } |
868270f2 | 1545 | acpi_align_size(tables->table_data, ACPI_BUILD_TABLE_SIZE); |
07fb6176 | 1546 | } |
72c194f7 | 1547 | |
07fb6176 | 1548 | acpi_align_size(tables->linker, ACPI_BUILD_ALIGN_SIZE); |
72c194f7 MT |
1549 | |
1550 | /* Cleanup memory that's no longer used. */ | |
1551 | g_array_free(table_offsets, true); | |
1552 | } | |
1553 | ||
42d85900 MT |
1554 | static void acpi_ram_update(ram_addr_t ram, GArray *data) |
1555 | { | |
1556 | uint32_t size = acpi_data_len(data); | |
1557 | ||
1558 | /* Make sure RAM size is correct - in case it got changed e.g. by migration */ | |
1559 | qemu_ram_resize(ram, size, &error_abort); | |
1560 | ||
1561 | memcpy(qemu_get_ram_ptr(ram), data->data, size); | |
1562 | cpu_physical_memory_set_dirty_range_nocode(ram, size); | |
1563 | } | |
1564 | ||
72c194f7 MT |
1565 | static void acpi_build_update(void *build_opaque, uint32_t offset) |
1566 | { | |
1567 | AcpiBuildState *build_state = build_opaque; | |
1568 | AcpiBuildTables tables; | |
1569 | ||
1570 | /* No state to update or already patched? Nothing to do. */ | |
1571 | if (!build_state || build_state->patched) { | |
1572 | return; | |
1573 | } | |
1574 | build_state->patched = 1; | |
1575 | ||
1576 | acpi_build_tables_init(&tables); | |
1577 | ||
1578 | acpi_build(build_state->guest_info, &tables); | |
1579 | ||
42d85900 | 1580 | acpi_ram_update(build_state->table_ram, tables.table_data); |
a1666142 | 1581 | |
42d85900 MT |
1582 | if (build_state->rsdp) { |
1583 | memcpy(build_state->rsdp, tables.rsdp->data, acpi_data_len(tables.rsdp)); | |
1584 | } else { | |
1585 | acpi_ram_update(build_state->rsdp_ram, tables.rsdp); | |
1586 | } | |
ad5b88b1 | 1587 | |
42d85900 | 1588 | acpi_ram_update(build_state->linker_ram, tables.linker); |
72c194f7 MT |
1589 | acpi_build_tables_cleanup(&tables, true); |
1590 | } | |
1591 | ||
1592 | static void acpi_build_reset(void *build_opaque) | |
1593 | { | |
1594 | AcpiBuildState *build_state = build_opaque; | |
1595 | build_state->patched = 0; | |
1596 | } | |
1597 | ||
ad5b88b1 | 1598 | static ram_addr_t acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob, |
a1666142 | 1599 | const char *name, uint64_t max_size) |
72c194f7 | 1600 | { |
a1666142 MT |
1601 | return rom_add_blob(name, blob->data, acpi_data_len(blob), max_size, -1, |
1602 | name, acpi_build_update, build_state); | |
72c194f7 MT |
1603 | } |
1604 | ||
1605 | static const VMStateDescription vmstate_acpi_build = { | |
1606 | .name = "acpi_build", | |
1607 | .version_id = 1, | |
1608 | .minimum_version_id = 1, | |
d49805ae | 1609 | .fields = (VMStateField[]) { |
72c194f7 MT |
1610 | VMSTATE_UINT8(patched, AcpiBuildState), |
1611 | VMSTATE_END_OF_LIST() | |
1612 | }, | |
1613 | }; | |
1614 | ||
1615 | void acpi_setup(PcGuestInfo *guest_info) | |
1616 | { | |
1617 | AcpiBuildTables tables; | |
1618 | AcpiBuildState *build_state; | |
1619 | ||
1620 | if (!guest_info->fw_cfg) { | |
8b310fc4 | 1621 | ACPI_BUILD_DPRINTF("No fw cfg. Bailing out.\n"); |
72c194f7 MT |
1622 | return; |
1623 | } | |
1624 | ||
1625 | if (!guest_info->has_acpi_build) { | |
8b310fc4 | 1626 | ACPI_BUILD_DPRINTF("ACPI build disabled. Bailing out.\n"); |
72c194f7 MT |
1627 | return; |
1628 | } | |
1629 | ||
81adc513 | 1630 | if (!acpi_enabled) { |
8b310fc4 | 1631 | ACPI_BUILD_DPRINTF("ACPI disabled. Bailing out.\n"); |
81adc513 MT |
1632 | return; |
1633 | } | |
1634 | ||
72c194f7 MT |
1635 | build_state = g_malloc0(sizeof *build_state); |
1636 | ||
1637 | build_state->guest_info = guest_info; | |
1638 | ||
99fd437d MT |
1639 | acpi_set_pci_info(); |
1640 | ||
72c194f7 MT |
1641 | acpi_build_tables_init(&tables); |
1642 | acpi_build(build_state->guest_info, &tables); | |
1643 | ||
1644 | /* Now expose it all to Guest */ | |
1645 | build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data, | |
a1666142 MT |
1646 | ACPI_BUILD_TABLE_FILE, |
1647 | ACPI_BUILD_TABLE_MAX_SIZE); | |
ad5b88b1 | 1648 | assert(build_state->table_ram != RAM_ADDR_MAX); |
72c194f7 | 1649 | |
6e00619b IM |
1650 | build_state->linker_ram = |
1651 | acpi_add_rom_blob(build_state, tables.linker, "etc/table-loader", 0); | |
72c194f7 | 1652 | |
42a5b308 SB |
1653 | fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_TPMLOG_FILE, |
1654 | tables.tcpalog->data, acpi_data_len(tables.tcpalog)); | |
1655 | ||
358774d7 IM |
1656 | if (guest_info->has_immutable_rsdp) { |
1657 | /* | |
1658 | * Keep for compatibility with old machine types. | |
1659 | * Though RSDP is small, its contents isn't immutable, so | |
1660 | * update it along with the rest of tables on guest access. | |
1661 | */ | |
1662 | fw_cfg_add_file_callback(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE, | |
1663 | acpi_build_update, build_state, | |
1664 | tables.rsdp->data, acpi_data_len(tables.rsdp)); | |
1665 | build_state->rsdp = tables.rsdp->data; | |
42d85900 | 1666 | build_state->rsdp_ram = (ram_addr_t)-1; |
358774d7 | 1667 | } else { |
42d85900 MT |
1668 | build_state->rsdp = NULL; |
1669 | build_state->rsdp_ram = acpi_add_rom_blob(build_state, tables.rsdp, | |
1670 | ACPI_BUILD_RSDP_FILE, 0); | |
358774d7 | 1671 | } |
72c194f7 MT |
1672 | |
1673 | qemu_register_reset(acpi_build_reset, build_state); | |
1674 | acpi_build_reset(build_state); | |
1675 | vmstate_register(NULL, 0, &vmstate_acpi_build, build_state); | |
1676 | ||
1677 | /* Cleanup tables but don't free the memory: we track it | |
1678 | * in build_state. | |
1679 | */ | |
1680 | acpi_build_tables_cleanup(&tables, false); | |
1681 | } |