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72c194f7 MT |
1 | /* Support for generating ACPI tables and passing them to Guests |
2 | * | |
3 | * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net> | |
4 | * Copyright (C) 2006 Fabrice Bellard | |
5 | * Copyright (C) 2013 Red Hat Inc | |
6 | * | |
7 | * Author: Michael S. Tsirkin <mst@redhat.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | ||
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | ||
19 | * You should have received a copy of the GNU General Public License along | |
20 | * with this program; if not, see <http://www.gnu.org/licenses/>. | |
21 | */ | |
22 | ||
23 | #include "acpi-build.h" | |
24 | #include <stddef.h> | |
25 | #include <glib.h> | |
26 | #include "qemu-common.h" | |
27 | #include "qemu/bitmap.h" | |
07fb6176 | 28 | #include "qemu/osdep.h" |
72c194f7 | 29 | #include "qemu/range.h" |
07fb6176 | 30 | #include "qemu/error-report.h" |
72c194f7 MT |
31 | #include "hw/pci/pci.h" |
32 | #include "qom/cpu.h" | |
33 | #include "hw/i386/pc.h" | |
34 | #include "target-i386/cpu.h" | |
35 | #include "hw/timer/hpet.h" | |
36 | #include "hw/i386/acpi-defs.h" | |
37 | #include "hw/acpi/acpi.h" | |
38 | #include "hw/nvram/fw_cfg.h" | |
0058ae1d | 39 | #include "hw/acpi/bios-linker-loader.h" |
72c194f7 | 40 | #include "hw/loader.h" |
15bce1b7 | 41 | #include "hw/isa/isa.h" |
bef3492d | 42 | #include "hw/acpi/memory_hotplug.h" |
711b20b4 SB |
43 | #include "sysemu/tpm.h" |
44 | #include "hw/acpi/tpm.h" | |
72c194f7 MT |
45 | |
46 | /* Supported chipsets: */ | |
47 | #include "hw/acpi/piix4.h" | |
99fd437d | 48 | #include "hw/acpi/pcihp.h" |
72c194f7 MT |
49 | #include "hw/i386/ich9.h" |
50 | #include "hw/pci/pci_bus.h" | |
51 | #include "hw/pci-host/q35.h" | |
d4eb9119 | 52 | #include "hw/i386/intel_iommu.h" |
72c194f7 MT |
53 | |
54 | #include "hw/i386/q35-acpi-dsdt.hex" | |
55 | #include "hw/i386/acpi-dsdt.hex" | |
56 | ||
19934e0e IM |
57 | #include "hw/acpi/aml-build.h" |
58 | ||
72c194f7 MT |
59 | #include "qapi/qmp/qint.h" |
60 | #include "qom/qom-qobject.h" | |
ad5b88b1 | 61 | #include "exec/ram_addr.h" |
72c194f7 | 62 | |
07fb6176 PB |
63 | /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and |
64 | * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows | |
65 | * a little bit, there should be plenty of free space since the DSDT | |
66 | * shrunk by ~1.5k between QEMU 2.0 and QEMU 2.1. | |
67 | */ | |
68 | #define ACPI_BUILD_LEGACY_CPU_AML_SIZE 97 | |
69 | #define ACPI_BUILD_ALIGN_SIZE 0x1000 | |
70 | ||
868270f2 | 71 | #define ACPI_BUILD_TABLE_SIZE 0x20000 |
18045fb9 | 72 | |
a1666142 MT |
73 | /* Reserve RAM space for tables: add another order of magnitude. */ |
74 | #define ACPI_BUILD_TABLE_MAX_SIZE 0x200000 | |
75 | ||
8b310fc4 GA |
76 | /* #define DEBUG_ACPI_BUILD */ |
77 | #ifdef DEBUG_ACPI_BUILD | |
78 | #define ACPI_BUILD_DPRINTF(fmt, ...) \ | |
79 | do {printf("ACPI_BUILD: " fmt, ## __VA_ARGS__); } while (0) | |
80 | #else | |
81 | #define ACPI_BUILD_DPRINTF(fmt, ...) | |
82 | #endif | |
83 | ||
72c194f7 | 84 | typedef struct AcpiCpuInfo { |
798325ed | 85 | DECLARE_BITMAP(found_cpus, ACPI_CPU_HOTPLUG_ID_LIMIT); |
72c194f7 MT |
86 | } AcpiCpuInfo; |
87 | ||
88 | typedef struct AcpiMcfgInfo { | |
89 | uint64_t mcfg_base; | |
90 | uint32_t mcfg_size; | |
91 | } AcpiMcfgInfo; | |
92 | ||
93 | typedef struct AcpiPmInfo { | |
94 | bool s3_disabled; | |
95 | bool s4_disabled; | |
133a2da4 | 96 | bool pcihp_bridge_en; |
72c194f7 MT |
97 | uint8_t s4_val; |
98 | uint16_t sci_int; | |
99 | uint8_t acpi_enable_cmd; | |
100 | uint8_t acpi_disable_cmd; | |
101 | uint32_t gpe0_blk; | |
102 | uint32_t gpe0_blk_len; | |
103 | uint32_t io_base; | |
ddf1ec2f IM |
104 | uint16_t cpu_hp_io_base; |
105 | uint16_t cpu_hp_io_len; | |
2c6b94d8 IM |
106 | uint16_t mem_hp_io_base; |
107 | uint16_t mem_hp_io_len; | |
500b11ea IM |
108 | uint16_t pcihp_io_base; |
109 | uint16_t pcihp_io_len; | |
72c194f7 MT |
110 | } AcpiPmInfo; |
111 | ||
112 | typedef struct AcpiMiscInfo { | |
113 | bool has_hpet; | |
711b20b4 | 114 | bool has_tpm; |
72c194f7 MT |
115 | const unsigned char *dsdt_code; |
116 | unsigned dsdt_size; | |
117 | uint16_t pvpanic_port; | |
8ac6f7a6 | 118 | uint16_t applesmc_io_base; |
72c194f7 MT |
119 | } AcpiMiscInfo; |
120 | ||
99fd437d MT |
121 | typedef struct AcpiBuildPciBusHotplugState { |
122 | GArray *device_table; | |
123 | GArray *notify_table; | |
124 | struct AcpiBuildPciBusHotplugState *parent; | |
133a2da4 | 125 | bool pcihp_bridge_en; |
99fd437d MT |
126 | } AcpiBuildPciBusHotplugState; |
127 | ||
72c194f7 MT |
128 | static void acpi_get_dsdt(AcpiMiscInfo *info) |
129 | { | |
130 | Object *piix = piix4_pm_find(); | |
131 | Object *lpc = ich9_lpc_find(); | |
132 | assert(!!piix != !!lpc); | |
133 | ||
134 | if (piix) { | |
135 | info->dsdt_code = AcpiDsdtAmlCode; | |
136 | info->dsdt_size = sizeof AcpiDsdtAmlCode; | |
137 | } | |
138 | if (lpc) { | |
139 | info->dsdt_code = Q35AcpiDsdtAmlCode; | |
140 | info->dsdt_size = sizeof Q35AcpiDsdtAmlCode; | |
141 | } | |
142 | } | |
143 | ||
144 | static | |
145 | int acpi_add_cpu_info(Object *o, void *opaque) | |
146 | { | |
147 | AcpiCpuInfo *cpu = opaque; | |
148 | uint64_t apic_id; | |
149 | ||
150 | if (object_dynamic_cast(o, TYPE_CPU)) { | |
151 | apic_id = object_property_get_int(o, "apic-id", NULL); | |
798325ed | 152 | assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT); |
72c194f7 MT |
153 | |
154 | set_bit(apic_id, cpu->found_cpus); | |
155 | } | |
156 | ||
157 | object_child_foreach(o, acpi_add_cpu_info, opaque); | |
158 | return 0; | |
159 | } | |
160 | ||
161 | static void acpi_get_cpu_info(AcpiCpuInfo *cpu) | |
162 | { | |
163 | Object *root = object_get_root(); | |
164 | ||
165 | memset(cpu->found_cpus, 0, sizeof cpu->found_cpus); | |
166 | object_child_foreach(root, acpi_add_cpu_info, cpu); | |
167 | } | |
168 | ||
169 | static void acpi_get_pm_info(AcpiPmInfo *pm) | |
170 | { | |
171 | Object *piix = piix4_pm_find(); | |
172 | Object *lpc = ich9_lpc_find(); | |
173 | Object *obj = NULL; | |
174 | QObject *o; | |
175 | ||
500b11ea IM |
176 | pm->pcihp_io_base = 0; |
177 | pm->pcihp_io_len = 0; | |
72c194f7 MT |
178 | if (piix) { |
179 | obj = piix; | |
ddf1ec2f | 180 | pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; |
500b11ea IM |
181 | pm->pcihp_io_base = |
182 | object_property_get_int(obj, ACPI_PCIHP_IO_BASE_PROP, NULL); | |
183 | pm->pcihp_io_len = | |
184 | object_property_get_int(obj, ACPI_PCIHP_IO_LEN_PROP, NULL); | |
72c194f7 MT |
185 | } |
186 | if (lpc) { | |
187 | obj = lpc; | |
ddf1ec2f | 188 | pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; |
72c194f7 MT |
189 | } |
190 | assert(obj); | |
191 | ||
ddf1ec2f | 192 | pm->cpu_hp_io_len = ACPI_GPE_PROC_LEN; |
2c6b94d8 IM |
193 | pm->mem_hp_io_base = ACPI_MEMORY_HOTPLUG_BASE; |
194 | pm->mem_hp_io_len = ACPI_MEMORY_HOTPLUG_IO_LEN; | |
195 | ||
72c194f7 MT |
196 | /* Fill in optional s3/s4 related properties */ |
197 | o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); | |
198 | if (o) { | |
199 | pm->s3_disabled = qint_get_int(qobject_to_qint(o)); | |
200 | } else { | |
201 | pm->s3_disabled = false; | |
202 | } | |
097a97a6 | 203 | qobject_decref(o); |
72c194f7 MT |
204 | o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL); |
205 | if (o) { | |
206 | pm->s4_disabled = qint_get_int(qobject_to_qint(o)); | |
207 | } else { | |
208 | pm->s4_disabled = false; | |
209 | } | |
097a97a6 | 210 | qobject_decref(o); |
72c194f7 MT |
211 | o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL); |
212 | if (o) { | |
213 | pm->s4_val = qint_get_int(qobject_to_qint(o)); | |
214 | } else { | |
215 | pm->s4_val = false; | |
216 | } | |
097a97a6 | 217 | qobject_decref(o); |
72c194f7 MT |
218 | |
219 | /* Fill in mandatory properties */ | |
220 | pm->sci_int = object_property_get_int(obj, ACPI_PM_PROP_SCI_INT, NULL); | |
221 | ||
222 | pm->acpi_enable_cmd = object_property_get_int(obj, | |
223 | ACPI_PM_PROP_ACPI_ENABLE_CMD, | |
224 | NULL); | |
225 | pm->acpi_disable_cmd = object_property_get_int(obj, | |
226 | ACPI_PM_PROP_ACPI_DISABLE_CMD, | |
227 | NULL); | |
228 | pm->io_base = object_property_get_int(obj, ACPI_PM_PROP_PM_IO_BASE, | |
229 | NULL); | |
230 | pm->gpe0_blk = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK, | |
231 | NULL); | |
232 | pm->gpe0_blk_len = object_property_get_int(obj, ACPI_PM_PROP_GPE0_BLK_LEN, | |
233 | NULL); | |
133a2da4 IM |
234 | pm->pcihp_bridge_en = |
235 | object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support", | |
236 | NULL); | |
72c194f7 MT |
237 | } |
238 | ||
72c194f7 MT |
239 | static void acpi_get_misc_info(AcpiMiscInfo *info) |
240 | { | |
241 | info->has_hpet = hpet_find(); | |
711b20b4 | 242 | info->has_tpm = tpm_find(); |
72c194f7 | 243 | info->pvpanic_port = pvpanic_port(); |
8ac6f7a6 | 244 | info->applesmc_io_base = applesmc_port(); |
72c194f7 MT |
245 | } |
246 | ||
247 | static void acpi_get_pci_info(PcPciInfo *info) | |
248 | { | |
249 | Object *pci_host; | |
250 | bool ambiguous; | |
251 | ||
252 | pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); | |
253 | g_assert(!ambiguous); | |
254 | g_assert(pci_host); | |
255 | ||
256 | info->w32.begin = object_property_get_int(pci_host, | |
257 | PCI_HOST_PROP_PCI_HOLE_START, | |
258 | NULL); | |
259 | info->w32.end = object_property_get_int(pci_host, | |
260 | PCI_HOST_PROP_PCI_HOLE_END, | |
261 | NULL); | |
262 | info->w64.begin = object_property_get_int(pci_host, | |
263 | PCI_HOST_PROP_PCI_HOLE64_START, | |
264 | NULL); | |
265 | info->w64.end = object_property_get_int(pci_host, | |
266 | PCI_HOST_PROP_PCI_HOLE64_END, | |
267 | NULL); | |
268 | } | |
269 | ||
270 | #define ACPI_BUILD_APPNAME "Bochs" | |
271 | #define ACPI_BUILD_APPNAME6 "BOCHS " | |
272 | #define ACPI_BUILD_APPNAME4 "BXPC" | |
273 | ||
72c194f7 MT |
274 | #define ACPI_BUILD_TABLE_FILE "etc/acpi/tables" |
275 | #define ACPI_BUILD_RSDP_FILE "etc/acpi/rsdp" | |
42a5b308 | 276 | #define ACPI_BUILD_TPMLOG_FILE "etc/tpm/log" |
72c194f7 MT |
277 | |
278 | static void | |
279 | build_header(GArray *linker, GArray *table_data, | |
821e3227 | 280 | AcpiTableHeader *h, const char *sig, int len, uint8_t rev) |
72c194f7 | 281 | { |
821e3227 | 282 | memcpy(&h->signature, sig, 4); |
72c194f7 MT |
283 | h->length = cpu_to_le32(len); |
284 | h->revision = rev; | |
285 | memcpy(h->oem_id, ACPI_BUILD_APPNAME6, 6); | |
286 | memcpy(h->oem_table_id, ACPI_BUILD_APPNAME4, 4); | |
821e3227 | 287 | memcpy(h->oem_table_id + 4, sig, 4); |
72c194f7 MT |
288 | h->oem_revision = cpu_to_le32(1); |
289 | memcpy(h->asl_compiler_id, ACPI_BUILD_APPNAME4, 4); | |
290 | h->asl_compiler_revision = cpu_to_le32(1); | |
291 | h->checksum = 0; | |
292 | /* Checksum to be filled in by Guest linker */ | |
293 | bios_linker_loader_add_checksum(linker, ACPI_BUILD_TABLE_FILE, | |
294 | table_data->data, h, len, &h->checksum); | |
295 | } | |
296 | ||
99fd437d MT |
297 | static GArray *build_alloc_method(const char *name, uint8_t arg_count) |
298 | { | |
299 | GArray *method = build_alloc_array(); | |
300 | ||
eae8bded | 301 | build_append_namestring(method, "%s", name); |
99fd437d MT |
302 | build_append_byte(method, arg_count); /* MethodFlags: ArgCount */ |
303 | ||
304 | return method; | |
305 | } | |
306 | ||
307 | static void build_append_and_cleanup_method(GArray *device, GArray *method) | |
308 | { | |
309 | uint8_t op = 0x14; /* MethodOp */ | |
310 | ||
661875e9 | 311 | build_package(method, op); |
99fd437d MT |
312 | |
313 | build_append_array(device, method); | |
314 | build_free_array(method); | |
315 | } | |
316 | ||
99fd437d | 317 | /* End here */ |
72c194f7 MT |
318 | #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */ |
319 | ||
320 | static inline void *acpi_data_push(GArray *table_data, unsigned size) | |
321 | { | |
322 | unsigned off = table_data->len; | |
323 | g_array_set_size(table_data, off + size); | |
324 | return table_data->data + off; | |
325 | } | |
326 | ||
327 | static unsigned acpi_data_len(GArray *table) | |
328 | { | |
134d42d6 | 329 | #if GLIB_CHECK_VERSION(2, 22, 0) |
b15654c2 MT |
330 | assert(g_array_get_element_size(table) == 1); |
331 | #endif | |
332 | return table->len; | |
72c194f7 MT |
333 | } |
334 | ||
335 | static void acpi_align_size(GArray *blob, unsigned align) | |
336 | { | |
337 | /* Align size to multiple of given size. This reduces the chance | |
338 | * we need to change size in the future (breaking cross version migration). | |
339 | */ | |
134d42d6 | 340 | g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align)); |
72c194f7 MT |
341 | } |
342 | ||
72c194f7 MT |
343 | static inline void acpi_add_table(GArray *table_offsets, GArray *table_data) |
344 | { | |
345 | uint32_t offset = cpu_to_le32(table_data->len); | |
346 | g_array_append_val(table_offsets, offset); | |
347 | } | |
348 | ||
349 | /* FACS */ | |
350 | static void | |
351 | build_facs(GArray *table_data, GArray *linker, PcGuestInfo *guest_info) | |
352 | { | |
353 | AcpiFacsDescriptorRev1 *facs = acpi_data_push(table_data, sizeof *facs); | |
821e3227 | 354 | memcpy(&facs->signature, "FACS", 4); |
72c194f7 MT |
355 | facs->length = cpu_to_le32(sizeof(*facs)); |
356 | } | |
357 | ||
358 | /* Load chipset information in FADT */ | |
359 | static void fadt_setup(AcpiFadtDescriptorRev1 *fadt, AcpiPmInfo *pm) | |
360 | { | |
361 | fadt->model = 1; | |
362 | fadt->reserved1 = 0; | |
363 | fadt->sci_int = cpu_to_le16(pm->sci_int); | |
364 | fadt->smi_cmd = cpu_to_le32(ACPI_PORT_SMI_CMD); | |
365 | fadt->acpi_enable = pm->acpi_enable_cmd; | |
366 | fadt->acpi_disable = pm->acpi_disable_cmd; | |
367 | /* EVT, CNT, TMR offset matches hw/acpi/core.c */ | |
368 | fadt->pm1a_evt_blk = cpu_to_le32(pm->io_base); | |
369 | fadt->pm1a_cnt_blk = cpu_to_le32(pm->io_base + 0x04); | |
370 | fadt->pm_tmr_blk = cpu_to_le32(pm->io_base + 0x08); | |
371 | fadt->gpe0_blk = cpu_to_le32(pm->gpe0_blk); | |
372 | /* EVT, CNT, TMR length matches hw/acpi/core.c */ | |
373 | fadt->pm1_evt_len = 4; | |
374 | fadt->pm1_cnt_len = 2; | |
375 | fadt->pm_tmr_len = 4; | |
376 | fadt->gpe0_blk_len = pm->gpe0_blk_len; | |
377 | fadt->plvl2_lat = cpu_to_le16(0xfff); /* C2 state not supported */ | |
378 | fadt->plvl3_lat = cpu_to_le16(0xfff); /* C3 state not supported */ | |
379 | fadt->flags = cpu_to_le32((1 << ACPI_FADT_F_WBINVD) | | |
380 | (1 << ACPI_FADT_F_PROC_C1) | | |
381 | (1 << ACPI_FADT_F_SLP_BUTTON) | | |
382 | (1 << ACPI_FADT_F_RTC_S4)); | |
383 | fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK); | |
07b81ed9 HZ |
384 | /* APIC destination mode ("Flat Logical") has an upper limit of 8 CPUs |
385 | * For more than 8 CPUs, "Clustered Logical" mode has to be used | |
386 | */ | |
387 | if (max_cpus > 8) { | |
388 | fadt->flags |= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL); | |
389 | } | |
72c194f7 MT |
390 | } |
391 | ||
392 | ||
393 | /* FADT */ | |
394 | static void | |
395 | build_fadt(GArray *table_data, GArray *linker, AcpiPmInfo *pm, | |
396 | unsigned facs, unsigned dsdt) | |
397 | { | |
398 | AcpiFadtDescriptorRev1 *fadt = acpi_data_push(table_data, sizeof(*fadt)); | |
399 | ||
400 | fadt->firmware_ctrl = cpu_to_le32(facs); | |
401 | /* FACS address to be filled by Guest linker */ | |
402 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, | |
403 | ACPI_BUILD_TABLE_FILE, | |
404 | table_data, &fadt->firmware_ctrl, | |
405 | sizeof fadt->firmware_ctrl); | |
406 | ||
407 | fadt->dsdt = cpu_to_le32(dsdt); | |
408 | /* DSDT address to be filled by Guest linker */ | |
409 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, | |
410 | ACPI_BUILD_TABLE_FILE, | |
411 | table_data, &fadt->dsdt, | |
412 | sizeof fadt->dsdt); | |
413 | ||
414 | fadt_setup(fadt, pm); | |
415 | ||
416 | build_header(linker, table_data, | |
821e3227 | 417 | (void *)fadt, "FACP", sizeof(*fadt), 1); |
72c194f7 MT |
418 | } |
419 | ||
420 | static void | |
421 | build_madt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu, | |
422 | PcGuestInfo *guest_info) | |
423 | { | |
424 | int madt_start = table_data->len; | |
425 | ||
426 | AcpiMultipleApicTable *madt; | |
427 | AcpiMadtIoApic *io_apic; | |
428 | AcpiMadtIntsrcovr *intsrcovr; | |
429 | AcpiMadtLocalNmi *local_nmi; | |
430 | int i; | |
431 | ||
432 | madt = acpi_data_push(table_data, sizeof *madt); | |
433 | madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS); | |
434 | madt->flags = cpu_to_le32(1); | |
435 | ||
436 | for (i = 0; i < guest_info->apic_id_limit; i++) { | |
437 | AcpiMadtProcessorApic *apic = acpi_data_push(table_data, sizeof *apic); | |
438 | apic->type = ACPI_APIC_PROCESSOR; | |
439 | apic->length = sizeof(*apic); | |
440 | apic->processor_id = i; | |
441 | apic->local_apic_id = i; | |
442 | if (test_bit(i, cpu->found_cpus)) { | |
443 | apic->flags = cpu_to_le32(1); | |
444 | } else { | |
445 | apic->flags = cpu_to_le32(0); | |
446 | } | |
447 | } | |
448 | io_apic = acpi_data_push(table_data, sizeof *io_apic); | |
449 | io_apic->type = ACPI_APIC_IO; | |
450 | io_apic->length = sizeof(*io_apic); | |
451 | #define ACPI_BUILD_IOAPIC_ID 0x0 | |
452 | io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID; | |
453 | io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS); | |
454 | io_apic->interrupt = cpu_to_le32(0); | |
455 | ||
456 | if (guest_info->apic_xrupt_override) { | |
457 | intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); | |
458 | intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; | |
459 | intsrcovr->length = sizeof(*intsrcovr); | |
460 | intsrcovr->source = 0; | |
461 | intsrcovr->gsi = cpu_to_le32(2); | |
462 | intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */ | |
463 | } | |
464 | for (i = 1; i < 16; i++) { | |
465 | #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) | |
466 | if (!(ACPI_BUILD_PCI_IRQS & (1 << i))) { | |
467 | /* No need for a INT source override structure. */ | |
468 | continue; | |
469 | } | |
470 | intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr); | |
471 | intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE; | |
472 | intsrcovr->length = sizeof(*intsrcovr); | |
473 | intsrcovr->source = i; | |
474 | intsrcovr->gsi = cpu_to_le32(i); | |
475 | intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */ | |
476 | } | |
477 | ||
478 | local_nmi = acpi_data_push(table_data, sizeof *local_nmi); | |
479 | local_nmi->type = ACPI_APIC_LOCAL_NMI; | |
480 | local_nmi->length = sizeof(*local_nmi); | |
481 | local_nmi->processor_id = 0xff; /* all processors */ | |
482 | local_nmi->flags = cpu_to_le16(0); | |
483 | local_nmi->lint = 1; /* ACPI_LINT1 */ | |
484 | ||
485 | build_header(linker, table_data, | |
821e3227 | 486 | (void *)(table_data->data + madt_start), "APIC", |
72c194f7 MT |
487 | table_data->len - madt_start, 1); |
488 | } | |
489 | ||
490 | /* Encode a hex value */ | |
491 | static inline char acpi_get_hex(uint32_t val) | |
492 | { | |
493 | val &= 0x0f; | |
494 | return (val <= 9) ? ('0' + val) : ('A' + val - 10); | |
495 | } | |
496 | ||
72c194f7 MT |
497 | /* 0x5B 0x82 DeviceOp PkgLength NameString */ |
498 | #define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1) | |
499 | #define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start) | |
500 | #define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start) | |
501 | #define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start) | |
502 | #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start) | |
503 | #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start) | |
504 | ||
8dcf525a MT |
505 | #define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1) |
506 | #define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start) | |
507 | #define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start) | |
508 | #define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start) | |
509 | ||
510 | #define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1) | |
511 | #define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start) | |
512 | #define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start) | |
513 | #define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start) | |
514 | ||
515 | #define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1) | |
516 | #define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start) | |
517 | #define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start) | |
518 | #define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start) | |
519 | ||
72c194f7 MT |
520 | #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */ |
521 | #define ACPI_SSDT_HEADER_LENGTH 36 | |
522 | ||
72c194f7 | 523 | #include "hw/i386/ssdt-pcihp.hex" |
711b20b4 | 524 | #include "hw/i386/ssdt-tpm.hex" |
72c194f7 | 525 | |
99fd437d | 526 | static void patch_pcihp(int slot, uint8_t *ssdt_ptr) |
72c194f7 | 527 | { |
99fd437d MT |
528 | unsigned devfn = PCI_DEVFN(slot, 0); |
529 | ||
530 | ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
531 | ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
72c194f7 MT |
532 | ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot; |
533 | ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot; | |
99fd437d MT |
534 | } |
535 | ||
8dcf525a MT |
536 | static void patch_pcinohp(int slot, uint8_t *ssdt_ptr) |
537 | { | |
538 | unsigned devfn = PCI_DEVFN(slot, 0); | |
539 | ||
540 | ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
541 | ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
542 | ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot; | |
543 | } | |
544 | ||
545 | static void patch_pcivga(int slot, uint8_t *ssdt_ptr) | |
546 | { | |
547 | unsigned devfn = PCI_DEVFN(slot, 0); | |
548 | ||
549 | ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
550 | ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
551 | ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot; | |
552 | } | |
553 | ||
554 | static void patch_pciqxl(int slot, uint8_t *ssdt_ptr) | |
555 | { | |
556 | unsigned devfn = PCI_DEVFN(slot, 0); | |
557 | ||
558 | ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4); | |
559 | ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn); | |
560 | ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot; | |
561 | } | |
562 | ||
99fd437d MT |
563 | /* Assign BSEL property to all buses. In the future, this can be changed |
564 | * to only assign to buses that support hotplug. | |
565 | */ | |
566 | static void *acpi_set_bsel(PCIBus *bus, void *opaque) | |
567 | { | |
568 | unsigned *bsel_alloc = opaque; | |
569 | unsigned *bus_bsel; | |
570 | ||
39b888bd | 571 | if (qbus_is_hotpluggable(BUS(bus))) { |
99fd437d MT |
572 | bus_bsel = g_malloc(sizeof *bus_bsel); |
573 | ||
574 | *bus_bsel = (*bsel_alloc)++; | |
575 | object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, | |
576 | bus_bsel, NULL); | |
577 | } | |
578 | ||
579 | return bsel_alloc; | |
580 | } | |
581 | ||
582 | static void acpi_set_pci_info(void) | |
583 | { | |
584 | PCIBus *bus = find_i440fx(); /* TODO: Q35 support */ | |
585 | unsigned bsel_alloc = 0; | |
586 | ||
587 | if (bus) { | |
588 | /* Scan all PCI buses. Set property to enable acpi based hotplug. */ | |
589 | pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc); | |
590 | } | |
591 | } | |
592 | ||
b23046ab | 593 | static void build_append_pcihp_notify_entry(GArray *method, int slot) |
99fd437d | 594 | { |
b23046ab IM |
595 | GArray *ifctx; |
596 | ||
597 | ifctx = build_alloc_array(); | |
598 | build_append_byte(ifctx, 0x7B); /* AndOp */ | |
599 | build_append_byte(ifctx, 0x68); /* Arg0Op */ | |
600 | build_append_int(ifctx, 0x1U << slot); | |
601 | build_append_byte(ifctx, 0x00); /* NullName */ | |
602 | build_append_byte(ifctx, 0x86); /* NotifyOp */ | |
603 | build_append_namestring(ifctx, "S%.02X", PCI_DEVFN(slot, 0)); | |
604 | build_append_byte(ifctx, 0x69); /* Arg1Op */ | |
605 | ||
606 | /* Pack it up */ | |
607 | build_package(ifctx, 0xA0 /* IfOp */); | |
608 | build_append_array(method, ifctx); | |
609 | build_free_array(ifctx); | |
99fd437d MT |
610 | } |
611 | ||
b23046ab IM |
612 | static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus, |
613 | bool pcihp_bridge_en) | |
99fd437d | 614 | { |
99fd437d | 615 | GArray *bus_table = build_alloc_array(); |
b23046ab | 616 | GArray *method = NULL; |
99fd437d | 617 | QObject *bsel; |
b23046ab IM |
618 | PCIBus *sec; |
619 | int i; | |
133a2da4 | 620 | |
99fd437d | 621 | if (bus->parent_dev) { |
b23046ab | 622 | build_append_namestring(bus_table, "S%.02X_", bus->parent_dev->devfn); |
99fd437d | 623 | } else { |
eae8bded | 624 | build_append_namestring(bus_table, "PCI0"); |
99fd437d | 625 | } |
72c194f7 | 626 | |
99fd437d MT |
627 | bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL); |
628 | if (bsel) { | |
629 | build_append_byte(bus_table, 0x08); /* NameOp */ | |
eae8bded | 630 | build_append_namestring(bus_table, "BSEL"); |
99fd437d | 631 | build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel))); |
b23046ab | 632 | method = build_alloc_method("DVNT", 2); |
8dcf525a | 633 | } |
99fd437d | 634 | |
8dcf525a MT |
635 | for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) { |
636 | DeviceClass *dc; | |
637 | PCIDeviceClass *pc; | |
638 | PCIDevice *pdev = bus->devices[i]; | |
639 | int slot = PCI_SLOT(i); | |
b23046ab | 640 | bool hotplug_enabled_dev; |
093a35e5 | 641 | bool bridge_in_acpi; |
99fd437d | 642 | |
8dcf525a | 643 | if (!pdev) { |
b23046ab IM |
644 | if (bsel) { /* add hotplug slots for non present devices */ |
645 | void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF); | |
646 | memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); | |
647 | patch_pcihp(slot, pcihp); | |
648 | ||
649 | build_append_pcihp_notify_entry(method, slot); | |
650 | } | |
8dcf525a MT |
651 | continue; |
652 | } | |
99fd437d | 653 | |
8dcf525a MT |
654 | pc = PCI_DEVICE_GET_CLASS(pdev); |
655 | dc = DEVICE_GET_CLASS(pdev); | |
99fd437d | 656 | |
093a35e5 MT |
657 | /* When hotplug for bridges is enabled, bridges are |
658 | * described in ACPI separately (see build_pci_bus_end). | |
659 | * In this case they aren't themselves hot-pluggable. | |
a20275fa | 660 | * Hotplugged bridges *are* hot-pluggable. |
093a35e5 | 661 | */ |
b23046ab IM |
662 | bridge_in_acpi = pc->is_bridge && pcihp_bridge_en && |
663 | !DEVICE(pdev)->hotplugged; | |
664 | ||
665 | hotplug_enabled_dev = bsel && dc->hotpluggable && !bridge_in_acpi; | |
093a35e5 | 666 | |
b23046ab IM |
667 | if (pc->class_id == PCI_CLASS_BRIDGE_ISA) { |
668 | continue; | |
99fd437d MT |
669 | } |
670 | ||
8dcf525a | 671 | if (pc->class_id == PCI_CLASS_DISPLAY_VGA) { |
8dcf525a | 672 | if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) { |
b23046ab IM |
673 | void *pcihp = acpi_data_push(bus_table, |
674 | ACPI_PCIQXL_SIZEOF); | |
675 | memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF); | |
676 | patch_pciqxl(slot, pcihp); | |
677 | } else { | |
678 | void *pcihp = acpi_data_push(bus_table, | |
679 | ACPI_PCIVGA_SIZEOF); | |
680 | memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF); | |
681 | patch_pcivga(slot, pcihp); | |
99fd437d | 682 | } |
b23046ab IM |
683 | } else if (hotplug_enabled_dev) { |
684 | void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF); | |
99fd437d | 685 | |
8dcf525a | 686 | memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); |
b23046ab IM |
687 | patch_pcihp(slot, pcihp); |
688 | build_append_pcihp_notify_entry(method, slot); | |
689 | } else if (bridge_in_acpi) { | |
690 | PCIBus *sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); | |
691 | void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF); | |
692 | ||
8dcf525a | 693 | memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF); |
b23046ab IM |
694 | patch_pcinohp(slot, pcihp); |
695 | build_append_pci_bus_devices(bus_table, sec_bus, pcihp_bridge_en); | |
696 | } else { /* non hotpluggable present devices */ | |
697 | void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF); | |
698 | ||
699 | memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF); | |
700 | patch_pcinohp(slot, pcihp); | |
8dcf525a MT |
701 | } |
702 | } | |
703 | ||
704 | if (bsel) { | |
99fd437d MT |
705 | build_append_and_cleanup_method(bus_table, method); |
706 | } | |
707 | ||
708 | /* Append PCNT method to notify about events on local and child buses. | |
709 | * Add unconditionally for root since DSDT expects it. | |
72c194f7 | 710 | */ |
b23046ab | 711 | method = build_alloc_method("PCNT", 0); |
99fd437d | 712 | |
b23046ab IM |
713 | /* If bus supports hotplug select it and notify about local events */ |
714 | if (bsel) { | |
715 | build_append_byte(method, 0x70); /* StoreOp */ | |
716 | build_append_int(method, qint_get_int(qobject_to_qint(bsel))); | |
717 | build_append_namestring(method, "BNUM"); | |
718 | build_append_namestring(method, "DVNT"); | |
719 | build_append_namestring(method, "PCIU"); | |
720 | build_append_int(method, 1); /* Device Check */ | |
721 | build_append_namestring(method, "DVNT"); | |
722 | build_append_namestring(method, "PCID"); | |
723 | build_append_int(method, 3); /* Eject Request */ | |
724 | } | |
99fd437d | 725 | |
b23046ab IM |
726 | /* Notify about child bus events in any case */ |
727 | if (pcihp_bridge_en) { | |
728 | QLIST_FOREACH(sec, &bus->child, sibling) { | |
729 | build_append_namestring(method, "^S%.02X.PCNT", | |
730 | sec->parent_dev->devfn); | |
99fd437d | 731 | } |
72c194f7 | 732 | } |
99fd437d | 733 | |
b23046ab IM |
734 | build_append_and_cleanup_method(bus_table, method); |
735 | ||
736 | build_package(bus_table, 0x10); /* ScopeOp */ | |
737 | build_append_array(parent_scope, bus_table); | |
99fd437d | 738 | build_free_array(bus_table); |
72c194f7 MT |
739 | } |
740 | ||
72c194f7 MT |
741 | static void |
742 | build_ssdt(GArray *table_data, GArray *linker, | |
743 | AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc, | |
744 | PcPciInfo *pci, PcGuestInfo *guest_info) | |
745 | { | |
bef3492d IM |
746 | MachineState *machine = MACHINE(qdev_get_machine()); |
747 | uint32_t nr_mem = machine->ram_slots; | |
2fd71f1b | 748 | unsigned acpi_cpus = guest_info->apic_id_limit; |
20843d16 | 749 | Aml *ssdt, *sb_scope, *scope, *pkg, *dev, *method, *crs, *field, *ifctx; |
72c194f7 MT |
750 | int i; |
751 | ||
011bb749 | 752 | ssdt = init_aml_allocator(); |
2fd71f1b LE |
753 | /* The current AML generator can cover the APIC ID range [0..255], |
754 | * inclusive, for VCPU hotplug. */ | |
755 | QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256); | |
756 | g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT); | |
757 | ||
4ec8d2b3 IM |
758 | /* Reserve space for header */ |
759 | acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader)); | |
72c194f7 | 760 | |
500b11ea | 761 | scope = aml_scope("\\_SB.PCI0"); |
60efd429 IM |
762 | /* build PCI0._CRS */ |
763 | crs = aml_resource_template(); | |
764 | aml_append(crs, | |
765 | aml_word_bus_number(aml_min_fixed, aml_max_fixed, aml_pos_decode, | |
766 | 0x0000, 0x0000, 0x00FF, 0x0000, 0x0100)); | |
767 | aml_append(crs, aml_io(aml_decode16, 0x0CF8, 0x0CF8, 0x01, 0x08)); | |
768 | ||
769 | aml_append(crs, | |
770 | aml_word_io(aml_min_fixed, aml_max_fixed, | |
771 | aml_pos_decode, aml_entire_range, | |
772 | 0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8)); | |
d31c909e IM |
773 | aml_append(crs, |
774 | aml_word_io(aml_min_fixed, aml_max_fixed, | |
775 | aml_pos_decode, aml_entire_range, | |
776 | 0x0000, 0x0D00, 0xFFFF, 0x0000, 0xF300)); | |
60efd429 IM |
777 | aml_append(crs, |
778 | aml_dword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed, | |
779 | aml_cacheable, aml_ReadWrite, | |
780 | 0, 0x000A0000, 0x000BFFFF, 0, 0x00020000)); | |
781 | aml_append(crs, | |
782 | aml_dword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed, | |
783 | aml_non_cacheable, aml_ReadWrite, | |
784 | 0, pci->w32.begin, pci->w32.end - 1, 0, | |
785 | pci->w32.end - pci->w32.begin)); | |
786 | if (pci->w64.begin) { | |
787 | aml_append(crs, | |
788 | aml_qword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed, | |
789 | aml_cacheable, aml_ReadWrite, | |
790 | 0, pci->w64.begin, pci->w64.end - 1, 0, | |
791 | pci->w64.end - pci->w64.begin)); | |
792 | } | |
793 | aml_append(scope, aml_name_decl("_CRS", crs)); | |
794 | ||
d31c909e IM |
795 | /* reserve GPE0 block resources */ |
796 | dev = aml_device("GPE0"); | |
797 | aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06"))); | |
798 | aml_append(dev, aml_name_decl("_UID", aml_string("GPE0 resources"))); | |
799 | /* device present, functioning, decoding, not shown in UI */ | |
800 | aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); | |
801 | crs = aml_resource_template(); | |
802 | aml_append(crs, | |
803 | aml_io(aml_decode16, pm->gpe0_blk, pm->gpe0_blk, 1, pm->gpe0_blk_len) | |
804 | ); | |
805 | aml_append(dev, aml_name_decl("_CRS", crs)); | |
806 | aml_append(scope, dev); | |
807 | ||
500b11ea IM |
808 | /* reserve PCIHP resources */ |
809 | if (pm->pcihp_io_len) { | |
810 | dev = aml_device("PHPR"); | |
811 | aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06"))); | |
812 | aml_append(dev, | |
813 | aml_name_decl("_UID", aml_string("PCI Hotplug resources"))); | |
814 | /* device present, functioning, decoding, not shown in UI */ | |
815 | aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); | |
816 | crs = aml_resource_template(); | |
817 | aml_append(crs, | |
818 | aml_io(aml_decode16, pm->pcihp_io_base, pm->pcihp_io_base, 1, | |
819 | pm->pcihp_io_len) | |
820 | ); | |
821 | aml_append(dev, aml_name_decl("_CRS", crs)); | |
822 | aml_append(scope, dev); | |
823 | } | |
824 | aml_append(ssdt, scope); | |
825 | ||
ebc3028f IM |
826 | /* create S3_ / S4_ / S5_ packages if necessary */ |
827 | scope = aml_scope("\\"); | |
828 | if (!pm->s3_disabled) { | |
829 | pkg = aml_package(4); | |
830 | aml_append(pkg, aml_int(1)); /* PM1a_CNT.SLP_TYP */ | |
831 | aml_append(pkg, aml_int(1)); /* PM1b_CNT.SLP_TYP, FIXME: not impl. */ | |
832 | aml_append(pkg, aml_int(0)); /* reserved */ | |
833 | aml_append(pkg, aml_int(0)); /* reserved */ | |
834 | aml_append(scope, aml_name_decl("_S3", pkg)); | |
835 | } | |
836 | ||
837 | if (!pm->s4_disabled) { | |
838 | pkg = aml_package(4); | |
839 | aml_append(pkg, aml_int(pm->s4_val)); /* PM1a_CNT.SLP_TYP */ | |
840 | /* PM1b_CNT.SLP_TYP, FIXME: not impl. */ | |
841 | aml_append(pkg, aml_int(pm->s4_val)); | |
842 | aml_append(pkg, aml_int(0)); /* reserved */ | |
843 | aml_append(pkg, aml_int(0)); /* reserved */ | |
844 | aml_append(scope, aml_name_decl("_S4", pkg)); | |
845 | } | |
846 | ||
847 | pkg = aml_package(4); | |
848 | aml_append(pkg, aml_int(0)); /* PM1a_CNT.SLP_TYP */ | |
849 | aml_append(pkg, aml_int(0)); /* PM1b_CNT.SLP_TYP not impl. */ | |
850 | aml_append(pkg, aml_int(0)); /* reserved */ | |
851 | aml_append(pkg, aml_int(0)); /* reserved */ | |
852 | aml_append(scope, aml_name_decl("_S5", pkg)); | |
853 | aml_append(ssdt, scope); | |
854 | ||
8ac6f7a6 IM |
855 | if (misc->applesmc_io_base) { |
856 | scope = aml_scope("\\_SB.PCI0.ISA"); | |
857 | dev = aml_device("SMC"); | |
858 | ||
859 | aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001"))); | |
860 | /* device present, functioning, decoding, not shown in UI */ | |
861 | aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); | |
862 | ||
863 | crs = aml_resource_template(); | |
864 | aml_append(crs, | |
865 | aml_io(aml_decode16, misc->applesmc_io_base, misc->applesmc_io_base, | |
866 | 0x01, APPLESMC_MAX_DATA_LENGTH) | |
867 | ); | |
868 | aml_append(crs, aml_irq_no_flags(6)); | |
869 | aml_append(dev, aml_name_decl("_CRS", crs)); | |
870 | ||
871 | aml_append(scope, dev); | |
872 | aml_append(ssdt, scope); | |
873 | } | |
874 | ||
cd61cb2e IM |
875 | if (misc->pvpanic_port) { |
876 | scope = aml_scope("\\_SB.PCI0.ISA"); | |
877 | ||
878 | dev = aml_device("PEVR"); | |
879 | aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); | |
880 | ||
881 | crs = aml_resource_template(); | |
882 | aml_append(crs, | |
883 | aml_io(aml_decode16, misc->pvpanic_port, misc->pvpanic_port, 1, 1) | |
884 | ); | |
885 | aml_append(dev, aml_name_decl("_CRS", crs)); | |
886 | ||
887 | aml_append(dev, aml_operation_region("PEOR", aml_system_io, | |
888 | misc->pvpanic_port, 1)); | |
889 | field = aml_field("PEOR", aml_byte_acc); | |
890 | aml_append(field, aml_named_field("PEPT", 8)); | |
891 | aml_append(dev, field); | |
892 | ||
893 | method = aml_method("RDPT", 0); | |
894 | aml_append(method, aml_store(aml_name("PEPT"), aml_local(0))); | |
895 | aml_append(method, aml_return(aml_local(0))); | |
896 | aml_append(dev, method); | |
897 | ||
898 | method = aml_method("WRPT", 1); | |
899 | aml_append(method, aml_store(aml_arg(0), aml_name("PEPT"))); | |
900 | aml_append(dev, method); | |
901 | ||
902 | aml_append(scope, dev); | |
903 | aml_append(ssdt, scope); | |
904 | } | |
905 | ||
011bb749 | 906 | sb_scope = aml_scope("_SB"); |
72c194f7 | 907 | { |
ddf1ec2f IM |
908 | /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */ |
909 | dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE)); | |
910 | aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06"))); | |
911 | aml_append(dev, | |
912 | aml_name_decl("_UID", aml_string("CPU Hotplug resources")) | |
913 | ); | |
914 | /* device present, functioning, decoding, not shown in UI */ | |
915 | aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); | |
916 | crs = aml_resource_template(); | |
917 | aml_append(crs, | |
918 | aml_io(aml_decode16, pm->cpu_hp_io_base, pm->cpu_hp_io_base, 1, | |
919 | pm->cpu_hp_io_len) | |
920 | ); | |
921 | aml_append(dev, aml_name_decl("_CRS", crs)); | |
922 | aml_append(sb_scope, dev); | |
923 | /* declare CPU hotplug MMIO region and PRS field to access it */ | |
924 | aml_append(sb_scope, aml_operation_region( | |
925 | "PRST", aml_system_io, pm->cpu_hp_io_base, pm->cpu_hp_io_len)); | |
926 | field = aml_field("PRST", aml_byte_acc); | |
927 | aml_append(field, aml_named_field("PRS", 256)); | |
928 | aml_append(sb_scope, field); | |
929 | ||
72c194f7 MT |
930 | /* build Processor object for each processor */ |
931 | for (i = 0; i < acpi_cpus; i++) { | |
20843d16 IM |
932 | dev = aml_processor(i, 0, 0, "CP%.02X", i); |
933 | ||
934 | method = aml_method("_MAT", 0); | |
935 | aml_append(method, aml_return(aml_call1("CPMA", aml_int(i)))); | |
936 | aml_append(dev, method); | |
937 | ||
938 | method = aml_method("_STA", 0); | |
939 | aml_append(method, aml_return(aml_call1("CPST", aml_int(i)))); | |
940 | aml_append(dev, method); | |
941 | ||
942 | method = aml_method("_EJ0", 1); | |
943 | aml_append(method, | |
944 | aml_return(aml_call2("CPEJ", aml_int(i), aml_arg(0))) | |
945 | ); | |
946 | aml_append(dev, method); | |
947 | ||
948 | aml_append(sb_scope, dev); | |
72c194f7 MT |
949 | } |
950 | ||
951 | /* build this code: | |
952 | * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...} | |
953 | */ | |
954 | /* Arg0 = Processor ID = APIC ID */ | |
20843d16 IM |
955 | method = aml_method("NTFY", 2); |
956 | for (i = 0; i < acpi_cpus; i++) { | |
957 | ifctx = aml_if(aml_equal(aml_arg(0), aml_int(i))); | |
958 | aml_append(ifctx, | |
959 | aml_notify(aml_name("CP%.02X", i), aml_arg(1)) | |
960 | ); | |
961 | aml_append(method, ifctx); | |
962 | } | |
963 | aml_append(sb_scope, method); | |
964 | ||
965 | /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" | |
966 | * | |
967 | * Note: The ability to create variable-sized packages was first | |
968 | * ntroduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages | |
969 | * ith up to 255 elements. Windows guests up to win2k8 fail when | |
970 | * VarPackageOp is used. | |
971 | */ | |
972 | pkg = acpi_cpus <= 255 ? aml_package(acpi_cpus) : | |
973 | aml_varpackage(acpi_cpus); | |
72c194f7 | 974 | |
20843d16 IM |
975 | for (i = 0; i < acpi_cpus; i++) { |
976 | uint8_t b = test_bit(i, cpu->found_cpus) ? 0x01 : 0x00; | |
977 | aml_append(pkg, aml_int(b)); | |
72c194f7 | 978 | } |
20843d16 | 979 | aml_append(sb_scope, aml_name_decl("CPON", pkg)); |
72c194f7 | 980 | |
8698c0c0 IM |
981 | /* build memory devices */ |
982 | assert(nr_mem <= ACPI_MAX_RAM_SLOTS); | |
2c6b94d8 IM |
983 | scope = aml_scope("\\_SB.PCI0." stringify(MEMORY_HOTPLUG_DEVICE)); |
984 | aml_append(scope, | |
985 | aml_name_decl(stringify(MEMORY_SLOTS_NUMBER), aml_int(nr_mem)) | |
986 | ); | |
987 | ||
988 | crs = aml_resource_template(); | |
989 | aml_append(crs, | |
990 | aml_io(aml_decode16, pm->mem_hp_io_base, pm->mem_hp_io_base, 0, | |
991 | pm->mem_hp_io_len) | |
992 | ); | |
993 | aml_append(scope, aml_name_decl("_CRS", crs)); | |
994 | ||
995 | aml_append(scope, aml_operation_region( | |
996 | stringify(MEMORY_HOTPLUG_IO_REGION), aml_system_io, | |
997 | pm->mem_hp_io_base, pm->mem_hp_io_len) | |
998 | ); | |
999 | ||
1000 | field = aml_field(stringify(MEMORY_HOTPLUG_IO_REGION), aml_dword_acc); | |
1001 | aml_append(field, /* read only */ | |
1002 | aml_named_field(stringify(MEMORY_SLOT_ADDR_LOW), 32)); | |
1003 | aml_append(field, /* read only */ | |
1004 | aml_named_field(stringify(MEMORY_SLOT_ADDR_HIGH), 32)); | |
1005 | aml_append(field, /* read only */ | |
1006 | aml_named_field(stringify(MEMORY_SLOT_SIZE_LOW), 32)); | |
1007 | aml_append(field, /* read only */ | |
1008 | aml_named_field(stringify(MEMORY_SLOT_SIZE_HIGH), 32)); | |
1009 | aml_append(field, /* read only */ | |
1010 | aml_named_field(stringify(MEMORY_SLOT_PROXIMITY), 32)); | |
1011 | aml_append(scope, field); | |
1012 | ||
1013 | field = aml_field(stringify(MEMORY_HOTPLUG_IO_REGION), aml_byte_acc); | |
1014 | aml_append(field, aml_reserved_field(160 /* bits, Offset(20) */)); | |
1015 | aml_append(field, /* 1 if enabled, read only */ | |
1016 | aml_named_field(stringify(MEMORY_SLOT_ENABLED), 1)); | |
1017 | aml_append(field, | |
1018 | /*(read) 1 if has a insert event. (write) 1 to clear event */ | |
1019 | aml_named_field(stringify(MEMORY_SLOT_INSERT_EVENT), 1)); | |
1020 | aml_append(scope, field); | |
1021 | ||
1022 | field = aml_field(stringify(MEMORY_HOTPLUG_IO_REGION), aml_dword_acc); | |
1023 | aml_append(field, /* DIMM selector, write only */ | |
1024 | aml_named_field(stringify(MEMORY_SLOT_SLECTOR), 32)); | |
1025 | aml_append(field, /* _OST event code, write only */ | |
1026 | aml_named_field(stringify(MEMORY_SLOT_OST_EVENT), 32)); | |
1027 | aml_append(field, /* _OST status code, write only */ | |
1028 | aml_named_field(stringify(MEMORY_SLOT_OST_STATUS), 32)); | |
1029 | aml_append(scope, field); | |
1030 | ||
1031 | aml_append(sb_scope, scope); | |
8698c0c0 IM |
1032 | |
1033 | for (i = 0; i < nr_mem; i++) { | |
1034 | #define BASEPATH "\\_SB.PCI0." stringify(MEMORY_HOTPLUG_DEVICE) "." | |
1035 | const char *s; | |
1036 | ||
1037 | dev = aml_device("MP%02X", i); | |
1038 | aml_append(dev, aml_name_decl("_UID", aml_string("0x%02X", i))); | |
1039 | aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0C80"))); | |
bef3492d | 1040 | |
8698c0c0 IM |
1041 | method = aml_method("_CRS", 0); |
1042 | s = BASEPATH stringify(MEMORY_SLOT_CRS_METHOD); | |
1043 | aml_append(method, aml_return(aml_call1(s, aml_name("_UID")))); | |
1044 | aml_append(dev, method); | |
1045 | ||
1046 | method = aml_method("_STA", 0); | |
1047 | s = BASEPATH stringify(MEMORY_SLOT_STATUS_METHOD); | |
1048 | aml_append(method, aml_return(aml_call1(s, aml_name("_UID")))); | |
1049 | aml_append(dev, method); | |
1050 | ||
1051 | method = aml_method("_PXM", 0); | |
1052 | s = BASEPATH stringify(MEMORY_SLOT_PROXIMITY_METHOD); | |
1053 | aml_append(method, aml_return(aml_call1(s, aml_name("_UID")))); | |
1054 | aml_append(dev, method); | |
1055 | ||
1056 | method = aml_method("_OST", 3); | |
1057 | s = BASEPATH stringify(MEMORY_SLOT_OST_METHOD); | |
1058 | aml_append(method, aml_return(aml_call4( | |
1059 | s, aml_name("_UID"), aml_arg(0), aml_arg(1), aml_arg(2) | |
1060 | ))); | |
1061 | aml_append(dev, method); | |
1062 | ||
1063 | aml_append(sb_scope, dev); | |
bef3492d IM |
1064 | } |
1065 | ||
8698c0c0 IM |
1066 | /* build Method(MEMORY_SLOT_NOTIFY_METHOD, 2) { |
1067 | * If (LEqual(Arg0, 0x00)) {Notify(MP00, Arg1)} ... | |
1068 | */ | |
1069 | method = aml_method(stringify(MEMORY_SLOT_NOTIFY_METHOD), 2); | |
1070 | for (i = 0; i < nr_mem; i++) { | |
1071 | ifctx = aml_if(aml_equal(aml_arg(0), aml_int(i))); | |
1072 | aml_append(ifctx, | |
1073 | aml_notify(aml_name("MP%.02X", i), aml_arg(1)) | |
1074 | ); | |
1075 | aml_append(method, ifctx); | |
1076 | } | |
1077 | aml_append(sb_scope, method); | |
1078 | ||
72c194f7 | 1079 | { |
8dcf525a MT |
1080 | Object *pci_host; |
1081 | PCIBus *bus = NULL; | |
1082 | bool ambiguous; | |
1083 | ||
1084 | pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); | |
1085 | if (!ambiguous && pci_host) { | |
1086 | bus = PCI_HOST_BRIDGE(pci_host)->bus; | |
1087 | } | |
72c194f7 | 1088 | |
99fd437d MT |
1089 | if (bus) { |
1090 | /* Scan all PCI buses. Generate tables to support hotplug. */ | |
b23046ab IM |
1091 | build_append_pci_bus_devices(sb_scope->buf, bus, |
1092 | pm->pcihp_bridge_en); | |
72c194f7 | 1093 | } |
72c194f7 | 1094 | } |
011bb749 | 1095 | aml_append(ssdt, sb_scope); |
72c194f7 MT |
1096 | } |
1097 | ||
011bb749 IM |
1098 | /* copy AML table into ACPI tables blob and patch header there */ |
1099 | g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len); | |
72c194f7 | 1100 | build_header(linker, table_data, |
011bb749 IM |
1101 | (void *)(table_data->data + table_data->len - ssdt->buf->len), |
1102 | "SSDT", ssdt->buf->len, 1); | |
1103 | free_aml_allocator(); | |
72c194f7 MT |
1104 | } |
1105 | ||
1106 | static void | |
1107 | build_hpet(GArray *table_data, GArray *linker) | |
1108 | { | |
1109 | Acpi20Hpet *hpet; | |
1110 | ||
1111 | hpet = acpi_data_push(table_data, sizeof(*hpet)); | |
1112 | /* Note timer_block_id value must be kept in sync with value advertised by | |
1113 | * emulated hpet | |
1114 | */ | |
1115 | hpet->timer_block_id = cpu_to_le32(0x8086a201); | |
1116 | hpet->addr.address = cpu_to_le64(HPET_BASE); | |
1117 | build_header(linker, table_data, | |
821e3227 | 1118 | (void *)hpet, "HPET", sizeof(*hpet), 1); |
72c194f7 MT |
1119 | } |
1120 | ||
711b20b4 | 1121 | static void |
42a5b308 | 1122 | build_tpm_tcpa(GArray *table_data, GArray *linker, GArray *tcpalog) |
711b20b4 SB |
1123 | { |
1124 | Acpi20Tcpa *tcpa = acpi_data_push(table_data, sizeof *tcpa); | |
42a5b308 | 1125 | uint64_t log_area_start_address = acpi_data_len(tcpalog); |
711b20b4 SB |
1126 | |
1127 | tcpa->platform_class = cpu_to_le16(TPM_TCPA_ACPI_CLASS_CLIENT); | |
1128 | tcpa->log_area_minimum_length = cpu_to_le32(TPM_LOG_AREA_MINIMUM_SIZE); | |
1129 | tcpa->log_area_start_address = cpu_to_le64(log_area_start_address); | |
1130 | ||
42a5b308 SB |
1131 | bios_linker_loader_alloc(linker, ACPI_BUILD_TPMLOG_FILE, 1, |
1132 | false /* high memory */); | |
1133 | ||
711b20b4 SB |
1134 | /* log area start address to be filled by Guest linker */ |
1135 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, | |
42a5b308 | 1136 | ACPI_BUILD_TPMLOG_FILE, |
711b20b4 SB |
1137 | table_data, &tcpa->log_area_start_address, |
1138 | sizeof(tcpa->log_area_start_address)); | |
1139 | ||
1140 | build_header(linker, table_data, | |
1141 | (void *)tcpa, "TCPA", sizeof(*tcpa), 2); | |
1142 | ||
42a5b308 | 1143 | acpi_data_push(tcpalog, TPM_LOG_AREA_MINIMUM_SIZE); |
711b20b4 SB |
1144 | } |
1145 | ||
1146 | static void | |
1147 | build_tpm_ssdt(GArray *table_data, GArray *linker) | |
1148 | { | |
1149 | void *tpm_ptr; | |
1150 | ||
1151 | tpm_ptr = acpi_data_push(table_data, sizeof(ssdt_tpm_aml)); | |
1152 | memcpy(tpm_ptr, ssdt_tpm_aml, sizeof(ssdt_tpm_aml)); | |
1153 | } | |
1154 | ||
04ed3ea8 IM |
1155 | typedef enum { |
1156 | MEM_AFFINITY_NOFLAGS = 0, | |
1157 | MEM_AFFINITY_ENABLED = (1 << 0), | |
1158 | MEM_AFFINITY_HOTPLUGGABLE = (1 << 1), | |
1159 | MEM_AFFINITY_NON_VOLATILE = (1 << 2), | |
1160 | } MemoryAffinityFlags; | |
1161 | ||
72c194f7 | 1162 | static void |
04ed3ea8 IM |
1163 | acpi_build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, |
1164 | uint64_t len, int node, MemoryAffinityFlags flags) | |
72c194f7 MT |
1165 | { |
1166 | numamem->type = ACPI_SRAT_MEMORY; | |
1167 | numamem->length = sizeof(*numamem); | |
1168 | memset(numamem->proximity, 0, 4); | |
1169 | numamem->proximity[0] = node; | |
04ed3ea8 | 1170 | numamem->flags = cpu_to_le32(flags); |
72c194f7 MT |
1171 | numamem->base_addr = cpu_to_le64(base); |
1172 | numamem->range_length = cpu_to_le64(len); | |
1173 | } | |
1174 | ||
1175 | static void | |
dd0247e0 | 1176 | build_srat(GArray *table_data, GArray *linker, PcGuestInfo *guest_info) |
72c194f7 MT |
1177 | { |
1178 | AcpiSystemResourceAffinityTable *srat; | |
1179 | AcpiSratProcessorAffinity *core; | |
1180 | AcpiSratMemoryAffinity *numamem; | |
1181 | ||
1182 | int i; | |
1183 | uint64_t curnode; | |
1184 | int srat_start, numa_start, slots; | |
1185 | uint64_t mem_len, mem_base, next_base; | |
cec65193 IM |
1186 | PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); |
1187 | ram_addr_t hotplugabble_address_space_size = | |
1188 | object_property_get_int(OBJECT(pcms), PC_MACHINE_MEMHP_REGION_SIZE, | |
1189 | NULL); | |
72c194f7 MT |
1190 | |
1191 | srat_start = table_data->len; | |
1192 | ||
1193 | srat = acpi_data_push(table_data, sizeof *srat); | |
1194 | srat->reserved1 = cpu_to_le32(1); | |
1195 | core = (void *)(srat + 1); | |
1196 | ||
1197 | for (i = 0; i < guest_info->apic_id_limit; ++i) { | |
1198 | core = acpi_data_push(table_data, sizeof *core); | |
1199 | core->type = ACPI_SRAT_PROCESSOR; | |
1200 | core->length = sizeof(*core); | |
1201 | core->local_apic_id = i; | |
1202 | curnode = guest_info->node_cpu[i]; | |
1203 | core->proximity_lo = curnode; | |
1204 | memset(core->proximity_hi, 0, 3); | |
1205 | core->local_sapic_eid = 0; | |
dd0247e0 | 1206 | core->flags = cpu_to_le32(1); |
72c194f7 MT |
1207 | } |
1208 | ||
1209 | ||
1210 | /* the memory map is a bit tricky, it contains at least one hole | |
1211 | * from 640k-1M and possibly another one from 3.5G-4G. | |
1212 | */ | |
1213 | next_base = 0; | |
1214 | numa_start = table_data->len; | |
1215 | ||
1216 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 | 1217 | acpi_build_srat_memory(numamem, 0, 640*1024, 0, MEM_AFFINITY_ENABLED); |
72c194f7 MT |
1218 | next_base = 1024 * 1024; |
1219 | for (i = 1; i < guest_info->numa_nodes + 1; ++i) { | |
1220 | mem_base = next_base; | |
1221 | mem_len = guest_info->node_mem[i - 1]; | |
1222 | if (i == 1) { | |
1223 | mem_len -= 1024 * 1024; | |
1224 | } | |
1225 | next_base = mem_base + mem_len; | |
1226 | ||
1227 | /* Cut out the ACPI_PCI hole */ | |
4c8a949b EH |
1228 | if (mem_base <= guest_info->ram_size_below_4g && |
1229 | next_base > guest_info->ram_size_below_4g) { | |
1230 | mem_len -= next_base - guest_info->ram_size_below_4g; | |
72c194f7 MT |
1231 | if (mem_len > 0) { |
1232 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 IM |
1233 | acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, |
1234 | MEM_AFFINITY_ENABLED); | |
72c194f7 MT |
1235 | } |
1236 | mem_base = 1ULL << 32; | |
4c8a949b EH |
1237 | mem_len = next_base - guest_info->ram_size_below_4g; |
1238 | next_base += (1ULL << 32) - guest_info->ram_size_below_4g; | |
72c194f7 MT |
1239 | } |
1240 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 IM |
1241 | acpi_build_srat_memory(numamem, mem_base, mem_len, i - 1, |
1242 | MEM_AFFINITY_ENABLED); | |
72c194f7 MT |
1243 | } |
1244 | slots = (table_data->len - numa_start) / sizeof *numamem; | |
1245 | for (; slots < guest_info->numa_nodes + 2; slots++) { | |
1246 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
04ed3ea8 | 1247 | acpi_build_srat_memory(numamem, 0, 0, 0, MEM_AFFINITY_NOFLAGS); |
72c194f7 MT |
1248 | } |
1249 | ||
cec65193 IM |
1250 | /* |
1251 | * Entry is required for Windows to enable memory hotplug in OS. | |
1252 | * Memory devices may override proximity set by this entry, | |
1253 | * providing _PXM method if necessary. | |
1254 | */ | |
1255 | if (hotplugabble_address_space_size) { | |
1256 | numamem = acpi_data_push(table_data, sizeof *numamem); | |
1257 | acpi_build_srat_memory(numamem, pcms->hotplug_memory_base, | |
1258 | hotplugabble_address_space_size, 0, | |
1259 | MEM_AFFINITY_HOTPLUGGABLE | | |
1260 | MEM_AFFINITY_ENABLED); | |
1261 | } | |
1262 | ||
72c194f7 MT |
1263 | build_header(linker, table_data, |
1264 | (void *)(table_data->data + srat_start), | |
821e3227 | 1265 | "SRAT", |
72c194f7 MT |
1266 | table_data->len - srat_start, 1); |
1267 | } | |
1268 | ||
1269 | static void | |
1270 | build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info) | |
1271 | { | |
1272 | AcpiTableMcfg *mcfg; | |
821e3227 | 1273 | const char *sig; |
72c194f7 MT |
1274 | int len = sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); |
1275 | ||
1276 | mcfg = acpi_data_push(table_data, len); | |
1277 | mcfg->allocation[0].address = cpu_to_le64(info->mcfg_base); | |
1278 | /* Only a single allocation so no need to play with segments */ | |
1279 | mcfg->allocation[0].pci_segment = cpu_to_le16(0); | |
1280 | mcfg->allocation[0].start_bus_number = 0; | |
1281 | mcfg->allocation[0].end_bus_number = PCIE_MMCFG_BUS(info->mcfg_size - 1); | |
1282 | ||
1283 | /* MCFG is used for ECAM which can be enabled or disabled by guest. | |
1284 | * To avoid table size changes (which create migration issues), | |
1285 | * always create the table even if there are no allocations, | |
1286 | * but set the signature to a reserved value in this case. | |
1287 | * ACPI spec requires OSPMs to ignore such tables. | |
1288 | */ | |
1289 | if (info->mcfg_base == PCIE_BASE_ADDR_UNMAPPED) { | |
821e3227 MT |
1290 | /* Reserved signature: ignored by OSPM */ |
1291 | sig = "QEMU"; | |
72c194f7 | 1292 | } else { |
821e3227 | 1293 | sig = "MCFG"; |
72c194f7 MT |
1294 | } |
1295 | build_header(linker, table_data, (void *)mcfg, sig, len, 1); | |
1296 | } | |
1297 | ||
d4eb9119 LT |
1298 | static void |
1299 | build_dmar_q35(GArray *table_data, GArray *linker) | |
1300 | { | |
1301 | int dmar_start = table_data->len; | |
1302 | ||
1303 | AcpiTableDmar *dmar; | |
1304 | AcpiDmarHardwareUnit *drhd; | |
1305 | ||
1306 | dmar = acpi_data_push(table_data, sizeof(*dmar)); | |
1307 | dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1; | |
1308 | dmar->flags = 0; /* No intr_remap for now */ | |
1309 | ||
1310 | /* DMAR Remapping Hardware Unit Definition structure */ | |
1311 | drhd = acpi_data_push(table_data, sizeof(*drhd)); | |
1312 | drhd->type = cpu_to_le16(ACPI_DMAR_TYPE_HARDWARE_UNIT); | |
1313 | drhd->length = cpu_to_le16(sizeof(*drhd)); /* No device scope now */ | |
1314 | drhd->flags = ACPI_DMAR_INCLUDE_PCI_ALL; | |
1315 | drhd->pci_segment = cpu_to_le16(0); | |
1316 | drhd->address = cpu_to_le64(Q35_HOST_BRIDGE_IOMMU_ADDR); | |
1317 | ||
1318 | build_header(linker, table_data, (void *)(table_data->data + dmar_start), | |
1319 | "DMAR", table_data->len - dmar_start, 1); | |
1320 | } | |
1321 | ||
72c194f7 MT |
1322 | static void |
1323 | build_dsdt(GArray *table_data, GArray *linker, AcpiMiscInfo *misc) | |
1324 | { | |
53db092a MT |
1325 | AcpiTableHeader *dsdt; |
1326 | ||
72c194f7 | 1327 | assert(misc->dsdt_code && misc->dsdt_size); |
53db092a | 1328 | |
72c194f7 MT |
1329 | dsdt = acpi_data_push(table_data, misc->dsdt_size); |
1330 | memcpy(dsdt, misc->dsdt_code, misc->dsdt_size); | |
53db092a MT |
1331 | |
1332 | memset(dsdt, 0, sizeof *dsdt); | |
821e3227 | 1333 | build_header(linker, table_data, dsdt, "DSDT", |
53db092a | 1334 | misc->dsdt_size, 1); |
72c194f7 MT |
1335 | } |
1336 | ||
1337 | /* Build final rsdt table */ | |
1338 | static void | |
1339 | build_rsdt(GArray *table_data, GArray *linker, GArray *table_offsets) | |
1340 | { | |
1341 | AcpiRsdtDescriptorRev1 *rsdt; | |
1342 | size_t rsdt_len; | |
1343 | int i; | |
1344 | ||
1345 | rsdt_len = sizeof(*rsdt) + sizeof(uint32_t) * table_offsets->len; | |
1346 | rsdt = acpi_data_push(table_data, rsdt_len); | |
1347 | memcpy(rsdt->table_offset_entry, table_offsets->data, | |
1348 | sizeof(uint32_t) * table_offsets->len); | |
1349 | for (i = 0; i < table_offsets->len; ++i) { | |
1350 | /* rsdt->table_offset_entry to be filled by Guest linker */ | |
1351 | bios_linker_loader_add_pointer(linker, | |
1352 | ACPI_BUILD_TABLE_FILE, | |
1353 | ACPI_BUILD_TABLE_FILE, | |
1354 | table_data, &rsdt->table_offset_entry[i], | |
1355 | sizeof(uint32_t)); | |
1356 | } | |
1357 | build_header(linker, table_data, | |
821e3227 | 1358 | (void *)rsdt, "RSDT", rsdt_len, 1); |
72c194f7 MT |
1359 | } |
1360 | ||
1361 | static GArray * | |
1362 | build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt) | |
1363 | { | |
1364 | AcpiRsdpDescriptor *rsdp = acpi_data_push(rsdp_table, sizeof *rsdp); | |
1365 | ||
d67aadcc | 1366 | bios_linker_loader_alloc(linker, ACPI_BUILD_RSDP_FILE, 16, |
72c194f7 MT |
1367 | true /* fseg memory */); |
1368 | ||
821e3227 | 1369 | memcpy(&rsdp->signature, "RSD PTR ", 8); |
72c194f7 MT |
1370 | memcpy(rsdp->oem_id, ACPI_BUILD_APPNAME6, 6); |
1371 | rsdp->rsdt_physical_address = cpu_to_le32(rsdt); | |
1372 | /* Address to be filled by Guest linker */ | |
1373 | bios_linker_loader_add_pointer(linker, ACPI_BUILD_RSDP_FILE, | |
1374 | ACPI_BUILD_TABLE_FILE, | |
1375 | rsdp_table, &rsdp->rsdt_physical_address, | |
1376 | sizeof rsdp->rsdt_physical_address); | |
1377 | rsdp->checksum = 0; | |
1378 | /* Checksum to be filled by Guest linker */ | |
1379 | bios_linker_loader_add_checksum(linker, ACPI_BUILD_RSDP_FILE, | |
1380 | rsdp, rsdp, sizeof *rsdp, &rsdp->checksum); | |
1381 | ||
1382 | return rsdp_table; | |
1383 | } | |
1384 | ||
1385 | typedef | |
1386 | struct AcpiBuildTables { | |
1387 | GArray *table_data; | |
1388 | GArray *rsdp; | |
42a5b308 | 1389 | GArray *tcpalog; |
72c194f7 MT |
1390 | GArray *linker; |
1391 | } AcpiBuildTables; | |
1392 | ||
1393 | static inline void acpi_build_tables_init(AcpiBuildTables *tables) | |
1394 | { | |
1395 | tables->rsdp = g_array_new(false, true /* clear */, 1); | |
1396 | tables->table_data = g_array_new(false, true /* clear */, 1); | |
42a5b308 | 1397 | tables->tcpalog = g_array_new(false, true /* clear */, 1); |
72c194f7 MT |
1398 | tables->linker = bios_linker_loader_init(); |
1399 | } | |
1400 | ||
1401 | static inline void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre) | |
1402 | { | |
1403 | void *linker_data = bios_linker_loader_cleanup(tables->linker); | |
ac369a77 | 1404 | g_free(linker_data); |
afaa2e4b | 1405 | g_array_free(tables->rsdp, true); |
ac369a77 | 1406 | g_array_free(tables->table_data, true); |
42a5b308 | 1407 | g_array_free(tables->tcpalog, mfre); |
72c194f7 MT |
1408 | } |
1409 | ||
1410 | typedef | |
1411 | struct AcpiBuildState { | |
1412 | /* Copy of table in RAM (for patching). */ | |
ad5b88b1 | 1413 | ram_addr_t table_ram; |
72c194f7 MT |
1414 | /* Is table patched? */ |
1415 | uint8_t patched; | |
1416 | PcGuestInfo *guest_info; | |
d70414a5 | 1417 | void *rsdp; |
42d85900 | 1418 | ram_addr_t rsdp_ram; |
6e00619b | 1419 | ram_addr_t linker_ram; |
72c194f7 MT |
1420 | } AcpiBuildState; |
1421 | ||
1422 | static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) | |
1423 | { | |
1424 | Object *pci_host; | |
1425 | QObject *o; | |
1426 | bool ambiguous; | |
1427 | ||
1428 | pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); | |
1429 | g_assert(!ambiguous); | |
1430 | g_assert(pci_host); | |
1431 | ||
1432 | o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_BASE, NULL); | |
1433 | if (!o) { | |
1434 | return false; | |
1435 | } | |
1436 | mcfg->mcfg_base = qint_get_int(qobject_to_qint(o)); | |
097a97a6 | 1437 | qobject_decref(o); |
72c194f7 MT |
1438 | |
1439 | o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL); | |
1440 | assert(o); | |
1441 | mcfg->mcfg_size = qint_get_int(qobject_to_qint(o)); | |
097a97a6 | 1442 | qobject_decref(o); |
72c194f7 MT |
1443 | return true; |
1444 | } | |
1445 | ||
d4eb9119 LT |
1446 | static bool acpi_has_iommu(void) |
1447 | { | |
1448 | bool ambiguous; | |
1449 | Object *intel_iommu; | |
1450 | ||
1451 | intel_iommu = object_resolve_path_type("", TYPE_INTEL_IOMMU_DEVICE, | |
1452 | &ambiguous); | |
1453 | return intel_iommu && !ambiguous; | |
1454 | } | |
1455 | ||
72c194f7 MT |
1456 | static |
1457 | void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables) | |
1458 | { | |
1459 | GArray *table_offsets; | |
07fb6176 | 1460 | unsigned facs, ssdt, dsdt, rsdt; |
72c194f7 MT |
1461 | AcpiCpuInfo cpu; |
1462 | AcpiPmInfo pm; | |
1463 | AcpiMiscInfo misc; | |
1464 | AcpiMcfgInfo mcfg; | |
1465 | PcPciInfo pci; | |
1466 | uint8_t *u; | |
07fb6176 | 1467 | size_t aml_len = 0; |
7c2c1fa5 | 1468 | GArray *tables_blob = tables->table_data; |
72c194f7 MT |
1469 | |
1470 | acpi_get_cpu_info(&cpu); | |
1471 | acpi_get_pm_info(&pm); | |
1472 | acpi_get_dsdt(&misc); | |
72c194f7 MT |
1473 | acpi_get_misc_info(&misc); |
1474 | acpi_get_pci_info(&pci); | |
1475 | ||
1476 | table_offsets = g_array_new(false, true /* clear */, | |
1477 | sizeof(uint32_t)); | |
8b310fc4 | 1478 | ACPI_BUILD_DPRINTF("init ACPI tables\n"); |
72c194f7 MT |
1479 | |
1480 | bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE, | |
1481 | 64 /* Ensure FACS is aligned */, | |
1482 | false /* high memory */); | |
1483 | ||
1484 | /* | |
1485 | * FACS is pointed to by FADT. | |
1486 | * We place it first since it's the only table that has alignment | |
1487 | * requirements. | |
1488 | */ | |
7c2c1fa5 IM |
1489 | facs = tables_blob->len; |
1490 | build_facs(tables_blob, tables->linker, guest_info); | |
72c194f7 MT |
1491 | |
1492 | /* DSDT is pointed to by FADT */ | |
7c2c1fa5 IM |
1493 | dsdt = tables_blob->len; |
1494 | build_dsdt(tables_blob, tables->linker, &misc); | |
72c194f7 | 1495 | |
07fb6176 PB |
1496 | /* Count the size of the DSDT and SSDT, we will need it for legacy |
1497 | * sizing of ACPI tables. | |
1498 | */ | |
7c2c1fa5 | 1499 | aml_len += tables_blob->len - dsdt; |
07fb6176 | 1500 | |
72c194f7 | 1501 | /* ACPI tables pointed to by RSDT */ |
7c2c1fa5 IM |
1502 | acpi_add_table(table_offsets, tables_blob); |
1503 | build_fadt(tables_blob, tables->linker, &pm, facs, dsdt); | |
72c194f7 | 1504 | |
7c2c1fa5 IM |
1505 | ssdt = tables_blob->len; |
1506 | acpi_add_table(table_offsets, tables_blob); | |
1507 | build_ssdt(tables_blob, tables->linker, &cpu, &pm, &misc, &pci, | |
72c194f7 | 1508 | guest_info); |
7c2c1fa5 | 1509 | aml_len += tables_blob->len - ssdt; |
72c194f7 | 1510 | |
7c2c1fa5 IM |
1511 | acpi_add_table(table_offsets, tables_blob); |
1512 | build_madt(tables_blob, tables->linker, &cpu, guest_info); | |
9ac1c4c0 | 1513 | |
72c194f7 | 1514 | if (misc.has_hpet) { |
7c2c1fa5 IM |
1515 | acpi_add_table(table_offsets, tables_blob); |
1516 | build_hpet(tables_blob, tables->linker); | |
711b20b4 SB |
1517 | } |
1518 | if (misc.has_tpm) { | |
7c2c1fa5 IM |
1519 | acpi_add_table(table_offsets, tables_blob); |
1520 | build_tpm_tcpa(tables_blob, tables->linker, tables->tcpalog); | |
711b20b4 | 1521 | |
7c2c1fa5 IM |
1522 | acpi_add_table(table_offsets, tables_blob); |
1523 | build_tpm_ssdt(tables_blob, tables->linker); | |
72c194f7 MT |
1524 | } |
1525 | if (guest_info->numa_nodes) { | |
7c2c1fa5 IM |
1526 | acpi_add_table(table_offsets, tables_blob); |
1527 | build_srat(tables_blob, tables->linker, guest_info); | |
72c194f7 MT |
1528 | } |
1529 | if (acpi_get_mcfg(&mcfg)) { | |
7c2c1fa5 IM |
1530 | acpi_add_table(table_offsets, tables_blob); |
1531 | build_mcfg_q35(tables_blob, tables->linker, &mcfg); | |
72c194f7 | 1532 | } |
d4eb9119 | 1533 | if (acpi_has_iommu()) { |
7c2c1fa5 IM |
1534 | acpi_add_table(table_offsets, tables_blob); |
1535 | build_dmar_q35(tables_blob, tables->linker); | |
d4eb9119 | 1536 | } |
72c194f7 MT |
1537 | |
1538 | /* Add tables supplied by user (if any) */ | |
1539 | for (u = acpi_table_first(); u; u = acpi_table_next(u)) { | |
1540 | unsigned len = acpi_table_len(u); | |
1541 | ||
7c2c1fa5 IM |
1542 | acpi_add_table(table_offsets, tables_blob); |
1543 | g_array_append_vals(tables_blob, u, len); | |
72c194f7 MT |
1544 | } |
1545 | ||
1546 | /* RSDT is pointed to by RSDP */ | |
7c2c1fa5 IM |
1547 | rsdt = tables_blob->len; |
1548 | build_rsdt(tables_blob, tables->linker, table_offsets); | |
72c194f7 MT |
1549 | |
1550 | /* RSDP is in FSEG memory, so allocate it separately */ | |
1551 | build_rsdp(tables->rsdp, tables->linker, rsdt); | |
1552 | ||
07fb6176 | 1553 | /* We'll expose it all to Guest so we want to reduce |
72c194f7 | 1554 | * chance of size changes. |
07fb6176 PB |
1555 | * |
1556 | * We used to align the tables to 4k, but of course this would | |
1557 | * too simple to be enough. 4k turned out to be too small an | |
1558 | * alignment very soon, and in fact it is almost impossible to | |
1559 | * keep the table size stable for all (max_cpus, max_memory_slots) | |
1560 | * combinations. So the table size is always 64k for pc-i440fx-2.1 | |
1561 | * and we give an error if the table grows beyond that limit. | |
1562 | * | |
1563 | * We still have the problem of migrating from "-M pc-i440fx-2.0". For | |
1564 | * that, we exploit the fact that QEMU 2.1 generates _smaller_ tables | |
1565 | * than 2.0 and we can always pad the smaller tables with zeros. We can | |
1566 | * then use the exact size of the 2.0 tables. | |
1567 | * | |
1568 | * All this is for PIIX4, since QEMU 2.0 didn't support Q35 migration. | |
72c194f7 | 1569 | */ |
07fb6176 PB |
1570 | if (guest_info->legacy_acpi_table_size) { |
1571 | /* Subtracting aml_len gives the size of fixed tables. Then add the | |
1572 | * size of the PIIX4 DSDT/SSDT in QEMU 2.0. | |
1573 | */ | |
1574 | int legacy_aml_len = | |
1575 | guest_info->legacy_acpi_table_size + | |
1576 | ACPI_BUILD_LEGACY_CPU_AML_SIZE * max_cpus; | |
1577 | int legacy_table_size = | |
7c2c1fa5 | 1578 | ROUND_UP(tables_blob->len - aml_len + legacy_aml_len, |
07fb6176 | 1579 | ACPI_BUILD_ALIGN_SIZE); |
7c2c1fa5 | 1580 | if (tables_blob->len > legacy_table_size) { |
07fb6176 | 1581 | /* Should happen only with PCI bridges and -M pc-i440fx-2.0. */ |
868270f2 | 1582 | error_report("Warning: migration may not work."); |
07fb6176 | 1583 | } |
7c2c1fa5 | 1584 | g_array_set_size(tables_blob, legacy_table_size); |
07fb6176 | 1585 | } else { |
868270f2 | 1586 | /* Make sure we have a buffer in case we need to resize the tables. */ |
7c2c1fa5 | 1587 | if (tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) { |
18045fb9 | 1588 | /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */ |
868270f2 MT |
1589 | error_report("Warning: ACPI tables are larger than 64k."); |
1590 | error_report("Warning: migration may not work."); | |
1591 | error_report("Warning: please remove CPUs, NUMA nodes, " | |
1592 | "memory slots or PCI bridges."); | |
18045fb9 | 1593 | } |
7c2c1fa5 | 1594 | acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE); |
07fb6176 | 1595 | } |
72c194f7 | 1596 | |
07fb6176 | 1597 | acpi_align_size(tables->linker, ACPI_BUILD_ALIGN_SIZE); |
72c194f7 MT |
1598 | |
1599 | /* Cleanup memory that's no longer used. */ | |
1600 | g_array_free(table_offsets, true); | |
1601 | } | |
1602 | ||
42d85900 MT |
1603 | static void acpi_ram_update(ram_addr_t ram, GArray *data) |
1604 | { | |
1605 | uint32_t size = acpi_data_len(data); | |
1606 | ||
1607 | /* Make sure RAM size is correct - in case it got changed e.g. by migration */ | |
1608 | qemu_ram_resize(ram, size, &error_abort); | |
1609 | ||
1610 | memcpy(qemu_get_ram_ptr(ram), data->data, size); | |
1611 | cpu_physical_memory_set_dirty_range_nocode(ram, size); | |
1612 | } | |
1613 | ||
72c194f7 MT |
1614 | static void acpi_build_update(void *build_opaque, uint32_t offset) |
1615 | { | |
1616 | AcpiBuildState *build_state = build_opaque; | |
1617 | AcpiBuildTables tables; | |
1618 | ||
1619 | /* No state to update or already patched? Nothing to do. */ | |
1620 | if (!build_state || build_state->patched) { | |
1621 | return; | |
1622 | } | |
1623 | build_state->patched = 1; | |
1624 | ||
1625 | acpi_build_tables_init(&tables); | |
1626 | ||
1627 | acpi_build(build_state->guest_info, &tables); | |
1628 | ||
42d85900 | 1629 | acpi_ram_update(build_state->table_ram, tables.table_data); |
a1666142 | 1630 | |
42d85900 MT |
1631 | if (build_state->rsdp) { |
1632 | memcpy(build_state->rsdp, tables.rsdp->data, acpi_data_len(tables.rsdp)); | |
1633 | } else { | |
1634 | acpi_ram_update(build_state->rsdp_ram, tables.rsdp); | |
1635 | } | |
ad5b88b1 | 1636 | |
42d85900 | 1637 | acpi_ram_update(build_state->linker_ram, tables.linker); |
72c194f7 MT |
1638 | acpi_build_tables_cleanup(&tables, true); |
1639 | } | |
1640 | ||
1641 | static void acpi_build_reset(void *build_opaque) | |
1642 | { | |
1643 | AcpiBuildState *build_state = build_opaque; | |
1644 | build_state->patched = 0; | |
1645 | } | |
1646 | ||
ad5b88b1 | 1647 | static ram_addr_t acpi_add_rom_blob(AcpiBuildState *build_state, GArray *blob, |
a1666142 | 1648 | const char *name, uint64_t max_size) |
72c194f7 | 1649 | { |
a1666142 MT |
1650 | return rom_add_blob(name, blob->data, acpi_data_len(blob), max_size, -1, |
1651 | name, acpi_build_update, build_state); | |
72c194f7 MT |
1652 | } |
1653 | ||
1654 | static const VMStateDescription vmstate_acpi_build = { | |
1655 | .name = "acpi_build", | |
1656 | .version_id = 1, | |
1657 | .minimum_version_id = 1, | |
d49805ae | 1658 | .fields = (VMStateField[]) { |
72c194f7 MT |
1659 | VMSTATE_UINT8(patched, AcpiBuildState), |
1660 | VMSTATE_END_OF_LIST() | |
1661 | }, | |
1662 | }; | |
1663 | ||
1664 | void acpi_setup(PcGuestInfo *guest_info) | |
1665 | { | |
1666 | AcpiBuildTables tables; | |
1667 | AcpiBuildState *build_state; | |
1668 | ||
1669 | if (!guest_info->fw_cfg) { | |
8b310fc4 | 1670 | ACPI_BUILD_DPRINTF("No fw cfg. Bailing out.\n"); |
72c194f7 MT |
1671 | return; |
1672 | } | |
1673 | ||
1674 | if (!guest_info->has_acpi_build) { | |
8b310fc4 | 1675 | ACPI_BUILD_DPRINTF("ACPI build disabled. Bailing out.\n"); |
72c194f7 MT |
1676 | return; |
1677 | } | |
1678 | ||
81adc513 | 1679 | if (!acpi_enabled) { |
8b310fc4 | 1680 | ACPI_BUILD_DPRINTF("ACPI disabled. Bailing out.\n"); |
81adc513 MT |
1681 | return; |
1682 | } | |
1683 | ||
72c194f7 MT |
1684 | build_state = g_malloc0(sizeof *build_state); |
1685 | ||
1686 | build_state->guest_info = guest_info; | |
1687 | ||
99fd437d MT |
1688 | acpi_set_pci_info(); |
1689 | ||
72c194f7 MT |
1690 | acpi_build_tables_init(&tables); |
1691 | acpi_build(build_state->guest_info, &tables); | |
1692 | ||
1693 | /* Now expose it all to Guest */ | |
1694 | build_state->table_ram = acpi_add_rom_blob(build_state, tables.table_data, | |
a1666142 MT |
1695 | ACPI_BUILD_TABLE_FILE, |
1696 | ACPI_BUILD_TABLE_MAX_SIZE); | |
ad5b88b1 | 1697 | assert(build_state->table_ram != RAM_ADDR_MAX); |
72c194f7 | 1698 | |
6e00619b IM |
1699 | build_state->linker_ram = |
1700 | acpi_add_rom_blob(build_state, tables.linker, "etc/table-loader", 0); | |
72c194f7 | 1701 | |
42a5b308 SB |
1702 | fw_cfg_add_file(guest_info->fw_cfg, ACPI_BUILD_TPMLOG_FILE, |
1703 | tables.tcpalog->data, acpi_data_len(tables.tcpalog)); | |
1704 | ||
384fb32e | 1705 | if (!guest_info->rsdp_in_ram) { |
358774d7 IM |
1706 | /* |
1707 | * Keep for compatibility with old machine types. | |
1708 | * Though RSDP is small, its contents isn't immutable, so | |
afaa2e4b | 1709 | * we'll update it along with the rest of tables on guest access. |
358774d7 | 1710 | */ |
afaa2e4b MT |
1711 | uint32_t rsdp_size = acpi_data_len(tables.rsdp); |
1712 | ||
1713 | build_state->rsdp = g_memdup(tables.rsdp->data, rsdp_size); | |
358774d7 IM |
1714 | fw_cfg_add_file_callback(guest_info->fw_cfg, ACPI_BUILD_RSDP_FILE, |
1715 | acpi_build_update, build_state, | |
afaa2e4b | 1716 | build_state->rsdp, rsdp_size); |
42d85900 | 1717 | build_state->rsdp_ram = (ram_addr_t)-1; |
358774d7 | 1718 | } else { |
42d85900 MT |
1719 | build_state->rsdp = NULL; |
1720 | build_state->rsdp_ram = acpi_add_rom_blob(build_state, tables.rsdp, | |
1721 | ACPI_BUILD_RSDP_FILE, 0); | |
358774d7 | 1722 | } |
72c194f7 MT |
1723 | |
1724 | qemu_register_reset(acpi_build_reset, build_state); | |
1725 | acpi_build_reset(build_state); | |
1726 | vmstate_register(NULL, 0, &vmstate_acpi_build, build_state); | |
1727 | ||
1728 | /* Cleanup tables but don't free the memory: we track it | |
1729 | * in build_state. | |
1730 | */ | |
1731 | acpi_build_tables_cleanup(&tables, false); | |
1732 | } |