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0ebf007d SL |
1 | /* |
2 | * Copyright (c) 2018 Intel Corporation | |
3 | * Copyright (c) 2019 Red Hat, Inc. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2 or later, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | #include "qemu/osdep.h" | |
19 | #include "qemu/error-report.h" | |
20 | #include "qemu/cutils.h" | |
21 | #include "qemu/units.h" | |
22 | #include "qapi/error.h" | |
23 | #include "qapi/visitor.h" | |
24 | #include "qapi/qapi-visit-common.h" | |
25 | #include "sysemu/sysemu.h" | |
26 | #include "sysemu/cpus.h" | |
27 | #include "sysemu/numa.h" | |
28 | #include "sysemu/reset.h" | |
29 | ||
30 | #include "hw/loader.h" | |
31 | #include "hw/irq.h" | |
32 | #include "hw/kvm/clock.h" | |
33 | #include "hw/i386/microvm.h" | |
34 | #include "hw/i386/x86.h" | |
0ebf007d | 35 | #include "target/i386/cpu.h" |
852c27e2 | 36 | #include "hw/intc/i8259.h" |
0ebf007d | 37 | #include "hw/timer/i8254.h" |
673652a7 | 38 | #include "hw/rtc/mc146818rtc.h" |
0ebf007d SL |
39 | #include "hw/char/serial.h" |
40 | #include "hw/i386/topology.h" | |
41 | #include "hw/i386/e820_memory_layout.h" | |
42 | #include "hw/i386/fw_cfg.h" | |
43 | #include "hw/virtio/virtio-mmio.h" | |
44 | ||
45 | #include "cpu.h" | |
46 | #include "elf.h" | |
47 | #include "kvm_i386.h" | |
48 | #include "hw/xen/start_info.h" | |
49 | ||
3bee1d1d | 50 | #define MICROVM_QBOOT_FILENAME "qboot.rom" |
0ebf007d SL |
51 | |
52 | static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s) | |
53 | { | |
54 | X86MachineState *x86ms = X86_MACHINE(mms); | |
55 | int val; | |
56 | ||
57 | val = MIN(x86ms->below_4g_mem_size / KiB, 640); | |
58 | rtc_set_memory(s, 0x15, val); | |
59 | rtc_set_memory(s, 0x16, val >> 8); | |
60 | /* extended memory (next 64MiB) */ | |
61 | if (x86ms->below_4g_mem_size > 1 * MiB) { | |
62 | val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; | |
63 | } else { | |
64 | val = 0; | |
65 | } | |
66 | if (val > 65535) { | |
67 | val = 65535; | |
68 | } | |
69 | rtc_set_memory(s, 0x17, val); | |
70 | rtc_set_memory(s, 0x18, val >> 8); | |
71 | rtc_set_memory(s, 0x30, val); | |
72 | rtc_set_memory(s, 0x31, val >> 8); | |
73 | /* memory between 16MiB and 4GiB */ | |
74 | if (x86ms->below_4g_mem_size > 16 * MiB) { | |
75 | val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); | |
76 | } else { | |
77 | val = 0; | |
78 | } | |
79 | if (val > 65535) { | |
80 | val = 65535; | |
81 | } | |
82 | rtc_set_memory(s, 0x34, val); | |
83 | rtc_set_memory(s, 0x35, val >> 8); | |
84 | /* memory above 4GiB */ | |
85 | val = x86ms->above_4g_mem_size / 65536; | |
86 | rtc_set_memory(s, 0x5b, val); | |
87 | rtc_set_memory(s, 0x5c, val >> 8); | |
88 | rtc_set_memory(s, 0x5d, val >> 16); | |
89 | } | |
90 | ||
91 | static void microvm_gsi_handler(void *opaque, int n, int level) | |
92 | { | |
93 | GSIState *s = opaque; | |
94 | ||
95 | qemu_set_irq(s->ioapic_irq[n], level); | |
96 | } | |
97 | ||
98 | static void microvm_devices_init(MicrovmMachineState *mms) | |
99 | { | |
100 | X86MachineState *x86ms = X86_MACHINE(mms); | |
101 | ISABus *isa_bus; | |
102 | ISADevice *rtc_state; | |
103 | GSIState *gsi_state; | |
104 | int i; | |
105 | ||
106 | /* Core components */ | |
107 | ||
108 | gsi_state = g_malloc0(sizeof(*gsi_state)); | |
109 | if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { | |
110 | x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); | |
111 | } else { | |
112 | x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler, | |
113 | gsi_state, GSI_NUM_PINS); | |
114 | } | |
115 | ||
116 | isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(), | |
117 | &error_abort); | |
118 | isa_bus_irqs(isa_bus, x86ms->gsi); | |
119 | ||
120 | ioapic_init_gsi(gsi_state, "machine"); | |
121 | ||
122 | kvmclock_create(); | |
123 | ||
d4e9d577 | 124 | mms->virtio_irq_base = 5; |
0ebf007d SL |
125 | for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) { |
126 | sysbus_create_simple("virtio-mmio", | |
127 | VIRTIO_MMIO_BASE + i * 512, | |
d4e9d577 | 128 | x86ms->gsi[mms->virtio_irq_base + i]); |
0ebf007d SL |
129 | } |
130 | ||
131 | /* Optional and legacy devices */ | |
132 | ||
133 | if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) { | |
134 | qemu_irq *i8259; | |
135 | ||
89a289c7 | 136 | i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq()); |
0ebf007d SL |
137 | for (i = 0; i < ISA_NUM_IRQS; i++) { |
138 | gsi_state->i8259_irq[i] = i8259[i]; | |
139 | } | |
140 | g_free(i8259); | |
141 | } | |
142 | ||
143 | if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) { | |
144 | if (kvm_pit_in_kernel()) { | |
145 | kvm_pit_init(isa_bus, 0x40); | |
146 | } else { | |
147 | i8254_pit_init(isa_bus, 0x40, 0, NULL); | |
148 | } | |
149 | } | |
150 | ||
151 | if (mms->rtc == ON_OFF_AUTO_ON || | |
152 | (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) { | |
153 | rtc_state = mc146818_rtc_init(isa_bus, 2000, NULL); | |
154 | microvm_set_rtc(mms, rtc_state); | |
155 | } | |
156 | ||
157 | if (mms->isa_serial) { | |
158 | serial_hds_isa_init(isa_bus, 0, 1); | |
159 | } | |
160 | ||
161 | if (bios_name == NULL) { | |
3bee1d1d | 162 | bios_name = MICROVM_QBOOT_FILENAME; |
0ebf007d SL |
163 | } |
164 | x86_bios_rom_init(get_system_memory(), true); | |
165 | } | |
166 | ||
167 | static void microvm_memory_init(MicrovmMachineState *mms) | |
168 | { | |
169 | MachineState *machine = MACHINE(mms); | |
170 | X86MachineState *x86ms = X86_MACHINE(mms); | |
9ad54686 | 171 | MemoryRegion *ram_below_4g, *ram_above_4g; |
0ebf007d SL |
172 | MemoryRegion *system_memory = get_system_memory(); |
173 | FWCfgState *fw_cfg; | |
e289655c | 174 | ram_addr_t lowmem = 0xc0000000; /* 3G */ |
0ebf007d SL |
175 | int i; |
176 | ||
0ebf007d SL |
177 | if (machine->ram_size > lowmem) { |
178 | x86ms->above_4g_mem_size = machine->ram_size - lowmem; | |
179 | x86ms->below_4g_mem_size = lowmem; | |
180 | } else { | |
181 | x86ms->above_4g_mem_size = 0; | |
182 | x86ms->below_4g_mem_size = machine->ram_size; | |
183 | } | |
184 | ||
0ebf007d | 185 | ram_below_4g = g_malloc(sizeof(*ram_below_4g)); |
9ad54686 | 186 | memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, |
0ebf007d SL |
187 | 0, x86ms->below_4g_mem_size); |
188 | memory_region_add_subregion(system_memory, 0, ram_below_4g); | |
189 | ||
190 | e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); | |
191 | ||
192 | if (x86ms->above_4g_mem_size > 0) { | |
193 | ram_above_4g = g_malloc(sizeof(*ram_above_4g)); | |
9ad54686 IM |
194 | memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", |
195 | machine->ram, | |
0ebf007d SL |
196 | x86ms->below_4g_mem_size, |
197 | x86ms->above_4g_mem_size); | |
198 | memory_region_add_subregion(system_memory, 0x100000000ULL, | |
199 | ram_above_4g); | |
200 | e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); | |
201 | } | |
202 | ||
203 | fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, | |
204 | &address_space_memory); | |
205 | ||
206 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus); | |
207 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus); | |
208 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); | |
209 | fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override()); | |
210 | fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, | |
211 | &e820_reserve, sizeof(e820_reserve)); | |
212 | fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, | |
213 | sizeof(struct e820_entry) * e820_get_num_entries()); | |
214 | ||
215 | rom_set_fw(fw_cfg); | |
216 | ||
217 | if (machine->kernel_filename != NULL) { | |
218 | x86_load_linux(x86ms, fw_cfg, 0, true, true); | |
219 | } | |
220 | ||
221 | if (mms->option_roms) { | |
222 | for (i = 0; i < nb_option_roms; i++) { | |
223 | rom_add_option(option_rom[i].name, option_rom[i].bootindex); | |
224 | } | |
225 | } | |
226 | ||
227 | x86ms->fw_cfg = fw_cfg; | |
228 | x86ms->ioapic_as = &address_space_memory; | |
229 | } | |
230 | ||
d4e9d577 | 231 | static gchar *microvm_get_mmio_cmdline(gchar *name, uint32_t virtio_irq_base) |
0ebf007d SL |
232 | { |
233 | gchar *cmdline; | |
234 | gchar *separator; | |
235 | long int index; | |
236 | int ret; | |
237 | ||
238 | separator = g_strrstr(name, "."); | |
239 | if (!separator) { | |
240 | return NULL; | |
241 | } | |
242 | ||
243 | if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) { | |
244 | return NULL; | |
245 | } | |
246 | ||
247 | cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN); | |
248 | ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN, | |
249 | " virtio_mmio.device=512@0x%lx:%ld", | |
250 | VIRTIO_MMIO_BASE + index * 512, | |
d4e9d577 | 251 | virtio_irq_base + index); |
0ebf007d SL |
252 | if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) { |
253 | g_free(cmdline); | |
254 | return NULL; | |
255 | } | |
256 | ||
257 | return cmdline; | |
258 | } | |
259 | ||
260 | static void microvm_fix_kernel_cmdline(MachineState *machine) | |
261 | { | |
262 | X86MachineState *x86ms = X86_MACHINE(machine); | |
d4e9d577 | 263 | MicrovmMachineState *mms = MICROVM_MACHINE(machine); |
0ebf007d SL |
264 | BusState *bus; |
265 | BusChild *kid; | |
266 | char *cmdline; | |
267 | ||
268 | /* | |
269 | * Find MMIO transports with attached devices, and add them to the kernel | |
270 | * command line. | |
271 | * | |
272 | * Yes, this is a hack, but one that heavily improves the UX without | |
273 | * introducing any significant issues. | |
274 | */ | |
275 | cmdline = g_strdup(machine->kernel_cmdline); | |
276 | bus = sysbus_get_default(); | |
277 | QTAILQ_FOREACH(kid, &bus->children, sibling) { | |
278 | DeviceState *dev = kid->child; | |
279 | ObjectClass *class = object_get_class(OBJECT(dev)); | |
280 | ||
281 | if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) { | |
282 | VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev)); | |
283 | VirtioBusState *mmio_virtio_bus = &mmio->bus; | |
284 | BusState *mmio_bus = &mmio_virtio_bus->parent_obj; | |
285 | ||
286 | if (!QTAILQ_EMPTY(&mmio_bus->children)) { | |
d4e9d577 GH |
287 | gchar *mmio_cmdline = microvm_get_mmio_cmdline |
288 | (mmio_bus->name, mms->virtio_irq_base); | |
0ebf007d SL |
289 | if (mmio_cmdline) { |
290 | char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL); | |
291 | g_free(mmio_cmdline); | |
292 | g_free(cmdline); | |
293 | cmdline = newcmd; | |
294 | } | |
295 | } | |
296 | } | |
297 | } | |
298 | ||
299 | fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1); | |
300 | fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline); | |
c3157b74 SL |
301 | |
302 | g_free(cmdline); | |
0ebf007d SL |
303 | } |
304 | ||
305 | static void microvm_machine_state_init(MachineState *machine) | |
306 | { | |
307 | MicrovmMachineState *mms = MICROVM_MACHINE(machine); | |
308 | X86MachineState *x86ms = X86_MACHINE(machine); | |
309 | Error *local_err = NULL; | |
310 | ||
311 | microvm_memory_init(mms); | |
312 | ||
313 | x86_cpus_init(x86ms, CPU_VERSION_LATEST); | |
314 | if (local_err) { | |
315 | error_report_err(local_err); | |
316 | exit(1); | |
317 | } | |
318 | ||
319 | microvm_devices_init(mms); | |
320 | } | |
321 | ||
322 | static void microvm_machine_reset(MachineState *machine) | |
323 | { | |
324 | MicrovmMachineState *mms = MICROVM_MACHINE(machine); | |
325 | CPUState *cs; | |
326 | X86CPU *cpu; | |
327 | ||
328 | if (machine->kernel_filename != NULL && | |
329 | mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) { | |
330 | microvm_fix_kernel_cmdline(machine); | |
331 | mms->kernel_cmdline_fixed = true; | |
332 | } | |
333 | ||
334 | qemu_devices_reset(); | |
335 | ||
336 | CPU_FOREACH(cs) { | |
337 | cpu = X86_CPU(cs); | |
338 | ||
339 | if (cpu->apic_state) { | |
f703a04c | 340 | device_legacy_reset(cpu->apic_state); |
0ebf007d SL |
341 | } |
342 | } | |
343 | } | |
344 | ||
345 | static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name, | |
346 | void *opaque, Error **errp) | |
347 | { | |
348 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
349 | OnOffAuto pic = mms->pic; | |
350 | ||
351 | visit_type_OnOffAuto(v, name, &pic, errp); | |
352 | } | |
353 | ||
354 | static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name, | |
355 | void *opaque, Error **errp) | |
356 | { | |
357 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
358 | ||
359 | visit_type_OnOffAuto(v, name, &mms->pic, errp); | |
360 | } | |
361 | ||
362 | static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name, | |
363 | void *opaque, Error **errp) | |
364 | { | |
365 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
366 | OnOffAuto pit = mms->pit; | |
367 | ||
368 | visit_type_OnOffAuto(v, name, &pit, errp); | |
369 | } | |
370 | ||
371 | static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name, | |
372 | void *opaque, Error **errp) | |
373 | { | |
374 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
375 | ||
376 | visit_type_OnOffAuto(v, name, &mms->pit, errp); | |
377 | } | |
378 | ||
379 | static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name, | |
380 | void *opaque, Error **errp) | |
381 | { | |
382 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
383 | OnOffAuto rtc = mms->rtc; | |
384 | ||
385 | visit_type_OnOffAuto(v, name, &rtc, errp); | |
386 | } | |
387 | ||
388 | static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name, | |
389 | void *opaque, Error **errp) | |
390 | { | |
391 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
392 | ||
393 | visit_type_OnOffAuto(v, name, &mms->rtc, errp); | |
394 | } | |
395 | ||
396 | static bool microvm_machine_get_isa_serial(Object *obj, Error **errp) | |
397 | { | |
398 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
399 | ||
400 | return mms->isa_serial; | |
401 | } | |
402 | ||
403 | static void microvm_machine_set_isa_serial(Object *obj, bool value, | |
404 | Error **errp) | |
405 | { | |
406 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
407 | ||
408 | mms->isa_serial = value; | |
409 | } | |
410 | ||
411 | static bool microvm_machine_get_option_roms(Object *obj, Error **errp) | |
412 | { | |
413 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
414 | ||
415 | return mms->option_roms; | |
416 | } | |
417 | ||
418 | static void microvm_machine_set_option_roms(Object *obj, bool value, | |
419 | Error **errp) | |
420 | { | |
421 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
422 | ||
423 | mms->option_roms = value; | |
424 | } | |
425 | ||
426 | static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp) | |
427 | { | |
428 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
429 | ||
430 | return mms->auto_kernel_cmdline; | |
431 | } | |
432 | ||
433 | static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value, | |
434 | Error **errp) | |
435 | { | |
436 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
437 | ||
438 | mms->auto_kernel_cmdline = value; | |
439 | } | |
440 | ||
441 | static void microvm_machine_initfn(Object *obj) | |
442 | { | |
443 | MicrovmMachineState *mms = MICROVM_MACHINE(obj); | |
444 | ||
445 | /* Configuration */ | |
446 | mms->pic = ON_OFF_AUTO_AUTO; | |
447 | mms->pit = ON_OFF_AUTO_AUTO; | |
448 | mms->rtc = ON_OFF_AUTO_AUTO; | |
449 | mms->isa_serial = true; | |
450 | mms->option_roms = true; | |
451 | mms->auto_kernel_cmdline = true; | |
452 | ||
453 | /* State */ | |
454 | mms->kernel_cmdline_fixed = false; | |
455 | } | |
456 | ||
457 | static void microvm_class_init(ObjectClass *oc, void *data) | |
458 | { | |
459 | MachineClass *mc = MACHINE_CLASS(oc); | |
460 | ||
461 | mc->init = microvm_machine_state_init; | |
462 | ||
463 | mc->family = "microvm_i386"; | |
464 | mc->desc = "microvm (i386)"; | |
465 | mc->units_per_default_bus = 1; | |
466 | mc->no_floppy = 1; | |
467 | mc->max_cpus = 288; | |
468 | mc->has_hotpluggable_cpus = false; | |
469 | mc->auto_enable_numa_with_memhp = false; | |
195784a0 | 470 | mc->auto_enable_numa_with_memdev = false; |
0ebf007d SL |
471 | mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; |
472 | mc->nvdimm_supported = false; | |
9ad54686 | 473 | mc->default_ram_id = "microvm.ram"; |
0ebf007d SL |
474 | |
475 | /* Avoid relying too much on kernel components */ | |
476 | mc->default_kernel_irqchip_split = true; | |
477 | ||
478 | /* Machine class handlers */ | |
479 | mc->reset = microvm_machine_reset; | |
480 | ||
481 | object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto", | |
482 | microvm_machine_get_pic, | |
483 | microvm_machine_set_pic, | |
d2623129 | 484 | NULL, NULL); |
0ebf007d | 485 | object_class_property_set_description(oc, MICROVM_MACHINE_PIC, |
7eecec7d | 486 | "Enable i8259 PIC"); |
0ebf007d SL |
487 | |
488 | object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto", | |
489 | microvm_machine_get_pit, | |
490 | microvm_machine_set_pit, | |
d2623129 | 491 | NULL, NULL); |
0ebf007d | 492 | object_class_property_set_description(oc, MICROVM_MACHINE_PIT, |
7eecec7d | 493 | "Enable i8254 PIT"); |
0ebf007d SL |
494 | |
495 | object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", | |
496 | microvm_machine_get_rtc, | |
497 | microvm_machine_set_rtc, | |
d2623129 | 498 | NULL, NULL); |
0ebf007d | 499 | object_class_property_set_description(oc, MICROVM_MACHINE_RTC, |
7eecec7d | 500 | "Enable MC146818 RTC"); |
0ebf007d SL |
501 | |
502 | object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL, | |
503 | microvm_machine_get_isa_serial, | |
d2623129 | 504 | microvm_machine_set_isa_serial); |
0ebf007d | 505 | object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL, |
7eecec7d | 506 | "Set off to disable the instantiation an ISA serial port"); |
0ebf007d SL |
507 | |
508 | object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS, | |
509 | microvm_machine_get_option_roms, | |
d2623129 | 510 | microvm_machine_set_option_roms); |
0ebf007d | 511 | object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS, |
7eecec7d | 512 | "Set off to disable loading option ROMs"); |
0ebf007d SL |
513 | |
514 | object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, | |
515 | microvm_machine_get_auto_kernel_cmdline, | |
d2623129 | 516 | microvm_machine_set_auto_kernel_cmdline); |
0ebf007d SL |
517 | object_class_property_set_description(oc, |
518 | MICROVM_MACHINE_AUTO_KERNEL_CMDLINE, | |
7eecec7d | 519 | "Set off to disable adding virtio-mmio devices to the kernel cmdline"); |
0ebf007d SL |
520 | } |
521 | ||
522 | static const TypeInfo microvm_machine_info = { | |
523 | .name = TYPE_MICROVM_MACHINE, | |
524 | .parent = TYPE_X86_MACHINE, | |
525 | .instance_size = sizeof(MicrovmMachineState), | |
526 | .instance_init = microvm_machine_initfn, | |
527 | .class_size = sizeof(MicrovmMachineClass), | |
528 | .class_init = microvm_class_init, | |
529 | .interfaces = (InterfaceInfo[]) { | |
530 | { } | |
531 | }, | |
532 | }; | |
533 | ||
534 | static void microvm_machine_init(void) | |
535 | { | |
536 | type_register_static(µvm_machine_info); | |
537 | } | |
538 | type_init(microvm_machine_init); |