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hw/i386/pc: Confine system flash handling to pc_sysfw
[mirror_qemu.git] / hw / i386 / pc_piix.c
CommitLineData
845773ab
IY		 1/*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
b6a0aa05 25#include "qemu/osdep.h"
2becc36a 26#include CONFIG_DEVICES
ae0a5466 27
d471bf3e 28#include "qemu/units.h"
9cc44d9b 29#include "hw/char/parallel-isa.h"
503a35e7 30#include "hw/dma/i8257.h"
04920fc0 31#include "hw/loader.h"
549e984e 32#include "hw/i386/x86.h"
0d09e41a
PB		 33#include "hw/i386/pc.h"
34#include "hw/i386/apic.h"
0fd61a2d 35#include "hw/pci-host/i440fx.h"
f0bc6bf7 36#include "hw/rtc/mc146818rtc.h"
fff123b8 37#include "hw/southbridge/piix.h"
94692dcd 38#include "hw/display/ramfb.h"
83c9f4ca
PB		 39#include "hw/pci/pci.h"
40#include "hw/pci/pci_ids.h"
41#include "hw/usb.h"
1422e32d 42#include "net/net.h"
794093e8 43#include "hw/ide/isa.h"
df45d38f 44#include "hw/ide/pci.h"
64552b6b 45#include "hw/irq.h"
9c17d615 46#include "sysemu/kvm.h"
a09ef8ff 47#include "hw/i386/kvm/clock.h"
83c9f4ca 48#include "hw/sysbus.h"
93198b6c 49#include "hw/i2c/smbus_eeprom.h"
022c62cb 50#include "exec/memory.h"
0445259b 51#include "hw/acpi/acpi.h"
e688df6b 52#include "qapi/error.h"
c87b1520 53#include "qemu/error-report.h"
da278d58 54#include "sysemu/xen.h"
29d3ccde 55#ifdef CONFIG_XEN
998250e9
TC		 56#include <xen/hvm/hvm_info_table.h>
57#include "hw/xen/xen_pt.h"
29d3ccde 58#endif
e2abfe5e
DW		 59#include "hw/xen/xen-x86.h"
60#include "hw/xen/xen.h"
84a899de 61#include "migration/global_state.h"
c4b63b7c 62#include "migration/misc.h"
3bfe5716 63#include "sysemu/numa.h"
cab78e7c 64#include "hw/hyperv/vmbus-bridge.h"
4b997690 65#include "hw/mem/nvdimm.h"
5c94b826 66#include "hw/i386/acpi-build.h"
f5cc5a5c 67#include "kvm/kvm-cpu.h"
d1aa2f50 68#include "target/i386/cpu.h"
845773ab 69
60a9eb57 70#define XEN_IOAPIC_NUM_PIRQS 128ULL
845773ab 71
60386ea2 72#ifdef CONFIG_IDE_ISA
845773ab
IY		 73static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
74static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
75static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
60386ea2 76#endif
845773ab 77
738c2eb4
BB		 78/*
79 * Return the global irq number corresponding to a given device irq
80 * pin. We could also use the bus number to have a more precise mapping.
81 */
82static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx)
83{
84 int slot_addend;
85 slot_addend = PCI_SLOT(pci_dev->devfn) - 1;
86 return (pci_intx + slot_addend) & 3;
87}
88
89965db4
BB		 89static void piix_intx_routing_notifier_xen(PCIDevice *dev)
90{
91 int i;
92
ebd92d6d 93 /* Scan for updates to PCI link routes. */
89965db4 94 for (i = 0; i < PIIX_NUM_PIRQS; i++) {
ebd92d6d
BB		 95 const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i);
96 const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0;
89965db4
BB		 97 xen_set_pci_link_route(i, v);
98 }
99}
100
845773ab 101/* PC hardware initialisation */
76d39ab4
TC		 102static void pc_init1(MachineState *machine,
103 const char *host_type, const char *pci_type)
845773ab 104{
ec68007a 105 PCMachineState *pcms = PC_MACHINE(machine);
7102fa70 106 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
f0bb276b 107 X86MachineState *x86ms = X86_MACHINE(machine);
1e099556
EH		 108 MemoryRegion *system_memory = get_system_memory();
109 MemoryRegion *system_io = get_system_io();
c589f7cf 110 PCIBus *pci_bus = NULL;
48a18b3c 111 ISABus *isa_bus;
0a15cf08 112 Object *piix4_pm = NULL;
2ba154cf 113 qemu_irq smi_irq;
b881fbe9 114 GSIState *gsi_state;
1d914fa0 115 ISADevice *rtc_state;
ae0a5466 116 MemoryRegion *ram_memory;
b90d7bff
BB		 117 MemoryRegion *pci_memory = NULL;
118 MemoryRegion *rom_memory = system_memory;
c87b1520 119 ram_addr_t lowmem;
b90d7bff 120 uint64_t hole64_size = 0;
845773ab 121
8156d480
GH		 122 /*
123 * Calculate ram split, for memory below and above 4G. It's a bit
124 * complicated for backward compatibility reasons ...
125 *
126 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
127 * default value for max_ram_below_4g now.
128 *
129 * - Then, to gigabyte align the memory, we move the split to 3G
130 * (lowmem = 0xc0000000). But only in case we have to split in
131 * the first place, i.e. ram_size is larger than (traditional)
132 * lowmem. And for new machine types (gigabyte_align = true)
133 * only, for live migration compatibility reasons.
134 *
135 * - Next the max-ram-below-4g option was added, which allowed to
136 * reduce lowmem to a smaller value, to allow a larger PCI I/O
137 * window below 4G. qemu doesn't enforce gigabyte alignment here,
138 * but prints a warning.
139 *
140 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
141 * so legacy non-PAE guests can get as much memory as possible in
142 * the 32bit address space below 4G.
143 *
5650ac00
PMD		 144 * - Note that Xen has its own ram setup code in xen_ram_init(),
145 * called via xen_hvm_init_pc().
5ec7d098 146 *
8156d480
GH		 147 * Examples:
148 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
149 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
150 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
151 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
ecdbfceb 152 */
5ec7d098 153 if (xen_enabled()) {
5650ac00 154 xen_hvm_init_pc(pcms, &ram_memory);
5ec7d098 155 } else {
f9fddaf7 156 ram_memory = machine->ram;
9a45729d
GH		 157 if (!pcms->max_ram_below_4g) {
158 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
5ec7d098 159 }
9a45729d
GH		 160 lowmem = pcms->max_ram_below_4g;
161 if (machine->ram_size >= pcms->max_ram_below_4g) {
5ec7d098
GH		 162 if (pcmc->gigabyte_align) {
163 if (lowmem > 0xc0000000) {
164 lowmem = 0xc0000000;
165 }
d471bf3e 166 if (lowmem & (1 * GiB - 1)) {
3dc6f869
AF		 167 warn_report("Large machine and max_ram_below_4g "
168 "(%" PRIu64 ") not a multiple of 1G; "
169 "possible bad performance.",
9a45729d 170 pcms->max_ram_below_4g);
5ec7d098 171 }
8156d480 172 }
c87b1520 173 }
c87b1520 174
5ec7d098 175 if (machine->ram_size >= lowmem) {
f0bb276b
PB		 176 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
177 x86ms->below_4g_mem_size = lowmem;
5ec7d098 178 } else {
f0bb276b
PB		 179 x86ms->above_4g_mem_size = 0;
180 x86ms->below_4g_mem_size = machine->ram_size;
5ec7d098 181 }
3c2a9669
DS		 182 }
183
fb6986a2 184 pc_machine_init_sgx_epc(pcms);
703a548a 185 x86_cpus_init(x86ms, pcmc->default_cpu_version);
3c2a9669 186
b797c98d 187 if (kvm_enabled() && pcmc->kvmclock_enabled) {
8700a984 188 kvmclock_create(pcmc->kvmclock_create_always);
3c2a9669
DS		 189 }
190
7102fa70 191 if (pcmc->pci_enabled) {
c589f7cf
BB		 192 Object *phb;
193
4463aee6 194 pci_memory = g_new(MemoryRegion, 1);
286690e3 195 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
4463aee6 196 rom_memory = pci_memory;
c589f7cf 197
ce5ac09a
BB		 198 phb = OBJECT(qdev_new(host_type));
199 object_property_add_child(OBJECT(machine), "i440fx", phb);
c589f7cf
BB		 200 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
201 OBJECT(ram_memory), &error_fatal);
202 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM,
203 OBJECT(pci_memory), &error_fatal);
204 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM,
205 OBJECT(system_memory), &error_fatal);
206 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM,
207 OBJECT(system_io), &error_fatal);
208 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE,
209 x86ms->below_4g_mem_size, &error_fatal);
210 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
211 x86ms->above_4g_mem_size, &error_fatal);
212 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type,
213 &error_fatal);
214 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
215
216 pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
217 pci_bus_map_irqs(pci_bus,
218 xen_enabled() ? xen_pci_slot_get_pirq
219 : pc_pci_slot_get_pirq);
220 pcms->bus = pci_bus;
221
ce5ac09a 222 hole64_size = object_property_get_uint(phb,
c48eb7a4
JM		 223 PCI_HOST_PROP_PCI_HOLE64_SIZE,
224 &error_abort);
4463aee6 225 }
ae0a5466 226
845773ab 227 /* allocate ram and load rom/bios */
29d3ccde 228 if (!xen_enabled()) {
f9fddaf7 229 pc_memory_init(pcms, system_memory, rom_memory, hole64_size);
dd29b5c3 230 } else {
82feef45
BB		 231 assert(machine->ram_size == x86ms->below_4g_mem_size +
232 x86ms->above_4g_mem_size);
233
dd29b5c3
PD		 234 if (machine->kernel_filename != NULL) {
235 /* For xen HVM direct kernel boot, load linux here */
236 xen_load_linux(pcms);
237 }
29d3ccde 238 }
845773ab 239
417258f1 240 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
845773ab 241
7102fa70 242 if (pcmc->pci_enabled) {
988fb613 243 PCIDevice *pci_dev;
001cb25f
BB		 244 DeviceState *dev;
245 size_t i;
48bc99a0 246
aa0c9aec 247 pci_dev = pci_new_multifunction(-1, pcms->south_bridge);
6fe4464c
BB		 248 object_property_set_bool(OBJECT(pci_dev), "has-usb",
249 machine_usb(machine), &error_abort);
0a15cf08
BB		 250 object_property_set_bool(OBJECT(pci_dev), "has-acpi",
251 x86_machine_is_acpi_enabled(x86ms),
252 &error_abort);
2d7630f5
BB		 253 object_property_set_bool(OBJECT(pci_dev), "has-pic", false,
254 &error_abort);
ac433035
BB		 255 object_property_set_bool(OBJECT(pci_dev), "has-pit", false,
256 &error_abort);
0a15cf08
BB		 257 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
258 object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
259 x86_machine_is_smm_enabled(x86ms),
260 &error_abort);
001cb25f
BB		 261 dev = DEVICE(pci_dev);
262 for (i = 0; i < ISA_NUM_IRQS; i++) {
263 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]);
264 }
fe9a7350 265 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
60a9eb57
BB		 266
267 if (xen_enabled()) {
89965db4
BB		 268 pci_device_set_intx_routing_notifier(
269 pci_dev, piix_intx_routing_notifier_xen);
270
60a9eb57
BB		 271 /*
272 * Xen supports additional interrupt routes from the PCI devices to
273 * the IOAPIC: the four pins of each PCI device on the bus are also
274 * connected to the IOAPIC directly.
275 * These additional routes can be discovered through ACPI.
276 */
277 pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev,
278 XEN_IOAPIC_NUM_PIRQS);
279 }
280
b9a8b8d2 281 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
f0bc6bf7
BB		 282 rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
283 "rtc"));
0a15cf08 284 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
e47e5a5b
BB		 285 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
286 pci_ide_create_devs(PCI_DEVICE(dev));
2df87da1
PM		 287 pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0");
288 pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1");
845773ab 289 } else {
8631743c 290 isa_bus = isa_bus_new(NULL, system_memory, system_io,
d10e5432 291 &error_abort);
64127940 292 isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
f0bc6bf7
BB		 293
294 rtc_state = isa_new(TYPE_MC146818_RTC);
295 qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000);
296 isa_realize_and_unref(rtc_state, isa_bus, &error_fatal);
297
5e37bc49 298 i8257_dma_init(OBJECT(machine), isa_bus, 0);
0259c78c 299 pcms->hpet_enabled = false;
845773ab 300 }
845773ab 301
c300bbe8
XL		 302 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
303 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
304 }
4bae1efe 305
7102fa70 306 if (pcmc->pci_enabled) {
a39e3564 307 ioapic_init_gsi(gsi_state, "i440fx");
4bae1efe
RH		 308 }
309
6f529b75
PB		 310 if (tcg_enabled()) {
311 x86_register_ferr_irq(x86ms->gsi[13]);
312 }
845773ab 313
7102fa70 314 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
01195b73 315
7fb1cf16 316 assert(pcms->vmport != ON_OFF_AUTO__MAX);
ec68007a
EH		 317 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
318 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
d1048bef
DS		 319 }
320
845773ab 321 /* init basic PC hardware */
87af48a4 322 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, true,
f5878b03 323 0x4);
845773ab 324
7d6eff13 325 pc_nic_init(pcmc, isa_bus, pci_bus);
845773ab 326
60386ea2 327#ifdef CONFIG_IDE_ISA
16bd024b 328 if (!pcmc->pci_enabled) {
be1765f3 329 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
c9d6da3a 330 int i;
be1765f3
BZ		 331
332 ide_drive_get(hd, ARRAY_SIZE(hd));
c9d6da3a 333 for (i = 0; i < MAX_IDE_BUS; i++) {
c0897e0c 334 ISADevice *dev;
61de3676 335 char busname[] = "ide.0";
48a18b3c
HP		 336 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
337 ide_irq[i],
c0897e0c 338 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
61de3676
AG		 339 /*
340 * The ide bus name is ide.0 for the first bus and ide.1 for the
341 * second one.
342 */
343 busname[4] = '0' + i;
2df87da1 344 pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
845773ab
IY		 345 }
346 }
60386ea2 347#endif
845773ab 348
2df87da1 349 pc_cmos_init(pcms, rtc_state);
16bd024b 350
0a15cf08 351 if (piix4_pm) {
2ba154cf 352 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
ee7318bc 353
b49e9442 354 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq);
19eb2a0d 355 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c"));
845773ab 356 /* TODO: Populate SPD eeprom data. */
ebe15582 357 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
781bbd6b
IM		 358
359 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
360 TYPE_HOTPLUG_HANDLER,
50aef131 361 (Object **)&x86ms->acpi_dev,
781bbd6b 362 object_property_allow_set_link,
d2623129 363 OBJ_PROP_LINK_STRONG);
5325cc34 364 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
0a15cf08 365 piix4_pm, &error_abort);
845773ab
IY		 366 }
367
f6a0d06b
EA		 368 if (machine->nvdimms_state->is_enabled) {
369 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
5c94b826 370 x86_nvdimm_acpi_dsmio,
f0bb276b 371 x86ms->fw_cfg, OBJECT(pcms));
5fe79386 372 }
845773ab
IY		 373}
374
aa0c9aec
BB		 375typedef enum PCSouthBridgeOption {
376 PC_SOUTH_BRIDGE_OPTION_PIIX3,
377 PC_SOUTH_BRIDGE_OPTION_PIIX4,
378 PC_SOUTH_BRIDGE_OPTION_MAX,
379} PCSouthBridgeOption;
380
381static const QEnumLookup PCSouthBridgeOption_lookup = {
382 .array = (const char *const[]) {
383 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE,
384 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE,
385 },
386 .size = PC_SOUTH_BRIDGE_OPTION_MAX
387};
388
389#define NotifyVmexitOption_str(val) \
390 qapi_enum_lookup(&NotifyVmexitOption_lookup, (val))
391
392static int pc_get_south_bridge(Object *obj, Error **errp)
393{
394 PCMachineState *pcms = PC_MACHINE(obj);
395 int i;
396
397 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) {
398 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i],
399 pcms->south_bridge) == 0) {
400 return i;
401 }
402 }
403
404 error_setg(errp, "Invalid south bridge value set");
405 return 0;
406}
407
408static void pc_set_south_bridge(Object *obj, int value, Error **errp)
409{
410 PCMachineState *pcms = PC_MACHINE(obj);
411
412 if (value < 0) {
413 error_setg(errp, "Value can't be negative");
414 return;
415 }
416
417 if (value >= PCSouthBridgeOption_lookup.size) {
418 error_setg(errp, "Value too big");
419 return;
420 }
421
422 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value];
423}
424
79859507
EH		 425/* Looking for a pc_compat_2_4() function? It doesn't exist.
426 * pc_compat_*() functions that run on machine-init time and
427 * change global QEMU state are deprecated. Please don't create
428 * one, and implement any pc-*-2.4 (and newer) compat code in
ac78f737 429 * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
79859507
EH		 430 */
431
8995dd90 432static void pc_compat_2_3_fn(MachineState *machine)
5cb50e0a 433{
ed9e923c 434 X86MachineState *x86ms = X86_MACHINE(machine);
355023f2 435 if (kvm_enabled()) {
ed9e923c 436 x86ms->smm = ON_OFF_AUTO_OFF;
355023f2 437 }
5cb50e0a
JW		 438}
439
1c30044e 440static void pc_compat_2_2_fn(MachineState *machine)
64bbd372 441{
8995dd90 442 pc_compat_2_3_fn(machine);
64bbd372
PB		 443}
444
c4fc5695 445static void pc_compat_2_1_fn(MachineState *machine)
2cad57c7 446{
1c30044e 447 pc_compat_2_2_fn(machine);
5114e842 448 x86_cpu_change_kvm_default("svm", NULL);
2cad57c7
EH		 449}
450
a310e653 451static void pc_compat_2_0_fn(MachineState *machine)
3458b2b0 452{
c4fc5695 453 pc_compat_2_1_fn(machine);
3458b2b0
MT		 454}
455
274f5e63 456#ifdef CONFIG_ISAPC
3ef96221 457static void pc_init_isa(MachineState *machine)
845773ab 458{
76d39ab4 459 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
845773ab 460}
274f5e63 461#endif
845773ab 462
29d3ccde 463#ifdef CONFIG_XEN
998250e9
TC		 464static void pc_xen_hvm_init_pci(MachineState *machine)
465{
acd0c941 466 const char *pci_type = xen_igd_gfx_pt_enabled() ?
998250e9
TC		 467 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
468
469 pc_init1(machine,
470 TYPE_I440FX_PCI_HOST_BRIDGE,
471 pci_type);
472}
473
3ef96221 474static void pc_xen_hvm_init(MachineState *machine)
29d3ccde 475{
e492dc5a 476 PCMachineState *pcms = PC_MACHINE(machine);
39ae4972 477
a88ae0d4
EH		 478 if (!xen_enabled()) {
479 error_report("xenfv machine requires the xen accelerator");
480 exit(1);
481 }
482
998250e9 483 pc_xen_hvm_init_pci(machine);
4f67543b 484 xen_igd_reserve_slot(pcms->bus);
e492dc5a 485 pci_create_simple(pcms->bus, -1, "xen-platform");
29d3ccde
AP		 486}
487#endif
488
99fbeafe
EH		 489#define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
490 static void pc_init_##suffix(MachineState *machine) \
491 { \
492 void (*compat)(MachineState *m) = (compatfn); \
493 if (compat) { \
494 compat(machine); \
495 } \
76d39ab4
TC		 496 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
497 TYPE_I440FX_PCI_DEVICE); \
99fbeafe
EH		 498 } \
499 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
fddd179a 500
865906f7 501static void pc_i440fx_machine_options(MachineClass *m)
fddd179a 502{
4b9c264b 503 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
aa0c9aec
BB		 504 ObjectClass *oc = OBJECT_CLASS(m);
505 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
0a343a5a 506 pcmc->pci_root_uid = 0;
5719a179 507 pcmc->default_cpu_version = 1;
4b9c264b 508
fddd179a
EH		 509 m->family = "pc_piix";
510 m->desc = "Standard PC (i440FX + PIIX, 1996)";
254bdb1c
EH		 511 m->default_machine_opts = "firmware=bios-256k.bin";
512 m->default_display = "std";
01ecdaa4 513 m->default_nic = "e1000";
545d8574 514 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
94692dcd 515 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
cab78e7c 516 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
aa0c9aec
BB		 517
518 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption",
519 &PCSouthBridgeOption_lookup,
520 pc_get_south_bridge,
521 pc_set_south_bridge);
522 object_class_property_set_description(oc, "x-south-bridge",
523 "Use a different south bridge than PIIX3");
fddd179a
EH		 524}
525
2b10a676 526static void pc_i440fx_9_0_machine_options(MachineClass *m)
fddd179a
EH		 527{
528 pc_i440fx_machine_options(m);
fddd179a 529 m->alias = "pc";
ea0ac7f6 530 m->is_default = true;
fddd179a 531}
aeca6e8d 532
2b10a676
CH		 533DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL,
534 pc_i440fx_9_0_machine_options);
535
536static void pc_i440fx_8_2_machine_options(MachineClass *m)
537{
538 pc_i440fx_9_0_machine_options(m);
539 m->alias = NULL;
540 m->is_default = false;
541
542 compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
543 compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
544}
545
95f5c89e
CH		 546DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", NULL,
547 pc_i440fx_8_2_machine_options);
548
549static void pc_i440fx_8_1_machine_options(MachineClass *m)
550{
cf038650
AS		 551 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
552
95f5c89e 553 pc_i440fx_8_2_machine_options(m);
cf038650
AS		 554 pcmc->broken_32bit_mem_addr_check = true;
555
95f5c89e
CH		 556 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len);
557 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len);
558}
559
0259dd3e
CH		 560DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", NULL,
561 pc_i440fx_8_1_machine_options);
562
563static void pc_i440fx_8_0_machine_options(MachineClass *m)
564{
bf376f30
SS		 565 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
566
0259dd3e 567 pc_i440fx_8_1_machine_options(m);
0259dd3e
CH		 568 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len);
569 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len);
bf376f30
SS		 570
571 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */
572 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
0259dd3e
CH		 573}
574
db723c80
CH		 575DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", NULL,
576 pc_i440fx_8_0_machine_options);
577
578static void pc_i440fx_7_2_machine_options(MachineClass *m)
579{
580 pc_i440fx_8_0_machine_options(m);
db723c80
CH		 581 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len);
582 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len);
583}
584
f514e147
CH		 585DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", NULL,
586 pc_i440fx_7_2_machine_options);
587
588static void pc_i440fx_7_1_machine_options(MachineClass *m)
589{
590 pc_i440fx_7_2_machine_options(m);
f514e147
CH		 591 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len);
592 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len);
593}
594
0ca70366
CH		 595DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", NULL,
596 pc_i440fx_7_1_machine_options);
597
598static void pc_i440fx_7_0_machine_options(MachineClass *m)
599{
67f7e426 600 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
0ca70366 601 pc_i440fx_7_1_machine_options(m);
b3e6982b 602 pcmc->enforce_amd_1tb_hole = false;
0ca70366
CH		 603 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len);
604 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len);
605}
606
01854af2
CH		 607DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL,
608 pc_i440fx_7_0_machine_options);
609
610static void pc_i440fx_6_2_machine_options(MachineClass *m)
611{
612 pc_i440fx_7_0_machine_options(m);
01854af2
CH		 613 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
614 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
615}
616
52e64f5b
YW		 617DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL,
618 pc_i440fx_6_2_machine_options);
619
620static void pc_i440fx_6_1_machine_options(MachineClass *m)
621{
622 pc_i440fx_6_2_machine_options(m);
52e64f5b
YW		 623 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len);
624 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len);
2b526199 625 m->smp_props.prefer_sockets = true;
52e64f5b
YW		 626}
627
da7e13c0
CH		 628DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL,
629 pc_i440fx_6_1_machine_options);
630
631static void pc_i440fx_6_0_machine_options(MachineClass *m)
632{
633 pc_i440fx_6_1_machine_options(m);
da7e13c0
CH		 634 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len);
635 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len);
636}
637
576a00bd
CH		 638DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL,
639 pc_i440fx_6_0_machine_options);
640
641static void pc_i440fx_5_2_machine_options(MachineClass *m)
642{
643 pc_i440fx_6_0_machine_options(m);
576a00bd
CH		 644 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
645 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
646}
647
3ff3c5d3
CH		 648DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL,
649 pc_i440fx_5_2_machine_options);
650
651static void pc_i440fx_5_1_machine_options(MachineClass *m)
652{
8700a984
VK		 653 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
654
3ff3c5d3 655 pc_i440fx_5_2_machine_options(m);
3ff3c5d3
CH		 656 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
657 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
8700a984 658 pcmc->kvmclock_create_always = false;
0a343a5a 659 pcmc->pci_root_uid = 1;
3ff3c5d3
CH		 660}
661
541aaa1d
CH		 662DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL,
663 pc_i440fx_5_1_machine_options);
664
665static void pc_i440fx_5_0_machine_options(MachineClass *m)
666{
667 pc_i440fx_5_1_machine_options(m);
32a354dc 668 m->numa_mem_supported = true;
541aaa1d
CH		 669 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
670 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
195784a0 671 m->auto_enable_numa_with_memdev = false;
541aaa1d
CH		 672}
673
3eb74d20
CH		 674DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
675 pc_i440fx_5_0_machine_options);
676
677static void pc_i440fx_4_2_machine_options(MachineClass *m)
678{
679 pc_i440fx_5_0_machine_options(m);
3eb74d20
CH		 680 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
681 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
682}
683
9aec2e52
CH		 684DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
685 pc_i440fx_4_2_machine_options);
686
687static void pc_i440fx_4_1_machine_options(MachineClass *m)
688{
689 pc_i440fx_4_2_machine_options(m);
9aec2e52
CH		 690 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
691 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
692}
693
9bf2650b
CH		 694DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
695 pc_i440fx_4_1_machine_options);
696
697static void pc_i440fx_4_0_machine_options(MachineClass *m)
698{
0788a56b 699 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
9bf2650b 700 pc_i440fx_4_1_machine_options(m);
0788a56b 701 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
9bf2650b
CH		 702 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
703 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
704}
705
84e060bf
AW		 706DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
707 pc_i440fx_4_0_machine_options);
708
709static void pc_i440fx_3_1_machine_options(MachineClass *m)
710{
fda672b5
SG		 711 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
712
84e060bf 713 pc_i440fx_4_0_machine_options(m);
7fccf2a0 714 m->smbus_no_migration_support = true;
fda672b5 715 pcmc->pvh_enabled = false;
abd93cc7
MAL		 716 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
717 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
84e060bf
AW		 718}
719
4a93722f
MAL		 720DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
721 pc_i440fx_3_1_machine_options);
722
723static void pc_i440fx_3_0_machine_options(MachineClass *m)
724{
725 pc_i440fx_3_1_machine_options(m);
ddb3235d
MAL		 726 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
727 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
4a93722f
MAL		 728}
729
aa78a16d
PM		 730DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
731 pc_i440fx_3_0_machine_options);
968ee4ad
BM		 732
733static void pc_i440fx_2_12_machine_options(MachineClass *m)
734{
aa78a16d 735 pc_i440fx_3_0_machine_options(m);
0d47310b
MAL		 736 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
737 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
968ee4ad
BM		 738}
739
df47ce8a
HZ		 740DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
741 pc_i440fx_2_12_machine_options);
742
743static void pc_i440fx_2_11_machine_options(MachineClass *m)
744{
745 pc_i440fx_2_12_machine_options(m);
43df70a9
MAL		 746 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
747 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
df47ce8a
HZ		 748}
749
a6fd5b0e
MA		 750DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
751 pc_i440fx_2_11_machine_options);
752
753static void pc_i440fx_2_10_machine_options(MachineClass *m)
754{
755 pc_i440fx_2_11_machine_options(m);
503224f4
MAL		 756 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
757 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
7b8be49d 758 m->auto_enable_numa_with_memhp = false;
a6fd5b0e
MA		 759}
760
465238d9
PX		 761DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
762 pc_i440fx_2_10_machine_options);
763
764static void pc_i440fx_2_9_machine_options(MachineClass *m)
765{
766 pc_i440fx_2_10_machine_options(m);
3e803152
MAL		 767 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
768 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
465238d9
PX		 769}
770
d580bd4b
EH		 771DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
772 pc_i440fx_2_9_machine_options);
773
774static void pc_i440fx_2_8_machine_options(MachineClass *m)
775{
776 pc_i440fx_2_9_machine_options(m);
edc24ccd
MAL		 777 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
778 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
d580bd4b
EH		 779}
780
a4d3c834
LM		 781DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
782 pc_i440fx_2_8_machine_options);
783
a4d3c834
LM		 784static void pc_i440fx_2_7_machine_options(MachineClass *m)
785{
786 pc_i440fx_2_8_machine_options(m);
5a995064
MAL		 787 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
788 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
a4d3c834
LM		 789}
790
d86c1451
IM		 791DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
792 pc_i440fx_2_7_machine_options);
793
d86c1451
IM		 794static void pc_i440fx_2_6_machine_options(MachineClass *m)
795{
f014c974 796 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
679dd1a9 797 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
88cbe073 798
d86c1451 799 pc_i440fx_2_7_machine_options(m);
679dd1a9 800 pcmc->legacy_cpu_hotplug = true;
f014c974 801 x86mc->fwcfg_dma_enabled = false;
ff8f261f
MAL		 802 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
803 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
d86c1451
IM		 804}
805
240240d5
EH		 806DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
807 pc_i440fx_2_6_machine_options);
808
240240d5
EH		 809static void pc_i440fx_2_5_machine_options(MachineClass *m)
810{
2f34ebf2 811 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
88cbe073 812
240240d5 813 pc_i440fx_2_6_machine_options(m);
2f34ebf2 814 x86mc->save_tsc_khz = false;
bab47d9a 815 m->legacy_fw_cfg_order = 1;
fe759610
MAL		 816 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
817 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
240240d5
EH		 818}
819
87e896ab
EH		 820DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
821 pc_i440fx_2_5_machine_options);
822
87e896ab
EH		 823static void pc_i440fx_2_4_machine_options(MachineClass *m)
824{
825 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
88cbe073 826
87e896ab 827 pc_i440fx_2_5_machine_options(m);
de796d93 828 m->hw_version = "2.4.0";
87e896ab 829 pcmc->broken_reserved_end = true;
2f99b9c2
MAL		 830 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
831 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
87e896ab
EH		 832}
833
99fbeafe
EH		 834DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
835 pc_i440fx_2_4_machine_options)
5cb50e0a 836
865906f7 837static void pc_i440fx_2_3_machine_options(MachineClass *m)
fddd179a 838{
4421c6a3 839 pc_i440fx_2_4_machine_options(m);
de796d93 840 m->hw_version = "2.3.0";
c7437f0d 841 m->deprecation_reason = "old and unattended - use a newer version instead";
8995dd90
MAL		 842 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
843 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
fddd179a 844}
5cb50e0a 845
8995dd90 846DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
99fbeafe 847 pc_i440fx_2_3_machine_options);
61f219df 848
865906f7 849static void pc_i440fx_2_2_machine_options(MachineClass *m)
fddd179a 850{
7102fa70 851 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
88cbe073 852
fddd179a 853 pc_i440fx_2_3_machine_options(m);
de796d93 854 m->hw_version = "2.2.0";
112394af 855 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
1c30044e
MAL		 856 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
857 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
7102fa70 858 pcmc->rsdp_in_ram = false;
1af50775 859 pcmc->resizable_acpi_blob = false;
fddd179a 860}
64bbd372 861
1c30044e 862DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
99fbeafe 863 pc_i440fx_2_2_machine_options);
61f219df 864
865906f7 865static void pc_i440fx_2_1_machine_options(MachineClass *m)
fddd179a 866{
7102fa70 867 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
88cbe073 868
fddd179a 869 pc_i440fx_2_2_machine_options(m);
de796d93 870 m->hw_version = "2.1.0";
fddd179a 871 m->default_display = NULL;
c4fc5695
MAL		 872 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
873 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
7102fa70 874 pcmc->smbios_uuid_encoded = false;
16a9e8a5 875 pcmc->enforce_aligned_dimm = false;
fddd179a 876}
f9f21873 877
c4fc5695 878DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
99fbeafe 879 pc_i440fx_2_1_machine_options);
61f219df 880
865906f7 881static void pc_i440fx_2_0_machine_options(MachineClass *m)
fddd179a 882{
7102fa70 883 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
88cbe073 884
fddd179a 885 pc_i440fx_2_1_machine_options(m);
de796d93 886 m->hw_version = "2.0.0";
a310e653 887 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
7102fa70
EH		 888 pcmc->smbios_legacy_mode = true;
889 pcmc->has_reserved_memory = false;
2b0ddf66
EH		 890 /* This value depends on the actual DSDT and SSDT compiled into
891 * the source QEMU; unfortunately it depends on the binary and
892 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
893 * both QEMU 1.7 and QEMU 2.0.
894 *
895 * Large variations cause migration to fail for more than one
896 * consecutive value of the "-smp" maxcpus option.
897 *
898 * For small variations of the kind caused by different iasl versions,
899 * the 4k rounding usually leaves slack. However, there could be still
900 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
901 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
902 *
903 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
904 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
905 */
906 pcmc->legacy_acpi_table_size = 6652;
cd4040ec 907 pcmc->acpi_data_size = 0x10000;
fddd179a 908}
3458b2b0 909
a310e653 910DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
99fbeafe 911 pc_i440fx_2_0_machine_options);
61f219df 912
274f5e63 913#ifdef CONFIG_ISAPC
865906f7 914static void isapc_machine_options(MachineClass *m)
fddd179a 915{
7102fa70 916 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
fddd179a
EH		 917 m->desc = "ISA-only PC";
918 m->max_cpus = 1;
71ae9e94
EH		 919 m->option_rom_has_mr = true;
920 m->rom_file_has_mr = false;
7102fa70
EH		 921 pcmc->pci_enabled = false;
922 pcmc->has_acpi_build = false;
923 pcmc->smbios_defaults = false;
924 pcmc->gigabyte_align = false;
925 pcmc->smbios_legacy_mode = true;
926 pcmc->has_reserved_memory = false;
01ecdaa4 927 m->default_nic = "ne2k_isa";
311ca98d 928 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
545d8574 929 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
fddd179a 930}
b6b5c8e4 931
61f219df 932DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
25519b06 933 isapc_machine_options);
274f5e63 934#endif
845773ab 935
29d3ccde 936#ifdef CONFIG_XEN
9a709f06 937static void xenfv_4_2_machine_options(MachineClass *m)
fddd179a 938{
9a709f06
OH		 939 pc_i440fx_4_2_machine_options(m);
940 m->desc = "Xen Fully-virtualized PC";
941 m->max_cpus = HVM_MAX_VCPUS;
8959e0a6 942 m->default_machine_opts = "accel=xen,suppress-vmdesc=on";
9a709f06
OH		 943}
944
945DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
946 xenfv_4_2_machine_options);
947
948static void xenfv_3_1_machine_options(MachineClass *m)
949{
950 pc_i440fx_3_1_machine_options(m);
fddd179a 951 m->desc = "Xen Fully-virtualized PC";
9a709f06 952 m->alias = "xenfv";
fddd179a 953 m->max_cpus = HVM_MAX_VCPUS;
8959e0a6 954 m->default_machine_opts = "accel=xen,suppress-vmdesc=on";
fddd179a 955}
b6b5c8e4 956
9a709f06
OH		 957DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init,
958 xenfv_3_1_machine_options);
29d3ccde 959#endif
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