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Commit | Line | Data |
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ec82026c GH |
1 | /* |
2 | * QEMU IDE Emulation: ISA Bus support. | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * Copyright (c) 2006 Openedhand Ltd. | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
0b8fa32f | 25 | |
53239262 | 26 | #include "qemu/osdep.h" |
a9c94277 | 27 | #include "hw/isa/isa.h" |
a27bd6c7 | 28 | #include "hw/qdev-properties.h" |
d6454270 | 29 | #include "migration/vmstate.h" |
96927c74 | 30 | #include "qapi/error.h" |
0b8fa32f | 31 | #include "qemu/module.h" |
9c17d615 | 32 | #include "sysemu/dma.h" |
59f2a787 | 33 | |
a9c94277 | 34 | #include "hw/ide/internal.h" |
db1015e9 | 35 | #include "qom/object.h" |
ec82026c GH |
36 | |
37 | /***********************************************************/ | |
38 | /* ISA IDE definitions */ | |
39 | ||
2f12688b | 40 | #define TYPE_ISA_IDE "isa-ide" |
db1015e9 | 41 | typedef struct ISAIDEState ISAIDEState; |
8110fa1d EH |
42 | DECLARE_INSTANCE_CHECKER(ISAIDEState, ISA_IDE, |
43 | TYPE_ISA_IDE) | |
2f12688b | 44 | |
db1015e9 | 45 | struct ISAIDEState { |
2f12688b AF |
46 | ISADevice parent_obj; |
47 | ||
1f850f10 | 48 | IDEBus bus; |
dea21e97 GH |
49 | uint32_t iobase; |
50 | uint32_t iobase2; | |
51 | uint32_t isairq; | |
52 | qemu_irq irq; | |
db1015e9 | 53 | }; |
cebbe6d4 | 54 | |
4a643563 BS |
55 | static void isa_ide_reset(DeviceState *d) |
56 | { | |
2f12688b | 57 | ISAIDEState *s = ISA_IDE(d); |
4a643563 BS |
58 | |
59 | ide_bus_reset(&s->bus); | |
60 | } | |
61 | ||
200ab5e2 JQ |
62 | static const VMStateDescription vmstate_ide_isa = { |
63 | .name = "isa-ide", | |
64 | .version_id = 3, | |
65 | .minimum_version_id = 0, | |
d49805ae | 66 | .fields = (VMStateField[]) { |
200ab5e2 JQ |
67 | VMSTATE_IDE_BUS(bus, ISAIDEState), |
68 | VMSTATE_IDE_DRIVES(bus.ifs, ISAIDEState), | |
69 | VMSTATE_END_OF_LIST() | |
70 | } | |
71 | }; | |
cebbe6d4 | 72 | |
db895a1e | 73 | static void isa_ide_realizefn(DeviceState *dev, Error **errp) |
ec82026c | 74 | { |
db895a1e | 75 | ISADevice *isadev = ISA_DEVICE(dev); |
2f12688b | 76 | ISAIDEState *s = ISA_IDE(dev); |
dea21e97 | 77 | |
c6baf942 | 78 | ide_bus_new(&s->bus, sizeof(s->bus), dev, 0, 2); |
db895a1e AF |
79 | ide_init_ioport(&s->bus, isadev, s->iobase, s->iobase2); |
80 | isa_init_irq(isadev, &s->irq, s->isairq); | |
57234ee4 | 81 | ide_init2(&s->bus, s->irq); |
3cad405b | 82 | vmstate_register(VMSTATE_IF(dev), 0, &vmstate_ide_isa, s); |
d32c76b3 PB |
83 | ide_register_restart_cb(&s->bus); |
84 | } | |
dea21e97 | 85 | |
48a18b3c | 86 | ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq, |
57c88866 | 87 | DriveInfo *hd0, DriveInfo *hd1) |
dea21e97 | 88 | { |
2f12688b AF |
89 | DeviceState *dev; |
90 | ISADevice *isadev; | |
cebbe6d4 | 91 | ISAIDEState *s; |
ec82026c | 92 | |
96927c74 | 93 | isadev = isa_new(TYPE_ISA_IDE); |
2f12688b AF |
94 | dev = DEVICE(isadev); |
95 | qdev_prop_set_uint32(dev, "iobase", iobase); | |
96 | qdev_prop_set_uint32(dev, "iobase2", iobase2); | |
97 | qdev_prop_set_uint32(dev, "irq", isairq); | |
96927c74 | 98 | isa_realize_and_unref(isadev, bus, &error_fatal); |
ec82026c | 99 | |
2f12688b AF |
100 | s = ISA_IDE(dev); |
101 | if (hd0) { | |
1f850f10 | 102 | ide_create_drive(&s->bus, 0, hd0); |
2f12688b AF |
103 | } |
104 | if (hd1) { | |
1f850f10 | 105 | ide_create_drive(&s->bus, 1, hd1); |
2f12688b AF |
106 | } |
107 | return isadev; | |
dea21e97 GH |
108 | } |
109 | ||
39bffca2 | 110 | static Property isa_ide_properties[] = { |
c7bcc85d PB |
111 | DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0), |
112 | DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6), | |
39bffca2 AL |
113 | DEFINE_PROP_UINT32("irq", ISAIDEState, isairq, 14), |
114 | DEFINE_PROP_END_OF_LIST(), | |
115 | }; | |
116 | ||
8f04ee08 AL |
117 | static void isa_ide_class_initfn(ObjectClass *klass, void *data) |
118 | { | |
39bffca2 | 119 | DeviceClass *dc = DEVICE_CLASS(klass); |
db895a1e AF |
120 | |
121 | dc->realize = isa_ide_realizefn; | |
39bffca2 AL |
122 | dc->fw_name = "ide"; |
123 | dc->reset = isa_ide_reset; | |
4f67d30b | 124 | device_class_set_props(dc, isa_ide_properties); |
125ee0ed | 125 | set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); |
8f04ee08 AL |
126 | } |
127 | ||
8c43a6f0 | 128 | static const TypeInfo isa_ide_info = { |
2f12688b | 129 | .name = TYPE_ISA_IDE, |
39bffca2 AL |
130 | .parent = TYPE_ISA_DEVICE, |
131 | .instance_size = sizeof(ISAIDEState), | |
132 | .class_init = isa_ide_class_initfn, | |
dea21e97 GH |
133 | }; |
134 | ||
83f7d43a | 135 | static void isa_ide_register_types(void) |
dea21e97 | 136 | { |
39bffca2 | 137 | type_register_static(&isa_ide_info); |
ec82026c | 138 | } |
dea21e97 | 139 | |
83f7d43a | 140 | type_init(isa_ide_register_types) |