[mirror_qemu.git] / hw / ide / pci.h

#ifndef HW_IDE_PCI_H
#define HW_IDE_PCI_H

#include <hw/ide/internal.h>

typedef struct PCIIDEState {
    PCIDevice dev;
    IDEBus bus[2];
    BMDMAState bmdma[2];
    uint32_t secondary; /* used only for cmd646 */
} PCIIDEState;

void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val);
uint32_t bmdma_addr_readb(void *opaque, uint32_t addr);
void bmdma_addr_writeb(void *opaque, uint32_t addr, uint32_t val);
uint32_t bmdma_addr_readw(void *opaque, uint32_t addr);
void bmdma_addr_writew(void *opaque, uint32_t addr, uint32_t val);
uint32_t bmdma_addr_readl(void *opaque, uint32_t addr);
void bmdma_addr_writel(void *opaque, uint32_t addr, uint32_t val);
void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table);

extern const VMStateDescription vmstate_ide_pci;
#endif
Commit	Line	Data
65c0f135 JQ	1	#ifndef HW_IDE_PCI_H
	2	#define HW_IDE_PCI_H
	3
	4	#include <hw/ide/internal.h>
	5
65c0f135 JQ	6	typedef struct PCIIDEState {
	7	PCIDevice dev;
	8	IDEBus bus[2];
	9	BMDMAState bmdma[2];
7e078316	10	uint32_t secondary; /* used only for cmd646 */
65c0f135 JQ	11	} PCIIDEState;
65c0f135 JQ	12
3e7e1558 JQ	13	void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val);
	14	uint32_t bmdma_addr_readb(void *opaque, uint32_t addr);
	15	void bmdma_addr_writeb(void *opaque, uint32_t addr, uint32_t val);
	16	uint32_t bmdma_addr_readw(void *opaque, uint32_t addr);
	17	void bmdma_addr_writew(void *opaque, uint32_t addr, uint32_t val);
	18	uint32_t bmdma_addr_readl(void *opaque, uint32_t addr);
	19	void bmdma_addr_writel(void *opaque, uint32_t addr, uint32_t val);
3e7e1558	20	void pci_ide_create_devs(PCIDevice dev, DriveInfo *hd_table);
407a4f30 JQ	21
407a4f30 JQ	22	extern const VMStateDescription vmstate_ide_pci;
65c0f135	23	#endif