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Commit | Line | Data |
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5fafdf24 | 1 | /* |
69db0ac7 | 2 | * Arm PrimeCell PL050 Keyboard / Mouse Interface |
cdbdb648 | 3 | * |
9e61ec31 | 4 | * Copyright (c) 2006-2007 CodeSourcery. |
cdbdb648 PB |
5 | * Written by Paul Brook |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GPL. |
cdbdb648 PB |
8 | */ |
9 | ||
83c9f4ca | 10 | #include "hw/sysbus.h" |
0d09e41a | 11 | #include "hw/input/ps2.h" |
cdbdb648 | 12 | |
3e5dd364 AF |
13 | #define TYPE_PL050 "pl050" |
14 | #define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050) | |
15 | ||
e607f25a | 16 | typedef struct PL050State { |
3e5dd364 AF |
17 | SysBusDevice parent_obj; |
18 | ||
b8f7a738 | 19 | MemoryRegion iomem; |
cdbdb648 | 20 | void *dev; |
cdbdb648 PB |
21 | uint32_t cr; |
22 | uint32_t clk; | |
23 | uint32_t last; | |
cdbdb648 | 24 | int pending; |
d537cf6c | 25 | qemu_irq irq; |
3e5dd364 | 26 | bool is_mouse; |
e607f25a | 27 | } PL050State; |
cdbdb648 | 28 | |
d6ac172a PM |
29 | static const VMStateDescription vmstate_pl050 = { |
30 | .name = "pl050", | |
e8945b4f PM |
31 | .version_id = 2, |
32 | .minimum_version_id = 2, | |
d6ac172a | 33 | .fields = (VMStateField[]) { |
e607f25a AF |
34 | VMSTATE_UINT32(cr, PL050State), |
35 | VMSTATE_UINT32(clk, PL050State), | |
36 | VMSTATE_UINT32(last, PL050State), | |
37 | VMSTATE_INT32(pending, PL050State), | |
d6ac172a PM |
38 | VMSTATE_END_OF_LIST() |
39 | } | |
40 | }; | |
41 | ||
9e61ec31 PB |
42 | #define PL050_TXEMPTY (1 << 6) |
43 | #define PL050_TXBUSY (1 << 5) | |
44 | #define PL050_RXFULL (1 << 4) | |
45 | #define PL050_RXBUSY (1 << 3) | |
46 | #define PL050_RXPARITY (1 << 2) | |
47 | #define PL050_KMIC (1 << 1) | |
48 | #define PL050_KMID (1 << 0) | |
49 | ||
cdbdb648 PB |
50 | static const unsigned char pl050_id[] = |
51 | { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; | |
52 | ||
53 | static void pl050_update(void *opaque, int level) | |
54 | { | |
e607f25a | 55 | PL050State *s = (PL050State *)opaque; |
cdbdb648 PB |
56 | int raise; |
57 | ||
58 | s->pending = level; | |
59 | raise = (s->pending && (s->cr & 0x10) != 0) | |
60 | || (s->cr & 0x08) != 0; | |
d537cf6c | 61 | qemu_set_irq(s->irq, raise); |
cdbdb648 PB |
62 | } |
63 | ||
a8170e5e | 64 | static uint64_t pl050_read(void *opaque, hwaddr offset, |
b8f7a738 | 65 | unsigned size) |
cdbdb648 | 66 | { |
e607f25a | 67 | PL050State *s = (PL050State *)opaque; |
cdbdb648 PB |
68 | if (offset >= 0xfe0 && offset < 0x1000) |
69 | return pl050_id[(offset - 0xfe0) >> 2]; | |
70 | ||
71 | switch (offset >> 2) { | |
72 | case 0: /* KMICR */ | |
73 | return s->cr; | |
74 | case 1: /* KMISTAT */ | |
9e61ec31 PB |
75 | { |
76 | uint8_t val; | |
77 | uint32_t stat; | |
78 | ||
79 | val = s->last; | |
80 | val = val ^ (val >> 4); | |
81 | val = val ^ (val >> 2); | |
82 | val = (val ^ (val >> 1)) & 1; | |
83 | ||
84 | stat = PL050_TXEMPTY; | |
85 | if (val) | |
86 | stat |= PL050_RXPARITY; | |
87 | if (s->pending) | |
88 | stat |= PL050_RXFULL; | |
89 | ||
90 | return stat; | |
cdbdb648 PB |
91 | } |
92 | case 2: /* KMIDATA */ | |
93 | if (s->pending) | |
94 | s->last = ps2_read_data(s->dev); | |
95 | return s->last; | |
96 | case 3: /* KMICLKDIV */ | |
97 | return s->clk; | |
98 | case 4: /* KMIIR */ | |
99 | return s->pending | 2; | |
100 | default: | |
fbfecf43 PM |
101 | qemu_log_mask(LOG_GUEST_ERROR, |
102 | "pl050_read: Bad offset %x\n", (int)offset); | |
cdbdb648 PB |
103 | return 0; |
104 | } | |
105 | } | |
106 | ||
a8170e5e | 107 | static void pl050_write(void *opaque, hwaddr offset, |
b8f7a738 | 108 | uint64_t value, unsigned size) |
cdbdb648 | 109 | { |
e607f25a | 110 | PL050State *s = (PL050State *)opaque; |
cdbdb648 PB |
111 | switch (offset >> 2) { |
112 | case 0: /* KMICR */ | |
113 | s->cr = value; | |
114 | pl050_update(s, s->pending); | |
115 | /* ??? Need to implement the enable/disable bit. */ | |
116 | break; | |
117 | case 2: /* KMIDATA */ | |
118 | /* ??? This should toggle the TX interrupt line. */ | |
119 | /* ??? This means kbd/mouse can block each other. */ | |
120 | if (s->is_mouse) { | |
121 | ps2_write_mouse(s->dev, value); | |
122 | } else { | |
123 | ps2_write_keyboard(s->dev, value); | |
124 | } | |
125 | break; | |
126 | case 3: /* KMICLKDIV */ | |
127 | s->clk = value; | |
128 | return; | |
129 | default: | |
fbfecf43 PM |
130 | qemu_log_mask(LOG_GUEST_ERROR, |
131 | "pl050_write: Bad offset %x\n", (int)offset); | |
cdbdb648 PB |
132 | } |
133 | } | |
b8f7a738 AK |
134 | static const MemoryRegionOps pl050_ops = { |
135 | .read = pl050_read, | |
136 | .write = pl050_write, | |
137 | .endianness = DEVICE_NATIVE_ENDIAN, | |
cdbdb648 PB |
138 | }; |
139 | ||
3e5dd364 | 140 | static int pl050_initfn(SysBusDevice *dev) |
cdbdb648 | 141 | { |
3e5dd364 | 142 | PL050State *s = PL050(dev); |
cdbdb648 | 143 | |
1437c94b | 144 | memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000); |
750ecd44 | 145 | sysbus_init_mmio(dev, &s->iomem); |
86394e96 | 146 | sysbus_init_irq(dev, &s->irq); |
3e5dd364 | 147 | if (s->is_mouse) { |
cdbdb648 | 148 | s->dev = ps2_mouse_init(pl050_update, s); |
3e5dd364 | 149 | } else { |
cdbdb648 | 150 | s->dev = ps2_kbd_init(pl050_update, s); |
3e5dd364 | 151 | } |
81a322d4 | 152 | return 0; |
cdbdb648 | 153 | } |
86394e96 | 154 | |
3e5dd364 | 155 | static void pl050_keyboard_init(Object *obj) |
86394e96 | 156 | { |
3e5dd364 | 157 | PL050State *s = PL050(obj); |
86394e96 | 158 | |
3e5dd364 | 159 | s->is_mouse = false; |
86394e96 PB |
160 | } |
161 | ||
3e5dd364 | 162 | static void pl050_mouse_init(Object *obj) |
999e12bb | 163 | { |
3e5dd364 | 164 | PL050State *s = PL050(obj); |
999e12bb | 165 | |
3e5dd364 | 166 | s->is_mouse = true; |
999e12bb AL |
167 | } |
168 | ||
8c43a6f0 | 169 | static const TypeInfo pl050_kbd_info = { |
39bffca2 | 170 | .name = "pl050_keyboard", |
3e5dd364 AF |
171 | .parent = TYPE_PL050, |
172 | .instance_init = pl050_keyboard_init, | |
d6ac172a PM |
173 | }; |
174 | ||
3e5dd364 AF |
175 | static const TypeInfo pl050_mouse_info = { |
176 | .name = "pl050_mouse", | |
177 | .parent = TYPE_PL050, | |
178 | .instance_init = pl050_mouse_init, | |
179 | }; | |
180 | ||
181 | static void pl050_class_init(ObjectClass *oc, void *data) | |
999e12bb | 182 | { |
3e5dd364 AF |
183 | DeviceClass *dc = DEVICE_CLASS(oc); |
184 | SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(oc); | |
999e12bb | 185 | |
3e5dd364 | 186 | sdc->init = pl050_initfn; |
39bffca2 | 187 | dc->vmsd = &vmstate_pl050; |
999e12bb AL |
188 | } |
189 | ||
3e5dd364 AF |
190 | static const TypeInfo pl050_type_info = { |
191 | .name = TYPE_PL050, | |
39bffca2 | 192 | .parent = TYPE_SYS_BUS_DEVICE, |
e607f25a | 193 | .instance_size = sizeof(PL050State), |
3e5dd364 AF |
194 | .abstract = true, |
195 | .class_init = pl050_class_init, | |
d6ac172a PM |
196 | }; |
197 | ||
83f7d43a | 198 | static void pl050_register_types(void) |
86394e96 | 199 | { |
3e5dd364 | 200 | type_register_static(&pl050_type_info); |
39bffca2 AL |
201 | type_register_static(&pl050_kbd_info); |
202 | type_register_static(&pl050_mouse_info); | |
86394e96 PB |
203 | } |
204 | ||
83f7d43a | 205 | type_init(pl050_register_types) |