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memory: add owner argument to initialization functions
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5fafdf24 1/*
69db0ac7 2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
cdbdb648 3 *
9e61ec31 4 * Copyright (c) 2006-2007 CodeSourcery.
cdbdb648
PB
5 * Written by Paul Brook
6 *
8e31bf38 7 * This code is licensed under the GPL.
cdbdb648
PB
8 */
9
83c9f4ca 10#include "hw/sysbus.h"
0d09e41a 11#include "hw/input/ps2.h"
cdbdb648
PB
12
13typedef struct {
86394e96 14 SysBusDevice busdev;
b8f7a738 15 MemoryRegion iomem;
cdbdb648 16 void *dev;
cdbdb648
PB
17 uint32_t cr;
18 uint32_t clk;
19 uint32_t last;
cdbdb648 20 int pending;
d537cf6c 21 qemu_irq irq;
cdbdb648
PB
22 int is_mouse;
23} pl050_state;
24
d6ac172a
PM
25static const VMStateDescription vmstate_pl050 = {
26 .name = "pl050",
e8945b4f
PM
27 .version_id = 2,
28 .minimum_version_id = 2,
d6ac172a
PM
29 .fields = (VMStateField[]) {
30 VMSTATE_UINT32(cr, pl050_state),
31 VMSTATE_UINT32(clk, pl050_state),
32 VMSTATE_UINT32(last, pl050_state),
33 VMSTATE_INT32(pending, pl050_state),
d6ac172a
PM
34 VMSTATE_END_OF_LIST()
35 }
36};
37
9e61ec31
PB
38#define PL050_TXEMPTY (1 << 6)
39#define PL050_TXBUSY (1 << 5)
40#define PL050_RXFULL (1 << 4)
41#define PL050_RXBUSY (1 << 3)
42#define PL050_RXPARITY (1 << 2)
43#define PL050_KMIC (1 << 1)
44#define PL050_KMID (1 << 0)
45
cdbdb648
PB
46static const unsigned char pl050_id[] =
47{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
48
49static void pl050_update(void *opaque, int level)
50{
51 pl050_state *s = (pl050_state *)opaque;
52 int raise;
53
54 s->pending = level;
55 raise = (s->pending && (s->cr & 0x10) != 0)
56 || (s->cr & 0x08) != 0;
d537cf6c 57 qemu_set_irq(s->irq, raise);
cdbdb648
PB
58}
59
a8170e5e 60static uint64_t pl050_read(void *opaque, hwaddr offset,
b8f7a738 61 unsigned size)
cdbdb648
PB
62{
63 pl050_state *s = (pl050_state *)opaque;
cdbdb648
PB
64 if (offset >= 0xfe0 && offset < 0x1000)
65 return pl050_id[(offset - 0xfe0) >> 2];
66
67 switch (offset >> 2) {
68 case 0: /* KMICR */
69 return s->cr;
70 case 1: /* KMISTAT */
9e61ec31
PB
71 {
72 uint8_t val;
73 uint32_t stat;
74
75 val = s->last;
76 val = val ^ (val >> 4);
77 val = val ^ (val >> 2);
78 val = (val ^ (val >> 1)) & 1;
79
80 stat = PL050_TXEMPTY;
81 if (val)
82 stat |= PL050_RXPARITY;
83 if (s->pending)
84 stat |= PL050_RXFULL;
85
86 return stat;
cdbdb648
PB
87 }
88 case 2: /* KMIDATA */
89 if (s->pending)
90 s->last = ps2_read_data(s->dev);
91 return s->last;
92 case 3: /* KMICLKDIV */
93 return s->clk;
94 case 4: /* KMIIR */
95 return s->pending | 2;
96 default:
fbfecf43
PM
97 qemu_log_mask(LOG_GUEST_ERROR,
98 "pl050_read: Bad offset %x\n", (int)offset);
cdbdb648
PB
99 return 0;
100 }
101}
102
a8170e5e 103static void pl050_write(void *opaque, hwaddr offset,
b8f7a738 104 uint64_t value, unsigned size)
cdbdb648
PB
105{
106 pl050_state *s = (pl050_state *)opaque;
cdbdb648
PB
107 switch (offset >> 2) {
108 case 0: /* KMICR */
109 s->cr = value;
110 pl050_update(s, s->pending);
111 /* ??? Need to implement the enable/disable bit. */
112 break;
113 case 2: /* KMIDATA */
114 /* ??? This should toggle the TX interrupt line. */
115 /* ??? This means kbd/mouse can block each other. */
116 if (s->is_mouse) {
117 ps2_write_mouse(s->dev, value);
118 } else {
119 ps2_write_keyboard(s->dev, value);
120 }
121 break;
122 case 3: /* KMICLKDIV */
123 s->clk = value;
124 return;
125 default:
fbfecf43
PM
126 qemu_log_mask(LOG_GUEST_ERROR,
127 "pl050_write: Bad offset %x\n", (int)offset);
cdbdb648
PB
128 }
129}
b8f7a738
AK
130static const MemoryRegionOps pl050_ops = {
131 .read = pl050_read,
132 .write = pl050_write,
133 .endianness = DEVICE_NATIVE_ENDIAN,
cdbdb648
PB
134};
135
81a322d4 136static int pl050_init(SysBusDevice *dev, int is_mouse)
cdbdb648 137{
86394e96 138 pl050_state *s = FROM_SYSBUS(pl050_state, dev);
cdbdb648 139
2c9b15ca 140 memory_region_init_io(&s->iomem, NULL, &pl050_ops, s, "pl050", 0x1000);
750ecd44 141 sysbus_init_mmio(dev, &s->iomem);
86394e96 142 sysbus_init_irq(dev, &s->irq);
cdbdb648 143 s->is_mouse = is_mouse;
86394e96 144 if (s->is_mouse)
cdbdb648
PB
145 s->dev = ps2_mouse_init(pl050_update, s);
146 else
147 s->dev = ps2_kbd_init(pl050_update, s);
81a322d4 148 return 0;
cdbdb648 149}
86394e96 150
81a322d4 151static int pl050_init_keyboard(SysBusDevice *dev)
86394e96 152{
81a322d4 153 return pl050_init(dev, 0);
86394e96
PB
154}
155
81a322d4 156static int pl050_init_mouse(SysBusDevice *dev)
86394e96 157{
81a322d4 158 return pl050_init(dev, 1);
86394e96
PB
159}
160
999e12bb
AL
161static void pl050_kbd_class_init(ObjectClass *klass, void *data)
162{
39bffca2 163 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
164 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
165
166 k->init = pl050_init_keyboard;
39bffca2 167 dc->vmsd = &vmstate_pl050;
999e12bb
AL
168}
169
8c43a6f0 170static const TypeInfo pl050_kbd_info = {
39bffca2
AL
171 .name = "pl050_keyboard",
172 .parent = TYPE_SYS_BUS_DEVICE,
173 .instance_size = sizeof(pl050_state),
174 .class_init = pl050_kbd_class_init,
d6ac172a
PM
175};
176
999e12bb
AL
177static void pl050_mouse_class_init(ObjectClass *klass, void *data)
178{
39bffca2 179 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
180 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
181
182 k->init = pl050_init_mouse;
39bffca2 183 dc->vmsd = &vmstate_pl050;
999e12bb
AL
184}
185
8c43a6f0 186static const TypeInfo pl050_mouse_info = {
39bffca2
AL
187 .name = "pl050_mouse",
188 .parent = TYPE_SYS_BUS_DEVICE,
189 .instance_size = sizeof(pl050_state),
190 .class_init = pl050_mouse_class_init,
d6ac172a
PM
191};
192
83f7d43a 193static void pl050_register_types(void)
86394e96 194{
39bffca2
AL
195 type_register_static(&pl050_kbd_info);
196 type_register_static(&pl050_mouse_info);
86394e96
PB
197}
198
83f7d43a 199type_init(pl050_register_types)