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input/pl050: Convert sysbus init function to realize function
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5fafdf24 1/*
69db0ac7 2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
cdbdb648 3 *
9e61ec31 4 * Copyright (c) 2006-2007 CodeSourcery.
cdbdb648
PB
5 * Written by Paul Brook
6 *
8e31bf38 7 * This code is licensed under the GPL.
cdbdb648
PB
8 */
9
8ef94f0b 10#include "qemu/osdep.h"
83c9f4ca 11#include "hw/sysbus.h"
0d09e41a 12#include "hw/input/ps2.h"
03dd024f 13#include "qemu/log.h"
cdbdb648 14
3e5dd364
AF
15#define TYPE_PL050 "pl050"
16#define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050)
17
e607f25a 18typedef struct PL050State {
3e5dd364
AF
19 SysBusDevice parent_obj;
20
b8f7a738 21 MemoryRegion iomem;
cdbdb648 22 void *dev;
cdbdb648
PB
23 uint32_t cr;
24 uint32_t clk;
25 uint32_t last;
cdbdb648 26 int pending;
d537cf6c 27 qemu_irq irq;
3e5dd364 28 bool is_mouse;
e607f25a 29} PL050State;
cdbdb648 30
d6ac172a
PM
31static const VMStateDescription vmstate_pl050 = {
32 .name = "pl050",
e8945b4f
PM
33 .version_id = 2,
34 .minimum_version_id = 2,
d6ac172a 35 .fields = (VMStateField[]) {
e607f25a
AF
36 VMSTATE_UINT32(cr, PL050State),
37 VMSTATE_UINT32(clk, PL050State),
38 VMSTATE_UINT32(last, PL050State),
39 VMSTATE_INT32(pending, PL050State),
d6ac172a
PM
40 VMSTATE_END_OF_LIST()
41 }
42};
43
9e61ec31
PB
44#define PL050_TXEMPTY (1 << 6)
45#define PL050_TXBUSY (1 << 5)
46#define PL050_RXFULL (1 << 4)
47#define PL050_RXBUSY (1 << 3)
48#define PL050_RXPARITY (1 << 2)
49#define PL050_KMIC (1 << 1)
50#define PL050_KMID (1 << 0)
51
cdbdb648
PB
52static const unsigned char pl050_id[] =
53{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
54
55static void pl050_update(void *opaque, int level)
56{
e607f25a 57 PL050State *s = (PL050State *)opaque;
cdbdb648
PB
58 int raise;
59
60 s->pending = level;
61 raise = (s->pending && (s->cr & 0x10) != 0)
62 || (s->cr & 0x08) != 0;
d537cf6c 63 qemu_set_irq(s->irq, raise);
cdbdb648
PB
64}
65
a8170e5e 66static uint64_t pl050_read(void *opaque, hwaddr offset,
b8f7a738 67 unsigned size)
cdbdb648 68{
e607f25a 69 PL050State *s = (PL050State *)opaque;
cdbdb648
PB
70 if (offset >= 0xfe0 && offset < 0x1000)
71 return pl050_id[(offset - 0xfe0) >> 2];
72
73 switch (offset >> 2) {
74 case 0: /* KMICR */
75 return s->cr;
76 case 1: /* KMISTAT */
9e61ec31
PB
77 {
78 uint8_t val;
79 uint32_t stat;
80
81 val = s->last;
82 val = val ^ (val >> 4);
83 val = val ^ (val >> 2);
84 val = (val ^ (val >> 1)) & 1;
85
86 stat = PL050_TXEMPTY;
87 if (val)
88 stat |= PL050_RXPARITY;
89 if (s->pending)
90 stat |= PL050_RXFULL;
91
92 return stat;
cdbdb648
PB
93 }
94 case 2: /* KMIDATA */
95 if (s->pending)
96 s->last = ps2_read_data(s->dev);
97 return s->last;
98 case 3: /* KMICLKDIV */
99 return s->clk;
100 case 4: /* KMIIR */
101 return s->pending | 2;
102 default:
fbfecf43
PM
103 qemu_log_mask(LOG_GUEST_ERROR,
104 "pl050_read: Bad offset %x\n", (int)offset);
cdbdb648
PB
105 return 0;
106 }
107}
108
a8170e5e 109static void pl050_write(void *opaque, hwaddr offset,
b8f7a738 110 uint64_t value, unsigned size)
cdbdb648 111{
e607f25a 112 PL050State *s = (PL050State *)opaque;
cdbdb648
PB
113 switch (offset >> 2) {
114 case 0: /* KMICR */
115 s->cr = value;
116 pl050_update(s, s->pending);
117 /* ??? Need to implement the enable/disable bit. */
118 break;
119 case 2: /* KMIDATA */
120 /* ??? This should toggle the TX interrupt line. */
121 /* ??? This means kbd/mouse can block each other. */
122 if (s->is_mouse) {
123 ps2_write_mouse(s->dev, value);
124 } else {
125 ps2_write_keyboard(s->dev, value);
126 }
127 break;
128 case 3: /* KMICLKDIV */
129 s->clk = value;
130 return;
131 default:
fbfecf43
PM
132 qemu_log_mask(LOG_GUEST_ERROR,
133 "pl050_write: Bad offset %x\n", (int)offset);
cdbdb648
PB
134 }
135}
b8f7a738
AK
136static const MemoryRegionOps pl050_ops = {
137 .read = pl050_read,
138 .write = pl050_write,
139 .endianness = DEVICE_NATIVE_ENDIAN,
cdbdb648
PB
140};
141
988e501a 142static void pl050_realize(DeviceState *dev, Error **errp)
cdbdb648 143{
3e5dd364 144 PL050State *s = PL050(dev);
988e501a 145 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
cdbdb648 146
1437c94b 147 memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
988e501a
MZ
148 sysbus_init_mmio(sbd, &s->iomem);
149 sysbus_init_irq(sbd, &s->irq);
3e5dd364 150 if (s->is_mouse) {
cdbdb648 151 s->dev = ps2_mouse_init(pl050_update, s);
3e5dd364 152 } else {
cdbdb648 153 s->dev = ps2_kbd_init(pl050_update, s);
3e5dd364 154 }
cdbdb648 155}
86394e96 156
3e5dd364 157static void pl050_keyboard_init(Object *obj)
86394e96 158{
3e5dd364 159 PL050State *s = PL050(obj);
86394e96 160
3e5dd364 161 s->is_mouse = false;
86394e96
PB
162}
163
3e5dd364 164static void pl050_mouse_init(Object *obj)
999e12bb 165{
3e5dd364 166 PL050State *s = PL050(obj);
999e12bb 167
3e5dd364 168 s->is_mouse = true;
999e12bb
AL
169}
170
8c43a6f0 171static const TypeInfo pl050_kbd_info = {
39bffca2 172 .name = "pl050_keyboard",
3e5dd364
AF
173 .parent = TYPE_PL050,
174 .instance_init = pl050_keyboard_init,
d6ac172a
PM
175};
176
3e5dd364
AF
177static const TypeInfo pl050_mouse_info = {
178 .name = "pl050_mouse",
179 .parent = TYPE_PL050,
180 .instance_init = pl050_mouse_init,
181};
182
183static void pl050_class_init(ObjectClass *oc, void *data)
999e12bb 184{
3e5dd364 185 DeviceClass *dc = DEVICE_CLASS(oc);
999e12bb 186
988e501a 187 dc->realize = pl050_realize;
39bffca2 188 dc->vmsd = &vmstate_pl050;
999e12bb
AL
189}
190
3e5dd364
AF
191static const TypeInfo pl050_type_info = {
192 .name = TYPE_PL050,
39bffca2 193 .parent = TYPE_SYS_BUS_DEVICE,
e607f25a 194 .instance_size = sizeof(PL050State),
3e5dd364
AF
195 .abstract = true,
196 .class_init = pl050_class_init,
d6ac172a
PM
197};
198
83f7d43a 199static void pl050_register_types(void)
86394e96 200{
3e5dd364 201 type_register_static(&pl050_type_info);
39bffca2
AL
202 type_register_static(&pl050_kbd_info);
203 type_register_static(&pl050_mouse_info);
86394e96
PB
204}
205
83f7d43a 206type_init(pl050_register_types)