[mirror_qemu.git] / hw / intc / xics_kvm.c

/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
 *
 * Copyright (c) 2013 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */

#include "qemu/osdep.h"
#include "hw/hw.h"
#include "trace.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/xics.h"
#include "kvm_ppc.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"

#include <sys/ioctl.h>

typedef struct KVMXICSState {
    XICSState parent_obj;

    int kernel_xics_fd;
} KVMXICSState;

/*
 * ICP-KVM
 */
static void icp_get_kvm_state(ICPState *ss)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!ss->cs) {
        return;
    }

    ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to retrieve KVM interrupt controller state"
                " for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
        exit(1);
    }

    ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
    ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
        & KVM_REG_PPC_ICP_MFRR_MASK;
    ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
        & KVM_REG_PPC_ICP_PPRI_MASK;
}

static int icp_set_kvm_state(ICPState *ss, int version_id)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!ss->cs) {
        return 0;
    }

    state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
        | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
        | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);

    ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to restore KVM interrupt controller state (0x%"
                PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
                strerror(errno));
        return ret;
    }

    return 0;
}

static void icp_kvm_reset(DeviceState *dev)
{
    ICPState *icp = ICP(dev);

    icp->xirr = 0;
    icp->pending_priority = 0xff;
    icp->mfrr = 0xff;

    /* Make all outputs are deasserted */
    qemu_set_irq(icp->output, 0);

    icp_set_kvm_state(icp, 1);
}

static void icp_kvm_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    ICPStateClass *icpc = ICP_CLASS(klass);

    dc->reset = icp_kvm_reset;
    icpc->pre_save = icp_get_kvm_state;
    icpc->post_load = icp_set_kvm_state;
}

static const TypeInfo icp_kvm_info = {
    .name = TYPE_KVM_ICP,
    .parent = TYPE_ICP,
    .instance_size = sizeof(ICPState),
    .class_init = icp_kvm_class_init,
    .class_size = sizeof(ICPStateClass),
};

/*
 * ICS-KVM
 */
static void ics_get_kvm_state(ICSState *ics)
{
    KVMXICSState *icpkvm = KVM_XICS(ics->icp);
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to retrieve KVM interrupt controller state"
                    " for IRQ %d: %s", i + ics->offset, strerror(errno));
            exit(1);
        }

        irq->server = state & KVM_XICS_DESTINATION_MASK;
        irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
            & KVM_XICS_PRIORITY_MASK;
        /*
         * To be consistent with the software emulation in xics.c, we
         * split out the masked state + priority that we get from the
         * kernel into 'current priority' (0xff if masked) and
         * 'saved priority' (if masked, this is the priority the
         * interrupt had before it was masked).  Masking and unmasking
         * are done with the ibm,int-off and ibm,int-on RTAS calls.
         */
        if (state & KVM_XICS_MASKED) {
            irq->priority = 0xff;
        } else {
            irq->priority = irq->saved_priority;
        }

        if (state & KVM_XICS_PENDING) {
            if (state & KVM_XICS_LEVEL_SENSITIVE) {
                irq->status |= XICS_STATUS_ASSERTED;
            } else {
                /*
                 * A pending edge-triggered interrupt (or MSI)
                 * must have been rejected previously when we
                 * first detected it and tried to deliver it,
                 * so mark it as pending and previously rejected
                 * for consistency with how xics.c works.
                 */
                irq->status |= XICS_STATUS_MASKED_PENDING
                    | XICS_STATUS_REJECTED;
            }
        }
    }
}

static int ics_set_kvm_state(ICSState *ics, int version_id)
{
    KVMXICSState *icpkvm = KVM_XICS(ics->icp);
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        state = irq->server;
        state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
            << KVM_XICS_PRIORITY_SHIFT;
        if (irq->priority != irq->saved_priority) {
            assert(irq->priority == 0xff);
            state |= KVM_XICS_MASKED;
        }

        if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
            state |= KVM_XICS_LEVEL_SENSITIVE;
            if (irq->status & XICS_STATUS_ASSERTED) {
                state |= KVM_XICS_PENDING;
            }
        } else {
            if (irq->status & XICS_STATUS_MASKED_PENDING) {
                state |= KVM_XICS_PENDING;
            }
        }

        ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to restore KVM interrupt controller state"
                    " for IRQs %d: %s", i + ics->offset, strerror(errno));
            return ret;
        }
    }

    return 0;
}

static void ics_kvm_set_irq(void *opaque, int srcno, int val)
{
    ICSState *ics = opaque;
    struct kvm_irq_level args;
    int rc;

    args.irq = srcno + ics->offset;
    if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
        if (!val) {
            return;
        }
        args.level = KVM_INTERRUPT_SET;
    } else {
        args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
    }
    rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
    if (rc < 0) {
        perror("kvm_irq_line");
    }
}

static void ics_kvm_reset(DeviceState *dev)
{
    ICSState *ics = ICS(dev);
    int i;
    uint8_t flags[ics->nr_irqs];

    for (i = 0; i < ics->nr_irqs; i++) {
        flags[i] = ics->irqs[i].flags;
    }

    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);

    for (i = 0; i < ics->nr_irqs; i++) {
        ics->irqs[i].priority = 0xff;
        ics->irqs[i].saved_priority = 0xff;
        ics->irqs[i].flags = flags[i];
    }

    ics_set_kvm_state(ics, 1);
}

static void ics_kvm_realize(DeviceState *dev, Error **errp)
{
    ICSState *ics = ICS(dev);

    if (!ics->nr_irqs) {
        error_setg(errp, "Number of interrupts needs to be greater 0");
        return;
    }
    ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
    ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
}

static void ics_kvm_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    ICSStateClass *icsc = ICS_CLASS(klass);

    dc->realize = ics_kvm_realize;
    dc->reset = ics_kvm_reset;
    icsc->pre_save = ics_get_kvm_state;
    icsc->post_load = ics_set_kvm_state;
}

static const TypeInfo ics_kvm_info = {
    .name = TYPE_KVM_ICS,
    .parent = TYPE_ICS,
    .instance_size = sizeof(ICSState),
    .class_init = ics_kvm_class_init,
};

/*
 * XICS-KVM
 */
static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
{
    CPUState *cs;
    ICPState *ss;
    KVMXICSState *icpkvm = KVM_XICS(icp);

    cs = CPU(cpu);
    ss = &icp->ss[cs->cpu_index];

    assert(cs->cpu_index < icp->nr_servers);
    if (icpkvm->kernel_xics_fd == -1) {
        abort();
    }

    /*
     * If we are reusing a parked vCPU fd corresponding to the CPU
     * which was hot-removed earlier we don't have to renable
     * KVM_CAP_IRQ_XICS capability again.
     */
    if (ss->cap_irq_xics_enabled) {
        return;
    }

    if (icpkvm->kernel_xics_fd != -1) {
        int ret;

        ss->cs = cs;

        ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
                                  icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
        if (ret < 0) {
            error_report("Unable to connect CPU%ld to kernel XICS: %s",
                    kvm_arch_vcpu_id(cs), strerror(errno));
            exit(1);
        }
        ss->cap_irq_xics_enabled = true;
    }
}

static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp)
{
    icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
}

static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
                                    Error **errp)
{
    int i;

    icp->nr_servers = nr_servers;

    icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
    for (i = 0; i < icp->nr_servers; i++) {
        char buffer[32];
        object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
        snprintf(buffer, sizeof(buffer), "icp[%d]", i);
        object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
                                  errp);
    }
}

static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
                       uint32_t token,
                       uint32_t nargs, target_ulong args,
                       uint32_t nret, target_ulong rets)
{
    error_report("pseries: %s must never be called for in-kernel XICS",
                 __func__);
}

static void xics_kvm_realize(DeviceState *dev, Error **errp)
{
    KVMXICSState *icpkvm = KVM_XICS(dev);
    XICSState *icp = XICS_COMMON(dev);
    int i, rc;
    Error *error = NULL;
    struct kvm_create_device xics_create_device = {
        .type = KVM_DEV_TYPE_XICS,
        .flags = 0,
    };

    if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
        error_setg(errp,
                   "KVM and IRQ_XICS capability must be present for in-kernel XICS");
        goto fail;
    }

    spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
        goto fail;
    }

    /* Create the kernel ICP */
    rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
    if (rc < 0) {
        error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
        goto fail;
    }

    icpkvm->kernel_xics_fd = xics_create_device.fd;

    object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
    if (error) {
        error_propagate(errp, error);
        goto fail;
    }

    assert(icp->nr_servers);
    for (i = 0; i < icp->nr_servers; i++) {
        object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
        if (error) {
            error_propagate(errp, error);
            goto fail;
        }
    }

    kvm_kernel_irqchip = true;
    kvm_msi_via_irqfd_allowed = true;
    kvm_gsi_direct_mapping = true;

    return;

fail:
    kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
}

static void xics_kvm_initfn(Object *obj)
{
    XICSState *xics = XICS_COMMON(obj);

    xics->ics = ICS(object_new(TYPE_KVM_ICS));
    object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
    xics->ics->icp = xics;
}

static void xics_kvm_class_init(ObjectClass *oc, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(oc);
    XICSStateClass *xsc = XICS_COMMON_CLASS(oc);

    dc->realize = xics_kvm_realize;
    xsc->cpu_setup = xics_kvm_cpu_setup;
    xsc->set_nr_irqs = xics_kvm_set_nr_irqs;
    xsc->set_nr_servers = xics_kvm_set_nr_servers;
}

static const TypeInfo xics_kvm_info = {
    .name          = TYPE_KVM_XICS,
    .parent        = TYPE_XICS_COMMON,
    .instance_size = sizeof(KVMXICSState),
    .class_init    = xics_kvm_class_init,
    .instance_init = xics_kvm_initfn,
};

static void xics_kvm_register_types(void)
{
    type_register_static(&xics_kvm_info);
    type_register_static(&ics_kvm_info);
    type_register_static(&icp_kvm_info);
}

type_init(xics_kvm_register_types)
Commit	Line	Data
11ad93f6 DG	1	/*
	2	* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
	3	*
	4	* PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
	5	*
	6	* Copyright (c) 2013 David Gibson, IBM Corporation.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a copy
	9	* of this software and associated documentation files (the "Software"), to deal
	10	* in the Software without restriction, including without limitation the rights
	11	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	12	* copies of the Software, and to permit persons to whom the Software is
	13	* furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice shall be included in
	16	* all copies or substantial portions of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	21	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	23	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	24	* THE SOFTWARE.
	25	*
	26	*/
	27
0d75590d	28	#include "qemu/osdep.h"
11ad93f6 DG	29	#include "hw/hw.h"
	30	#include "trace.h"
	31	#include "hw/ppc/spapr.h"
	32	#include "hw/ppc/xics.h"
	33	#include "kvm_ppc.h"
	34	#include "qemu/config-file.h"
	35	#include "qemu/error-report.h"
	36
	37	#include <sys/ioctl.h>
	38
	39	typedef struct KVMXICSState {
	40	XICSState parent_obj;
	41
11ad93f6 DG	42	int kernel_xics_fd;
	43	} KVMXICSState;
	44
	45	/*
	46	* ICP-KVM
	47	*/
	48	static void icp_get_kvm_state(ICPState *ss)
	49	{
	50	uint64_t state;
	51	struct kvm_one_reg reg = {
	52	.id = KVM_REG_PPC_ICP_STATE,
	53	.addr = (uintptr_t)&state,
	54	};
	55	int ret;
	56
	57	/* ICP for this CPU thread is not in use, exiting */
	58	if (!ss->cs) {
	59	return;
	60	}
	61
	62	ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, &reg);
	63	if (ret != 0) {
	64	error_report("Unable to retrieve KVM interrupt controller state"
0f20ba62	65	" for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
11ad93f6 DG	66	exit(1);
	67	}
	68
	69	ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
	70	ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
	71	& KVM_REG_PPC_ICP_MFRR_MASK;
	72	ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
	73	& KVM_REG_PPC_ICP_PPRI_MASK;
	74	}
	75
	76	static int icp_set_kvm_state(ICPState *ss, int version_id)
	77	{
	78	uint64_t state;
	79	struct kvm_one_reg reg = {
	80	.id = KVM_REG_PPC_ICP_STATE,
	81	.addr = (uintptr_t)&state,
	82	};
	83	int ret;
	84
	85	/* ICP for this CPU thread is not in use, exiting */
	86	if (!ss->cs) {
	87	return 0;
	88	}
	89
	90	state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
	91	\| ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
	92	\| ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
	93
	94	ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, &reg);
	95	if (ret != 0) {
	96	error_report("Unable to restore KVM interrupt controller state (0x%"
0f20ba62	97	PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
11ad93f6 DG	98	strerror(errno));
	99	return ret;
	100	}
	101
	102	return 0;
	103	}
	104
	105	static void icp_kvm_reset(DeviceState *dev)
	106	{
	107	ICPState *icp = ICP(dev);
	108
	109	icp->xirr = 0;
	110	icp->pending_priority = 0xff;
	111	icp->mfrr = 0xff;
	112
	113	/* Make all outputs are deasserted */
	114	qemu_set_irq(icp->output, 0);
	115
	116	icp_set_kvm_state(icp, 1);
	117	}
	118
	119	static void icp_kvm_class_init(ObjectClass klass, void data)
	120	{
	121	DeviceClass *dc = DEVICE_CLASS(klass);
	122	ICPStateClass *icpc = ICP_CLASS(klass);
	123
	124	dc->reset = icp_kvm_reset;
	125	icpc->pre_save = icp_get_kvm_state;
	126	icpc->post_load = icp_set_kvm_state;
	127	}
	128
	129	static const TypeInfo icp_kvm_info = {
	130	.name = TYPE_KVM_ICP,
	131	.parent = TYPE_ICP,
	132	.instance_size = sizeof(ICPState),
	133	.class_init = icp_kvm_class_init,
	134	.class_size = sizeof(ICPStateClass),
	135	};
	136
	137	/*
	138	* ICS-KVM
	139	*/
	140	static void ics_get_kvm_state(ICSState *ics)
	141	{
	142	KVMXICSState *icpkvm = KVM_XICS(ics->icp);
	143	uint64_t state;
	144	struct kvm_device_attr attr = {
	145	.flags = 0,
	146	.group = KVM_DEV_XICS_GRP_SOURCES,
	147	.addr = (uint64_t)(uintptr_t)&state,
	148	};
	149	int i;
	150
	151	for (i = 0; i < ics->nr_irqs; i++) {
	152	ICSIRQState *irq = &ics->irqs[i];
	153	int ret;
	154
	155	attr.attr = i + ics->offset;
	156
	157	ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
	158	if (ret != 0) {
	159	error_report("Unable to retrieve KVM interrupt controller state"
	160	" for IRQ %d: %s", i + ics->offset, strerror(errno));
	161	exit(1);
162	}
163
164	irq->server = state & KVM_XICS_DESTINATION_MASK;
165	irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
166	& KVM_XICS_PRIORITY_MASK;
167	/*
168	* To be consistent with the software emulation in xics.c, we
169	* split out the masked state + priority that we get from the
170	* kernel into 'current priority' (0xff if masked) and
171	* 'saved priority' (if masked, this is the priority the
172	* interrupt had before it was masked). Masking and unmasking
173	* are done with the ibm,int-off and ibm,int-on RTAS calls.
174	*/
175	if (state & KVM_XICS_MASKED) {
176	irq->priority = 0xff;
177	} else {
178	irq->priority = irq->saved_priority;
179	}
180
181	if (state & KVM_XICS_PENDING) {
182	if (state & KVM_XICS_LEVEL_SENSITIVE) {
183	irq->status \|= XICS_STATUS_ASSERTED;
184	} else {
185	/*
186	* A pending edge-triggered interrupt (or MSI)
187	* must have been rejected previously when we
188	* first detected it and tried to deliver it,
189	* so mark it as pending and previously rejected
190	* for consistency with how xics.c works.
191	*/
192	irq->status \|= XICS_STATUS_MASKED_PENDING
193	\| XICS_STATUS_REJECTED;
194	}
195	}
196	}
197	}
198
199	static int ics_set_kvm_state(ICSState *ics, int version_id)
200	{
201	KVMXICSState *icpkvm = KVM_XICS(ics->icp);
202	uint64_t state;
203	struct kvm_device_attr attr = {
204	.flags = 0,
205	.group = KVM_DEV_XICS_GRP_SOURCES,
206	.addr = (uint64_t)(uintptr_t)&state,
207	};
208	int i;
209
210	for (i = 0; i < ics->nr_irqs; i++) {
211	ICSIRQState *irq = &ics->irqs[i];
212	int ret;
213
214	attr.attr = i + ics->offset;
215
216	state = irq->server;
217	state \|= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
218	<< KVM_XICS_PRIORITY_SHIFT;
219	if (irq->priority != irq->saved_priority) {
220	assert(irq->priority == 0xff);
221	state \|= KVM_XICS_MASKED;
222	}
223
4af88944	224	if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
11ad93f6 DG	225	state \|= KVM_XICS_LEVEL_SENSITIVE;
	226	if (irq->status & XICS_STATUS_ASSERTED) {
	227	state \|= KVM_XICS_PENDING;
	228	}
	229	} else {
	230	if (irq->status & XICS_STATUS_MASKED_PENDING) {
	231	state \|= KVM_XICS_PENDING;
	232	}
	233	}
	234
	235	ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
	236	if (ret != 0) {
	237	error_report("Unable to restore KVM interrupt controller state"
	238	" for IRQs %d: %s", i + ics->offset, strerror(errno));
	239	return ret;
	240	}
	241	}
	242
	243	return 0;
	244	}
	245
	246	static void ics_kvm_set_irq(void *opaque, int srcno, int val)
	247	{
	248	ICSState *ics = opaque;
	249	struct kvm_irq_level args;
	250	int rc;
	251
	252	args.irq = srcno + ics->offset;
4af88944	253	if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
11ad93f6 DG	254	if (!val) {
	255	return;
	256	}
	257	args.level = KVM_INTERRUPT_SET;
	258	} else {
	259	args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
	260	}
	261	rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
	262	if (rc < 0) {
	263	perror("kvm_irq_line");
	264	}
	265	}
	266
	267	static void ics_kvm_reset(DeviceState *dev)
	268	{
fb0e843a AK	269	ICSState *ics = ICS(dev);
fb0e843a AK	270	int i;
a7e519a8 AK	271	uint8_t flags[ics->nr_irqs];
	272
	273	for (i = 0; i < ics->nr_irqs; i++) {
	274	flags[i] = ics->irqs[i].flags;
	275	}
fb0e843a AK	276
fb0e843a AK	277	memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
a7e519a8	278
fb0e843a AK	279	for (i = 0; i < ics->nr_irqs; i++) {
	280	ics->irqs[i].priority = 0xff;
	281	ics->irqs[i].saved_priority = 0xff;
a7e519a8	282	ics->irqs[i].flags = flags[i];
fb0e843a AK	283	}
	284
	285	ics_set_kvm_state(ics, 1);
11ad93f6 DG	286	}
	287
	288	static void ics_kvm_realize(DeviceState dev, Error *errp)
	289	{
	290	ICSState *ics = ICS(dev);
	291
	292	if (!ics->nr_irqs) {
	293	error_setg(errp, "Number of interrupts needs to be greater 0");
	294	return;
	295	}
	296	ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
11ad93f6 DG	297	ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
	298	}
	299
	300	static void ics_kvm_class_init(ObjectClass klass, void data)
	301	{
	302	DeviceClass *dc = DEVICE_CLASS(klass);
	303	ICSStateClass *icsc = ICS_CLASS(klass);
	304
	305	dc->realize = ics_kvm_realize;
	306	dc->reset = ics_kvm_reset;
	307	icsc->pre_save = ics_get_kvm_state;
	308	icsc->post_load = ics_set_kvm_state;
	309	}
	310
	311	static const TypeInfo ics_kvm_info = {
	312	.name = TYPE_KVM_ICS,
	313	.parent = TYPE_ICS,
	314	.instance_size = sizeof(ICSState),
	315	.class_init = ics_kvm_class_init,
	316	};
	317
	318	/*
	319	* XICS-KVM
	320	*/
	321	static void xics_kvm_cpu_setup(XICSState icp, PowerPCCPU cpu)
	322	{
	323	CPUState *cs;
	324	ICPState *ss;
	325	KVMXICSState *icpkvm = KVM_XICS(icp);
	326
	327	cs = CPU(cpu);
	328	ss = &icp->ss[cs->cpu_index];
	329
	330	assert(cs->cpu_index < icp->nr_servers);
	331	if (icpkvm->kernel_xics_fd == -1) {
	332	abort();
	333	}
	334
a45863bd BR	335	/*
	336	* If we are reusing a parked vCPU fd corresponding to the CPU
	337	* which was hot-removed earlier we don't have to renable
	338	* KVM_CAP_IRQ_XICS capability again.
	339	*/
	340	if (ss->cap_irq_xics_enabled) {
	341	return;
	342	}
	343
11ad93f6 DG	344	if (icpkvm->kernel_xics_fd != -1) {
11ad93f6 DG	345	int ret;
11ad93f6 DG	346
	347	ss->cs = cs;
	348
48add816 CH	349	ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
48add816 CH	350	icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
11ad93f6	351	if (ret < 0) {
0f20ba62 AK	352	error_report("Unable to connect CPU%ld to kernel XICS: %s",
0f20ba62 AK	353	kvm_arch_vcpu_id(cs), strerror(errno));
11ad93f6 DG	354	exit(1);
11ad93f6 DG	355	}
a45863bd	356	ss->cap_irq_xics_enabled = true;
11ad93f6 DG	357	}
	358	}
	359
	360	static void xics_kvm_set_nr_irqs(XICSState icp, uint32_t nr_irqs, Error *errp)
	361	{
	362	icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
	363	}
	364
	365	static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
	366	Error **errp)
	367	{
	368	int i;
	369
	370	icp->nr_servers = nr_servers;
	371
	372	icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
	373	for (i = 0; i < icp->nr_servers; i++) {
	374	char buffer[32];
	375	object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
	376	snprintf(buffer, sizeof(buffer), "icp[%d]", i);
	377	object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
	378	errp);
	379	}
	380	}
	381
28e02042	382	static void rtas_dummy(PowerPCCPU cpu, sPAPRMachineState spapr,
11ad93f6 DG	383	uint32_t token,
	384	uint32_t nargs, target_ulong args,
	385	uint32_t nret, target_ulong rets)
	386	{
	387	error_report("pseries: %s must never be called for in-kernel XICS",
	388	__func__);
	389	}
	390
	391	static void xics_kvm_realize(DeviceState dev, Error *errp)
	392	{
	393	KVMXICSState *icpkvm = KVM_XICS(dev);
	394	XICSState *icp = XICS_COMMON(dev);
	395	int i, rc;
	396	Error *error = NULL;
	397	struct kvm_create_device xics_create_device = {
	398	.type = KVM_DEV_TYPE_XICS,
	399	.flags = 0,
	400	};
	401
	402	if (!kvm_enabled() \|\| !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
	403	error_setg(errp,
	404	"KVM and IRQ_XICS capability must be present for in-kernel XICS");
	405	goto fail;
	406	}
	407
3a3b8502 AK	408	spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
	409	spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
	410	spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
	411	spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
11ad93f6	412
3a3b8502	413	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
11ad93f6 DG	414	if (rc < 0) {
	415	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
	416	goto fail;
	417	}
	418
3a3b8502	419	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
11ad93f6 DG	420	if (rc < 0) {
	421	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
	422	goto fail;
	423	}
	424
3a3b8502	425	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
11ad93f6 DG	426	if (rc < 0) {
	427	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
	428	goto fail;
	429	}
	430
3a3b8502	431	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
11ad93f6 DG	432	if (rc < 0) {
	433	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
	434	goto fail;
	435	}
	436
	437	/* Create the kernel ICP */
	438	rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
	439	if (rc < 0) {
	440	error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
	441	goto fail;
	442	}
	443
	444	icpkvm->kernel_xics_fd = xics_create_device.fd;
	445
	446	object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
	447	if (error) {
	448	error_propagate(errp, error);
	449	goto fail;
	450	}
	451
	452	assert(icp->nr_servers);
	453	for (i = 0; i < icp->nr_servers; i++) {
	454	object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
	455	if (error) {
	456	error_propagate(errp, error);
	457	goto fail;
	458	}
	459	}
9554233c AK	460
9554233c AK	461	kvm_kernel_irqchip = true;
9554233c AK	462	kvm_msi_via_irqfd_allowed = true;
	463	kvm_gsi_direct_mapping = true;
	464
11ad93f6 DG	465	return;
	466
	467	fail:
	468	kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
	469	kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
	470	kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
	471	kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
	472	}
	473
	474	static void xics_kvm_initfn(Object *obj)
	475	{
	476	XICSState *xics = XICS_COMMON(obj);
	477
	478	xics->ics = ICS(object_new(TYPE_KVM_ICS));
	479	object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
	480	xics->ics->icp = xics;
	481	}
	482
	483	static void xics_kvm_class_init(ObjectClass oc, void data)
	484	{
	485	DeviceClass *dc = DEVICE_CLASS(oc);
	486	XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
	487
	488	dc->realize = xics_kvm_realize;
	489	xsc->cpu_setup = xics_kvm_cpu_setup;
	490	xsc->set_nr_irqs = xics_kvm_set_nr_irqs;
	491	xsc->set_nr_servers = xics_kvm_set_nr_servers;
	492	}
	493
	494	static const TypeInfo xics_kvm_info = {
	495	.name = TYPE_KVM_XICS,
	496	.parent = TYPE_XICS_COMMON,
	497	.instance_size = sizeof(KVMXICSState),
	498	.class_init = xics_kvm_class_init,
	499	.instance_init = xics_kvm_initfn,
	500	};
	501
	502	static void xics_kvm_register_types(void)
	503	{
	504	type_register_static(&xics_kvm_info);
	505	type_register_static(&ics_kvm_info);
	506	type_register_static(&icp_kvm_info);
	507	}
	508
	509	type_init(xics_kvm_register_types)