[mirror_qemu.git] / hw / intc / xics_kvm.c

/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
 *
 * Copyright (c) 2013 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
#include "trace.h"
#include "sysemu/kvm.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/xics.h"
#include "kvm_ppc.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"

#include <sys/ioctl.h>

static int kernel_xics_fd = -1;

typedef struct KVMEnabledICP {
    unsigned long vcpu_id;
    QLIST_ENTRY(KVMEnabledICP) node;
} KVMEnabledICP;

static QLIST_HEAD(, KVMEnabledICP)
    kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);

/*
 * ICP-KVM
 */
static void icp_get_kvm_state(ICPState *icp)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!icp->cs) {
        return;
    }

    ret = kvm_vcpu_ioctl(icp->cs, KVM_GET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to retrieve KVM interrupt controller state"
                " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
        exit(1);
    }

    icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
    icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
        & KVM_REG_PPC_ICP_MFRR_MASK;
    icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
        & KVM_REG_PPC_ICP_PPRI_MASK;
}

static int icp_set_kvm_state(ICPState *icp, int version_id)
{
    uint64_t state;
    struct kvm_one_reg reg = {
        .id = KVM_REG_PPC_ICP_STATE,
        .addr = (uintptr_t)&state,
    };
    int ret;

    /* ICP for this CPU thread is not in use, exiting */
    if (!icp->cs) {
        return 0;
    }

    state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
        | ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
        | ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);

    ret = kvm_vcpu_ioctl(icp->cs, KVM_SET_ONE_REG, &reg);
    if (ret != 0) {
        error_report("Unable to restore KVM interrupt controller state (0x%"
                PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
                strerror(errno));
        return ret;
    }

    return 0;
}

static void icp_kvm_reset(ICPState *icp)
{
    icp_set_kvm_state(icp, 1);
}

static void icp_kvm_cpu_setup(ICPState *icp, PowerPCCPU *cpu)
{
    CPUState *cs = CPU(cpu);
    KVMEnabledICP *enabled_icp;
    unsigned long vcpu_id = kvm_arch_vcpu_id(cs);
    int ret;

    if (kernel_xics_fd == -1) {
        abort();
    }

    /*
     * If we are reusing a parked vCPU fd corresponding to the CPU
     * which was hot-removed earlier we don't have to renable
     * KVM_CAP_IRQ_XICS capability again.
     */
    QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
        if (enabled_icp->vcpu_id == vcpu_id) {
            return;
        }
    }

    ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
    if (ret < 0) {
        error_report("Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
                     strerror(errno));
        exit(1);
    }
    enabled_icp = g_malloc(sizeof(*enabled_icp));
    enabled_icp->vcpu_id = vcpu_id;
    QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
}

static void icp_kvm_class_init(ObjectClass *klass, void *data)
{
    ICPStateClass *icpc = ICP_CLASS(klass);

    icpc->pre_save = icp_get_kvm_state;
    icpc->post_load = icp_set_kvm_state;
    icpc->cpu_setup = icp_kvm_cpu_setup;
    icpc->reset = icp_kvm_reset;
}

static const TypeInfo icp_kvm_info = {
    .name = TYPE_KVM_ICP,
    .parent = TYPE_ICP,
    .instance_size = sizeof(ICPState),
    .class_init = icp_kvm_class_init,
    .class_size = sizeof(ICPStateClass),
};

/*
 * ICS-KVM
 */
static void ics_get_kvm_state(ICSState *ics)
{
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        ret = ioctl(kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to retrieve KVM interrupt controller state"
                    " for IRQ %d: %s", i + ics->offset, strerror(errno));
            exit(1);
        }

        irq->server = state & KVM_XICS_DESTINATION_MASK;
        irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
            & KVM_XICS_PRIORITY_MASK;
        /*
         * To be consistent with the software emulation in xics.c, we
         * split out the masked state + priority that we get from the
         * kernel into 'current priority' (0xff if masked) and
         * 'saved priority' (if masked, this is the priority the
         * interrupt had before it was masked).  Masking and unmasking
         * are done with the ibm,int-off and ibm,int-on RTAS calls.
         */
        if (state & KVM_XICS_MASKED) {
            irq->priority = 0xff;
        } else {
            irq->priority = irq->saved_priority;
        }

        irq->status = 0;
        if (state & KVM_XICS_PENDING) {
            if (state & KVM_XICS_LEVEL_SENSITIVE) {
                irq->status |= XICS_STATUS_ASSERTED;
            } else {
                /*
                 * A pending edge-triggered interrupt (or MSI)
                 * must have been rejected previously when we
                 * first detected it and tried to deliver it,
                 * so mark it as pending and previously rejected
                 * for consistency with how xics.c works.
                 */
                irq->status |= XICS_STATUS_MASKED_PENDING
                    | XICS_STATUS_REJECTED;
            }
        }
        if (state & KVM_XICS_PRESENTED) {
                irq->status |= XICS_STATUS_PRESENTED;
        }
        if (state & KVM_XICS_QUEUED) {
                irq->status |= XICS_STATUS_QUEUED;
        }
    }
}

static int ics_set_kvm_state(ICSState *ics, int version_id)
{
    uint64_t state;
    struct kvm_device_attr attr = {
        .flags = 0,
        .group = KVM_DEV_XICS_GRP_SOURCES,
        .addr = (uint64_t)(uintptr_t)&state,
    };
    int i;

    for (i = 0; i < ics->nr_irqs; i++) {
        ICSIRQState *irq = &ics->irqs[i];
        int ret;

        attr.attr = i + ics->offset;

        state = irq->server;
        state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
            << KVM_XICS_PRIORITY_SHIFT;
        if (irq->priority != irq->saved_priority) {
            assert(irq->priority == 0xff);
            state |= KVM_XICS_MASKED;
        }

        if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
            state |= KVM_XICS_LEVEL_SENSITIVE;
            if (irq->status & XICS_STATUS_ASSERTED) {
                state |= KVM_XICS_PENDING;
            }
        } else {
            if (irq->status & XICS_STATUS_MASKED_PENDING) {
                state |= KVM_XICS_PENDING;
            }
        }
        if (irq->status & XICS_STATUS_PRESENTED) {
                state |= KVM_XICS_PRESENTED;
        }
        if (irq->status & XICS_STATUS_QUEUED) {
                state |= KVM_XICS_QUEUED;
        }

        ret = ioctl(kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
        if (ret != 0) {
            error_report("Unable to restore KVM interrupt controller state"
                    " for IRQs %d: %s", i + ics->offset, strerror(errno));
            return ret;
        }
    }

    return 0;
}

static void ics_kvm_set_irq(void *opaque, int srcno, int val)
{
    ICSState *ics = opaque;
    struct kvm_irq_level args;
    int rc;

    args.irq = srcno + ics->offset;
    if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
        if (!val) {
            return;
        }
        args.level = KVM_INTERRUPT_SET;
    } else {
        args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
    }
    rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
    if (rc < 0) {
        perror("kvm_irq_line");
    }
}

static void ics_kvm_reset(void *dev)
{
    ICSState *ics = ICS_SIMPLE(dev);
    int i;
    uint8_t flags[ics->nr_irqs];

    for (i = 0; i < ics->nr_irqs; i++) {
        flags[i] = ics->irqs[i].flags;
    }

    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);

    for (i = 0; i < ics->nr_irqs; i++) {
        ics->irqs[i].priority = 0xff;
        ics->irqs[i].saved_priority = 0xff;
        ics->irqs[i].flags = flags[i];
    }

    ics_set_kvm_state(ics, 1);
}

static void ics_kvm_realize(ICSState *ics, Error **errp)
{
    if (!ics->nr_irqs) {
        error_setg(errp, "Number of interrupts needs to be greater 0");
        return;
    }
    ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
    ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);

    qemu_register_reset(ics_kvm_reset, ics);
}

static void ics_kvm_class_init(ObjectClass *klass, void *data)
{
    ICSStateClass *icsc = ICS_BASE_CLASS(klass);

    icsc->realize = ics_kvm_realize;
    icsc->pre_save = ics_get_kvm_state;
    icsc->post_load = ics_set_kvm_state;
}

static const TypeInfo ics_kvm_info = {
    .name = TYPE_ICS_KVM,
    .parent = TYPE_ICS_SIMPLE,
    .instance_size = sizeof(ICSState),
    .class_init = ics_kvm_class_init,
};

/*
 * XICS-KVM
 */

static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
                       uint32_t token,
                       uint32_t nargs, target_ulong args,
                       uint32_t nret, target_ulong rets)
{
    error_report("pseries: %s must never be called for in-kernel XICS",
                 __func__);
}

int xics_kvm_init(sPAPRMachineState *spapr, Error **errp)
{
    int rc;
    struct kvm_create_device xics_create_device = {
        .type = KVM_DEV_TYPE_XICS,
        .flags = 0,
    };

    if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
        error_setg(errp,
                   "KVM and IRQ_XICS capability must be present for in-kernel XICS");
        goto fail;
    }

    spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
    spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
        goto fail;
    }

    rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
    if (rc < 0) {
        error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
        goto fail;
    }

    /* Create the kernel ICP */
    rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
    if (rc < 0) {
        error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
        goto fail;
    }

    kernel_xics_fd = xics_create_device.fd;

    kvm_kernel_irqchip = true;
    kvm_msi_via_irqfd_allowed = true;
    kvm_gsi_direct_mapping = true;

    return rc;

fail:
    kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
    kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
    return -1;
}

static void xics_kvm_register_types(void)
{
    type_register_static(&ics_kvm_info);
    type_register_static(&icp_kvm_info);
}

type_init(xics_kvm_register_types)
Commit	Line	Data
11ad93f6 DG	1	/*
	2	* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
	3	*
	4	* PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
	5	*
	6	* Copyright (c) 2013 David Gibson, IBM Corporation.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a copy
	9	* of this software and associated documentation files (the "Software"), to deal
	10	* in the Software without restriction, including without limitation the rights
	11	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	12	* copies of the Software, and to permit persons to whom the Software is
	13	* furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice shall be included in
	16	* all copies or substantial portions of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	21	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	23	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	24	* THE SOFTWARE.
	25	*
	26	*/
	27
0d75590d	28	#include "qemu/osdep.h"
da34e65c	29	#include "qapi/error.h"
4771d756 PB	30	#include "qemu-common.h"
4771d756 PB	31	#include "cpu.h"
11ad93f6 DG	32	#include "hw/hw.h"
11ad93f6 DG	33	#include "trace.h"
77ac58dd	34	#include "sysemu/kvm.h"
11ad93f6 DG	35	#include "hw/ppc/spapr.h"
	36	#include "hw/ppc/xics.h"
	37	#include "kvm_ppc.h"
	38	#include "qemu/config-file.h"
	39	#include "qemu/error-report.h"
	40
	41	#include <sys/ioctl.h>
	42
729f8a4f CLG	43	static int kernel_xics_fd = -1;
729f8a4f CLG	44
de86eccc GK	45	typedef struct KVMEnabledICP {
	46	unsigned long vcpu_id;
	47	QLIST_ENTRY(KVMEnabledICP) node;
	48	} KVMEnabledICP;
	49
	50	static QLIST_HEAD(, KVMEnabledICP)
	51	kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);
	52
11ad93f6 DG	53	/*
	54	* ICP-KVM
	55	*/
8e4fba20	56	static void icp_get_kvm_state(ICPState *icp)
11ad93f6 DG	57	{
	58	uint64_t state;
	59	struct kvm_one_reg reg = {
	60	.id = KVM_REG_PPC_ICP_STATE,
	61	.addr = (uintptr_t)&state,
	62	};
	63	int ret;
	64
	65	/* ICP for this CPU thread is not in use, exiting */
8e4fba20	66	if (!icp->cs) {
11ad93f6 DG	67	return;
	68	}
	69
8e4fba20	70	ret = kvm_vcpu_ioctl(icp->cs, KVM_GET_ONE_REG, &reg);
11ad93f6 DG	71	if (ret != 0) {
11ad93f6 DG	72	error_report("Unable to retrieve KVM interrupt controller state"
8e4fba20	73	" for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
11ad93f6 DG	74	exit(1);
	75	}
	76
8e4fba20 CLG	77	icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
8e4fba20 CLG	78	icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
11ad93f6	79	& KVM_REG_PPC_ICP_MFRR_MASK;
8e4fba20	80	icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
11ad93f6 DG	81	& KVM_REG_PPC_ICP_PPRI_MASK;
	82	}
	83
8e4fba20	84	static int icp_set_kvm_state(ICPState *icp, int version_id)
11ad93f6 DG	85	{
	86	uint64_t state;
	87	struct kvm_one_reg reg = {
	88	.id = KVM_REG_PPC_ICP_STATE,
	89	.addr = (uintptr_t)&state,
	90	};
	91	int ret;
	92
	93	/* ICP for this CPU thread is not in use, exiting */
8e4fba20	94	if (!icp->cs) {
11ad93f6 DG	95	return 0;
	96	}
	97
8e4fba20 CLG	98	state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
	99	\| ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
	100	\| ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
11ad93f6	101
8e4fba20	102	ret = kvm_vcpu_ioctl(icp->cs, KVM_SET_ONE_REG, &reg);
11ad93f6 DG	103	if (ret != 0) {
11ad93f6 DG	104	error_report("Unable to restore KVM interrupt controller state (0x%"
8e4fba20	105	PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
11ad93f6 DG	106	strerror(errno));
	107	return ret;
	108	}
	109
	110	return 0;
	111	}
	112
a4d4edce	113	static void icp_kvm_reset(ICPState *icp)
11ad93f6	114	{
11ad93f6 DG	115	icp_set_kvm_state(icp, 1);
	116	}
	117
8e4fba20	118	static void icp_kvm_cpu_setup(ICPState icp, PowerPCCPU cpu)
f0232434 CLG	119	{
f0232434 CLG	120	CPUState *cs = CPU(cpu);
de86eccc GK	121	KVMEnabledICP *enabled_icp;
de86eccc GK	122	unsigned long vcpu_id = kvm_arch_vcpu_id(cs);
f0232434 CLG	123	int ret;
	124
	125	if (kernel_xics_fd == -1) {
	126	abort();
	127	}
	128
	129	/*
	130	* If we are reusing a parked vCPU fd corresponding to the CPU
	131	* which was hot-removed earlier we don't have to renable
	132	* KVM_CAP_IRQ_XICS capability again.
	133	*/
de86eccc GK	134	QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
	135	if (enabled_icp->vcpu_id == vcpu_id) {
	136	return;
	137	}
f0232434 CLG	138	}
f0232434 CLG	139
de86eccc	140	ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
f0232434	141	if (ret < 0) {
de86eccc GK	142	error_report("Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
de86eccc GK	143	strerror(errno));
f0232434 CLG	144	exit(1);
f0232434 CLG	145	}
de86eccc GK	146	enabled_icp = g_malloc(sizeof(*enabled_icp));
	147	enabled_icp->vcpu_id = vcpu_id;
	148	QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
f0232434 CLG	149	}
f0232434 CLG	150
11ad93f6 DG	151	static void icp_kvm_class_init(ObjectClass klass, void data)
11ad93f6 DG	152	{
11ad93f6 DG	153	ICPStateClass *icpc = ICP_CLASS(klass);
11ad93f6 DG	154
11ad93f6 DG	155	icpc->pre_save = icp_get_kvm_state;
11ad93f6 DG	156	icpc->post_load = icp_set_kvm_state;
f0232434	157	icpc->cpu_setup = icp_kvm_cpu_setup;
a4d4edce	158	icpc->reset = icp_kvm_reset;
11ad93f6 DG	159	}
	160
	161	static const TypeInfo icp_kvm_info = {
	162	.name = TYPE_KVM_ICP,
	163	.parent = TYPE_ICP,
	164	.instance_size = sizeof(ICPState),
	165	.class_init = icp_kvm_class_init,
	166	.class_size = sizeof(ICPStateClass),
	167	};
	168
	169	/*
	170	* ICS-KVM
	171	*/
	172	static void ics_get_kvm_state(ICSState *ics)
	173	{
11ad93f6 DG	174	uint64_t state;
	175	struct kvm_device_attr attr = {
	176	.flags = 0,
	177	.group = KVM_DEV_XICS_GRP_SOURCES,
	178	.addr = (uint64_t)(uintptr_t)&state,
	179	};
	180	int i;
	181
	182	for (i = 0; i < ics->nr_irqs; i++) {
	183	ICSIRQState *irq = &ics->irqs[i];
	184	int ret;
	185
	186	attr.attr = i + ics->offset;
	187
729f8a4f	188	ret = ioctl(kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
11ad93f6 DG	189	if (ret != 0) {
	190	error_report("Unable to retrieve KVM interrupt controller state"
	191	" for IRQ %d: %s", i + ics->offset, strerror(errno));
	192	exit(1);
	193	}
	194
	195	irq->server = state & KVM_XICS_DESTINATION_MASK;
	196	irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
	197	& KVM_XICS_PRIORITY_MASK;
	198	/*
	199	* To be consistent with the software emulation in xics.c, we
	200	* split out the masked state + priority that we get from the
	201	* kernel into 'current priority' (0xff if masked) and
	202	* 'saved priority' (if masked, this is the priority the
	203	* interrupt had before it was masked). Masking and unmasking
	204	* are done with the ibm,int-off and ibm,int-on RTAS calls.
	205	*/
	206	if (state & KVM_XICS_MASKED) {
	207	irq->priority = 0xff;
	208	} else {
	209	irq->priority = irq->saved_priority;
	210	}
	211
063cb7cb	212	irq->status = 0;
11ad93f6 DG	213	if (state & KVM_XICS_PENDING) {
	214	if (state & KVM_XICS_LEVEL_SENSITIVE) {
	215	irq->status \|= XICS_STATUS_ASSERTED;
	216	} else {
	217	/*
	218	* A pending edge-triggered interrupt (or MSI)
	219	* must have been rejected previously when we
	220	* first detected it and tried to deliver it,
	221	* so mark it as pending and previously rejected
	222	* for consistency with how xics.c works.
	223	*/
	224	irq->status \|= XICS_STATUS_MASKED_PENDING
	225	\| XICS_STATUS_REJECTED;
	226	}
	227	}
229e16fd SB	228	if (state & KVM_XICS_PRESENTED) {
	229	irq->status \|= XICS_STATUS_PRESENTED;
	230	}
	231	if (state & KVM_XICS_QUEUED) {
	232	irq->status \|= XICS_STATUS_QUEUED;
	233	}
11ad93f6 DG	234	}
	235	}
	236
	237	static int ics_set_kvm_state(ICSState *ics, int version_id)
	238	{
11ad93f6 DG	239	uint64_t state;
	240	struct kvm_device_attr attr = {
	241	.flags = 0,
	242	.group = KVM_DEV_XICS_GRP_SOURCES,
	243	.addr = (uint64_t)(uintptr_t)&state,
	244	};
	245	int i;
	246
	247	for (i = 0; i < ics->nr_irqs; i++) {
	248	ICSIRQState *irq = &ics->irqs[i];
	249	int ret;
	250
	251	attr.attr = i + ics->offset;
	252
	253	state = irq->server;
	254	state \|= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
	255	<< KVM_XICS_PRIORITY_SHIFT;
	256	if (irq->priority != irq->saved_priority) {
	257	assert(irq->priority == 0xff);
	258	state \|= KVM_XICS_MASKED;
	259	}
	260
4af88944	261	if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
11ad93f6 DG	262	state \|= KVM_XICS_LEVEL_SENSITIVE;
	263	if (irq->status & XICS_STATUS_ASSERTED) {
	264	state \|= KVM_XICS_PENDING;
	265	}
	266	} else {
	267	if (irq->status & XICS_STATUS_MASKED_PENDING) {
	268	state \|= KVM_XICS_PENDING;
	269	}
	270	}
229e16fd SB	271	if (irq->status & XICS_STATUS_PRESENTED) {
	272	state \|= KVM_XICS_PRESENTED;
	273	}
	274	if (irq->status & XICS_STATUS_QUEUED) {
	275	state \|= KVM_XICS_QUEUED;
	276	}
11ad93f6	277
729f8a4f	278	ret = ioctl(kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
11ad93f6 DG	279	if (ret != 0) {
	280	error_report("Unable to restore KVM interrupt controller state"
	281	" for IRQs %d: %s", i + ics->offset, strerror(errno));
	282	return ret;
	283	}
	284	}
	285
	286	return 0;
	287	}
	288
	289	static void ics_kvm_set_irq(void *opaque, int srcno, int val)
	290	{
	291	ICSState *ics = opaque;
	292	struct kvm_irq_level args;
	293	int rc;
	294
	295	args.irq = srcno + ics->offset;
4af88944	296	if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
11ad93f6 DG	297	if (!val) {
	298	return;
	299	}
	300	args.level = KVM_INTERRUPT_SET;
	301	} else {
	302	args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
	303	}
	304	rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
	305	if (rc < 0) {
	306	perror("kvm_irq_line");
	307	}
	308	}
	309
7ea6e067	310	static void ics_kvm_reset(void *dev)
11ad93f6	311	{
d4d7a59a	312	ICSState *ics = ICS_SIMPLE(dev);
fb0e843a	313	int i;
a7e519a8 AK	314	uint8_t flags[ics->nr_irqs];
	315
	316	for (i = 0; i < ics->nr_irqs; i++) {
	317	flags[i] = ics->irqs[i].flags;
	318	}
fb0e843a AK	319
fb0e843a AK	320	memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
a7e519a8	321
fb0e843a AK	322	for (i = 0; i < ics->nr_irqs; i++) {
	323	ics->irqs[i].priority = 0xff;
	324	ics->irqs[i].saved_priority = 0xff;
a7e519a8	325	ics->irqs[i].flags = flags[i];
fb0e843a AK	326	}
	327
	328	ics_set_kvm_state(ics, 1);
11ad93f6 DG	329	}
11ad93f6 DG	330
100f7388	331	static void ics_kvm_realize(ICSState ics, Error *errp)
11ad93f6	332	{
11ad93f6 DG	333	if (!ics->nr_irqs) {
	334	error_setg(errp, "Number of interrupts needs to be greater 0");
	335	return;
	336	}
	337	ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
11ad93f6	338	ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
7ea6e067	339
100f7388	340	qemu_register_reset(ics_kvm_reset, ics);
11ad93f6 DG	341	}
	342
	343	static void ics_kvm_class_init(ObjectClass klass, void data)
	344	{
d4d7a59a	345	ICSStateClass *icsc = ICS_BASE_CLASS(klass);
11ad93f6	346
4e4169f7	347	icsc->realize = ics_kvm_realize;
11ad93f6 DG	348	icsc->pre_save = ics_get_kvm_state;
	349	icsc->post_load = ics_set_kvm_state;
	350	}
	351
	352	static const TypeInfo ics_kvm_info = {
d4d7a59a BH	353	.name = TYPE_ICS_KVM,
d4d7a59a BH	354	.parent = TYPE_ICS_SIMPLE,
11ad93f6 DG	355	.instance_size = sizeof(ICSState),
	356	.class_init = ics_kvm_class_init,
	357	};
	358
	359	/*
	360	* XICS-KVM
	361	*/
11ad93f6	362
28e02042	363	static void rtas_dummy(PowerPCCPU cpu, sPAPRMachineState spapr,
11ad93f6 DG	364	uint32_t token,
	365	uint32_t nargs, target_ulong args,
	366	uint32_t nret, target_ulong rets)
	367	{
	368	error_report("pseries: %s must never be called for in-kernel XICS",
	369	__func__);
	370	}
	371
2192a930	372	int xics_kvm_init(sPAPRMachineState spapr, Error *errp)
11ad93f6	373	{
817bb6a4	374	int rc;
11ad93f6 DG	375	struct kvm_create_device xics_create_device = {
	376	.type = KVM_DEV_TYPE_XICS,
	377	.flags = 0,
	378	};
	379
	380	if (!kvm_enabled() \|\| !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
	381	error_setg(errp,
	382	"KVM and IRQ_XICS capability must be present for in-kernel XICS");
	383	goto fail;
	384	}
	385
3a3b8502 AK	386	spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
	387	spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
	388	spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
	389	spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
11ad93f6	390
3a3b8502	391	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
11ad93f6 DG	392	if (rc < 0) {
	393	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
	394	goto fail;
	395	}
	396
3a3b8502	397	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
11ad93f6 DG	398	if (rc < 0) {
	399	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
	400	goto fail;
	401	}
	402
3a3b8502	403	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
11ad93f6 DG	404	if (rc < 0) {
	405	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
	406	goto fail;
	407	}
	408
3a3b8502	409	rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
11ad93f6 DG	410	if (rc < 0) {
	411	error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
	412	goto fail;
	413	}
	414
	415	/* Create the kernel ICP */
	416	rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
	417	if (rc < 0) {
	418	error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
	419	goto fail;
	420	}
	421
729f8a4f	422	kernel_xics_fd = xics_create_device.fd;
11ad93f6	423
9554233c	424	kvm_kernel_irqchip = true;
9554233c AK	425	kvm_msi_via_irqfd_allowed = true;
	426	kvm_gsi_direct_mapping = true;
	427
2192a930	428	return rc;
11ad93f6 DG	429
	430	fail:
	431	kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
	432	kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
	433	kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
	434	kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
2192a930	435	return -1;
11ad93f6 DG	436	}
11ad93f6 DG	437
11ad93f6 DG	438	static void xics_kvm_register_types(void)
11ad93f6 DG	439	{
11ad93f6 DG	440	type_register_static(&ics_kvm_info);
	441	type_register_static(&icp_kvm_info);
	442	}
	443
	444	type_init(xics_kvm_register_types)