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CommitLineData
11ad93f6
DG
1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
5 *
6 * Copyright (c) 2013 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
27
0d75590d 28#include "qemu/osdep.h"
da34e65c 29#include "qapi/error.h"
4771d756
PB
30#include "qemu-common.h"
31#include "cpu.h"
11ad93f6
DG
32#include "hw/hw.h"
33#include "trace.h"
77ac58dd 34#include "sysemu/kvm.h"
11ad93f6 35#include "hw/ppc/spapr.h"
3f777abc 36#include "hw/ppc/spapr_cpu_core.h"
11ad93f6 37#include "hw/ppc/xics.h"
a51d5afc 38#include "hw/ppc/xics_spapr.h"
11ad93f6
DG
39#include "kvm_ppc.h"
40#include "qemu/config-file.h"
41#include "qemu/error-report.h"
42
43#include <sys/ioctl.h>
44
729f8a4f
CLG
45static int kernel_xics_fd = -1;
46
de86eccc
GK
47typedef struct KVMEnabledICP {
48 unsigned long vcpu_id;
49 QLIST_ENTRY(KVMEnabledICP) node;
50} KVMEnabledICP;
51
52static QLIST_HEAD(, KVMEnabledICP)
53 kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);
54
56b11587
CLG
55static void kvm_disable_icps(void)
56{
57 KVMEnabledICP *enabled_icp, *next;
58
59 QLIST_FOREACH_SAFE(enabled_icp, &kvm_enabled_icps, node, next) {
60 QLIST_REMOVE(enabled_icp, node);
61 g_free(enabled_icp);
62 }
63}
64
11ad93f6
DG
65/*
66 * ICP-KVM
67 */
0e5c7fad 68void icp_get_kvm_state(ICPState *icp)
11ad93f6
DG
69{
70 uint64_t state;
11ad93f6
DG
71 int ret;
72
3bf84e99
CLG
73 /* The KVM XICS device is not in use */
74 if (kernel_xics_fd == -1) {
75 return;
76 }
77
11ad93f6 78 /* ICP for this CPU thread is not in use, exiting */
8e4fba20 79 if (!icp->cs) {
11ad93f6
DG
80 return;
81 }
82
bf358b54 83 ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
11ad93f6
DG
84 if (ret != 0) {
85 error_report("Unable to retrieve KVM interrupt controller state"
8e4fba20 86 " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
11ad93f6
DG
87 exit(1);
88 }
89
8e4fba20
CLG
90 icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
91 icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
11ad93f6 92 & KVM_REG_PPC_ICP_MFRR_MASK;
8e4fba20 93 icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
11ad93f6
DG
94 & KVM_REG_PPC_ICP_PPRI_MASK;
95}
96
dcb556fc
GK
97static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg)
98{
99 icp_get_kvm_state(arg.host_ptr);
100}
101
0e5c7fad 102void icp_synchronize_state(ICPState *icp)
dcb556fc
GK
103{
104 if (icp->cs) {
105 run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp));
106 }
107}
108
0e5c7fad 109int icp_set_kvm_state(ICPState *icp)
11ad93f6
DG
110{
111 uint64_t state;
11ad93f6
DG
112 int ret;
113
3bf84e99
CLG
114 /* The KVM XICS device is not in use */
115 if (kernel_xics_fd == -1) {
116 return 0;
117 }
118
11ad93f6 119 /* ICP for this CPU thread is not in use, exiting */
8e4fba20 120 if (!icp->cs) {
11ad93f6
DG
121 return 0;
122 }
123
8e4fba20
CLG
124 state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
125 | ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
126 | ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
11ad93f6 127
bf358b54 128 ret = kvm_set_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
11ad93f6
DG
129 if (ret != 0) {
130 error_report("Unable to restore KVM interrupt controller state (0x%"
8e4fba20 131 PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
11ad93f6
DG
132 strerror(errno));
133 return ret;
134 }
135
136 return 0;
137}
138
8e6e6efe 139void icp_kvm_realize(DeviceState *dev, Error **errp)
f0232434 140{
a028dd42 141 ICPState *icp = ICP(dev);
a028dd42 142 CPUState *cs;
de86eccc 143 KVMEnabledICP *enabled_icp;
a028dd42 144 unsigned long vcpu_id;
f0232434
CLG
145 int ret;
146
3bf84e99 147 /* The KVM XICS device is not in use */
f0232434 148 if (kernel_xics_fd == -1) {
3bf84e99 149 return;
f0232434
CLG
150 }
151
a028dd42
CLG
152 cs = icp->cs;
153 vcpu_id = kvm_arch_vcpu_id(cs);
154
f0232434
CLG
155 /*
156 * If we are reusing a parked vCPU fd corresponding to the CPU
157 * which was hot-removed earlier we don't have to renable
158 * KVM_CAP_IRQ_XICS capability again.
159 */
de86eccc
GK
160 QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
161 if (enabled_icp->vcpu_id == vcpu_id) {
162 return;
163 }
f0232434
CLG
164 }
165
de86eccc 166 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
f0232434 167 if (ret < 0) {
b1fd36c3
GK
168 error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
169 strerror(errno));
170 return;
f0232434 171 }
de86eccc
GK
172 enabled_icp = g_malloc(sizeof(*enabled_icp));
173 enabled_icp->vcpu_id = vcpu_id;
174 QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
f0232434
CLG
175}
176
11ad93f6
DG
177/*
178 * ICS-KVM
179 */
d80b2ccf 180void ics_get_kvm_state(ICSState *ics)
11ad93f6 181{
11ad93f6 182 uint64_t state;
11ad93f6
DG
183 int i;
184
3bf84e99
CLG
185 /* The KVM XICS device is not in use */
186 if (kernel_xics_fd == -1) {
187 return;
188 }
189
11ad93f6
DG
190 for (i = 0; i < ics->nr_irqs; i++) {
191 ICSIRQState *irq = &ics->irqs[i];
11ad93f6 192
bf358b54 193 kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
50beeb68 194 i + ics->offset, &state, false, &error_fatal);
11ad93f6
DG
195
196 irq->server = state & KVM_XICS_DESTINATION_MASK;
197 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
198 & KVM_XICS_PRIORITY_MASK;
199 /*
200 * To be consistent with the software emulation in xics.c, we
201 * split out the masked state + priority that we get from the
202 * kernel into 'current priority' (0xff if masked) and
203 * 'saved priority' (if masked, this is the priority the
204 * interrupt had before it was masked). Masking and unmasking
205 * are done with the ibm,int-off and ibm,int-on RTAS calls.
206 */
207 if (state & KVM_XICS_MASKED) {
208 irq->priority = 0xff;
209 } else {
210 irq->priority = irq->saved_priority;
211 }
212
063cb7cb 213 irq->status = 0;
11ad93f6
DG
214 if (state & KVM_XICS_PENDING) {
215 if (state & KVM_XICS_LEVEL_SENSITIVE) {
216 irq->status |= XICS_STATUS_ASSERTED;
217 } else {
218 /*
219 * A pending edge-triggered interrupt (or MSI)
220 * must have been rejected previously when we
221 * first detected it and tried to deliver it,
222 * so mark it as pending and previously rejected
223 * for consistency with how xics.c works.
224 */
225 irq->status |= XICS_STATUS_MASKED_PENDING
226 | XICS_STATUS_REJECTED;
227 }
228 }
229e16fd
SB
229 if (state & KVM_XICS_PRESENTED) {
230 irq->status |= XICS_STATUS_PRESENTED;
231 }
232 if (state & KVM_XICS_QUEUED) {
233 irq->status |= XICS_STATUS_QUEUED;
234 }
11ad93f6
DG
235 }
236}
237
d80b2ccf 238void ics_synchronize_state(ICSState *ics)
dcb556fc
GK
239{
240 ics_get_kvm_state(ics);
241}
242
6cead90c 243int ics_set_kvm_state_one(ICSState *ics, int srcno)
11ad93f6 244{
11ad93f6 245 uint64_t state;
bf358b54 246 Error *local_err = NULL;
6cead90c
GK
247 ICSIRQState *irq = &ics->irqs[srcno];
248 int ret;
11ad93f6 249
3bf84e99
CLG
250 /* The KVM XICS device is not in use */
251 if (kernel_xics_fd == -1) {
252 return 0;
253 }
254
6cead90c
GK
255 state = irq->server;
256 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
257 << KVM_XICS_PRIORITY_SHIFT;
258 if (irq->priority != irq->saved_priority) {
259 assert(irq->priority == 0xff);
260 state |= KVM_XICS_MASKED;
261 }
11ad93f6 262
6cead90c
GK
263 if (irq->flags & XICS_FLAGS_IRQ_LSI) {
264 state |= KVM_XICS_LEVEL_SENSITIVE;
265 if (irq->status & XICS_STATUS_ASSERTED) {
266 state |= KVM_XICS_PENDING;
11ad93f6 267 }
6cead90c
GK
268 } else {
269 if (irq->status & XICS_STATUS_MASKED_PENDING) {
270 state |= KVM_XICS_PENDING;
229e16fd 271 }
6cead90c
GK
272 }
273 if (irq->status & XICS_STATUS_PRESENTED) {
274 state |= KVM_XICS_PRESENTED;
275 }
276 if (irq->status & XICS_STATUS_QUEUED) {
277 state |= KVM_XICS_QUEUED;
278 }
279
280 ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
281 srcno + ics->offset, &state, true, &local_err);
282 if (local_err) {
283 error_report_err(local_err);
284 return ret;
285 }
286
287 return 0;
288}
289
290int ics_set_kvm_state(ICSState *ics)
291{
292 int i;
293
3bf84e99
CLG
294 /* The KVM XICS device is not in use */
295 if (kernel_xics_fd == -1) {
296 return 0;
297 }
298
6cead90c
GK
299 for (i = 0; i < ics->nr_irqs; i++) {
300 int ret;
11ad93f6 301
6cead90c
GK
302 ret = ics_set_kvm_state_one(ics, i);
303 if (ret) {
11ad93f6
DG
304 return ret;
305 }
306 }
307
308 return 0;
309}
310
557b4567 311void ics_kvm_set_irq(ICSState *ics, int srcno, int val)
11ad93f6 312{
11ad93f6
DG
313 struct kvm_irq_level args;
314 int rc;
315
3bf84e99
CLG
316 /* The KVM XICS device should be in use */
317 assert(kernel_xics_fd != -1);
318
11ad93f6 319 args.irq = srcno + ics->offset;
4af88944 320 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
11ad93f6
DG
321 if (!val) {
322 return;
323 }
324 args.level = KVM_INTERRUPT_SET;
325 } else {
326 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
327 }
328 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
329 if (rc < 0) {
330 perror("kvm_irq_line");
331 }
332}
333
ce2918cb 334int xics_kvm_init(SpaprMachineState *spapr, Error **errp)
11ad93f6 335{
817bb6a4 336 int rc;
3f777abc
CLG
337 CPUState *cs;
338 Error *local_err = NULL;
339
340 /*
341 * The KVM XICS device already in use. This is the case when
342 * rebooting under the XICS-only interrupt mode.
343 */
344 if (kernel_xics_fd != -1) {
345 return 0;
346 }
11ad93f6
DG
347
348 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
349 error_setg(errp,
350 "KVM and IRQ_XICS capability must be present for in-kernel XICS");
351 goto fail;
352 }
353
3a3b8502 354 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
11ad93f6
DG
355 if (rc < 0) {
356 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
357 goto fail;
358 }
359
3a3b8502 360 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
11ad93f6
DG
361 if (rc < 0) {
362 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
363 goto fail;
364 }
365
3a3b8502 366 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
11ad93f6
DG
367 if (rc < 0) {
368 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
369 goto fail;
370 }
371
3a3b8502 372 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
11ad93f6
DG
373 if (rc < 0) {
374 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
375 goto fail;
376 }
377
bf358b54
CLG
378 /* Create the KVM XICS device */
379 rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
11ad93f6
DG
380 if (rc < 0) {
381 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
382 goto fail;
383 }
384
bf358b54 385 kernel_xics_fd = rc;
9554233c 386 kvm_kernel_irqchip = true;
9554233c
AK
387 kvm_msi_via_irqfd_allowed = true;
388 kvm_gsi_direct_mapping = true;
389
3f777abc
CLG
390 /* Create the presenters */
391 CPU_FOREACH(cs) {
392 PowerPCCPU *cpu = POWERPC_CPU(cs);
393
394 icp_kvm_realize(DEVICE(spapr_cpu_state(cpu)->icp), &local_err);
395 if (local_err) {
396 error_propagate(errp, local_err);
397 goto fail;
398 }
399 }
400
401 /* Update the KVM sources */
402 ics_set_kvm_state(spapr->ics);
403
404 /* Connect the presenters to the initial VCPUs of the machine */
405 CPU_FOREACH(cs) {
406 PowerPCCPU *cpu = POWERPC_CPU(cs);
407 icp_set_kvm_state(spapr_cpu_state(cpu)->icp);
408 }
409
bf358b54 410 return 0;
11ad93f6
DG
411
412fail:
413 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
414 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
415 kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
416 kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
2192a930 417 return -1;
11ad93f6 418}
56b11587
CLG
419
420void xics_kvm_disconnect(SpaprMachineState *spapr, Error **errp)
421{
422 /* The KVM XICS device is not in use */
423 if (kernel_xics_fd == -1) {
424 return;
425 }
426
427 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
428 error_setg(errp,
429 "KVM and IRQ_XICS capability must be present for KVM XICS device");
430 return;
431 }
432
433 /*
434 * Only on P9 using the XICS-on XIVE KVM device:
435 *
436 * When the KVM device fd is closed, the device is destroyed and
437 * removed from the list of devices of the VM. The VCPU presenters
438 * are also detached from the device.
439 */
440 close(kernel_xics_fd);
441 kernel_xics_fd = -1;
442
56b11587
CLG
443 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
444 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
445 kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
446 kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
447
448 kvm_kernel_irqchip = false;
449 kvm_msi_via_irqfd_allowed = false;
450 kvm_gsi_direct_mapping = false;
451
452 /* Clear the presenter from the VCPUs */
453 kvm_disable_icps();
454}