]>
Commit | Line | Data |
---|---|---|
121d0712 MA |
1 | #ifndef QEMU_HW_MILKYMIST_HW_H |
2 | #define QEMU_HW_MILKYMIST_HW_H | |
38d33393 | 3 | |
a27bd6c7 | 4 | #include "hw/qdev-core.h" |
1422e32d | 5 | #include "net/net.h" |
3e80f690 | 6 | #include "qapi/error.h" |
57aa265d | 7 | |
a8170e5e | 8 | static inline DeviceState *milkymist_uart_create(hwaddr base, |
e269fbe2 | 9 | qemu_irq irq, |
0ec7b3e7 | 10 | Chardev *chr) |
38d33393 MW |
11 | { |
12 | DeviceState *dev; | |
13 | ||
3e80f690 | 14 | dev = qdev_new("milkymist-uart"); |
e269fbe2 | 15 | qdev_prop_set_chr(dev, "chardev", chr); |
3c6ef471 | 16 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d AF |
17 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
18 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); | |
38d33393 MW |
19 | |
20 | return dev; | |
21 | } | |
22 | ||
a8170e5e | 23 | static inline DeviceState *milkymist_hpdmc_create(hwaddr base) |
38d33393 MW |
24 | { |
25 | DeviceState *dev; | |
26 | ||
3e80f690 | 27 | dev = qdev_new("milkymist-hpdmc"); |
3c6ef471 | 28 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d | 29 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
38d33393 MW |
30 | |
31 | return dev; | |
32 | } | |
33 | ||
a8170e5e | 34 | static inline DeviceState *milkymist_memcard_create(hwaddr base) |
38d33393 MW |
35 | { |
36 | DeviceState *dev; | |
37 | ||
3e80f690 | 38 | dev = qdev_new("milkymist-memcard"); |
3c6ef471 | 39 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d | 40 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
38d33393 MW |
41 | |
42 | return dev; | |
43 | } | |
44 | ||
a8170e5e | 45 | static inline DeviceState *milkymist_vgafb_create(hwaddr base, |
38d33393 MW |
46 | uint32_t fb_offset, uint32_t fb_mask) |
47 | { | |
48 | DeviceState *dev; | |
49 | ||
3e80f690 | 50 | dev = qdev_new("milkymist-vgafb"); |
38d33393 MW |
51 | qdev_prop_set_uint32(dev, "fb_offset", fb_offset); |
52 | qdev_prop_set_uint32(dev, "fb_mask", fb_mask); | |
3c6ef471 | 53 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d | 54 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
38d33393 MW |
55 | |
56 | return dev; | |
57 | } | |
58 | ||
a8170e5e | 59 | static inline DeviceState *milkymist_sysctl_create(hwaddr base, |
38d33393 MW |
60 | qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq, |
61 | uint32_t freq_hz, uint32_t system_id, uint32_t capabilities, | |
62 | uint32_t gpio_strappings) | |
63 | { | |
64 | DeviceState *dev; | |
65 | ||
3e80f690 | 66 | dev = qdev_new("milkymist-sysctl"); |
38d33393 MW |
67 | qdev_prop_set_uint32(dev, "frequency", freq_hz); |
68 | qdev_prop_set_uint32(dev, "systemid", system_id); | |
69 | qdev_prop_set_uint32(dev, "capabilities", capabilities); | |
70 | qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings); | |
3c6ef471 | 71 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d AF |
72 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
73 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq); | |
74 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq); | |
75 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq); | |
38d33393 MW |
76 | |
77 | return dev; | |
78 | } | |
79 | ||
a8170e5e | 80 | static inline DeviceState *milkymist_pfpu_create(hwaddr base, |
38d33393 MW |
81 | qemu_irq irq) |
82 | { | |
83 | DeviceState *dev; | |
84 | ||
3e80f690 | 85 | dev = qdev_new("milkymist-pfpu"); |
3c6ef471 | 86 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d AF |
87 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
88 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); | |
38d33393 MW |
89 | return dev; |
90 | } | |
91 | ||
a8170e5e | 92 | static inline DeviceState *milkymist_ac97_create(hwaddr base, |
38d33393 MW |
93 | qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq, |
94 | qemu_irq dmaw_irq) | |
95 | { | |
96 | DeviceState *dev; | |
97 | ||
3e80f690 | 98 | dev = qdev_new("milkymist-ac97"); |
3c6ef471 | 99 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d AF |
100 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
101 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq); | |
102 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq); | |
103 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq); | |
104 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq); | |
38d33393 MW |
105 | |
106 | return dev; | |
107 | } | |
108 | ||
a8170e5e AK |
109 | static inline DeviceState *milkymist_minimac2_create(hwaddr base, |
110 | hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq) | |
57aa265d MW |
111 | { |
112 | DeviceState *dev; | |
113 | ||
114 | qemu_check_nic_model(&nd_table[0], "minimac2"); | |
3e80f690 | 115 | dev = qdev_new("milkymist-minimac2"); |
57aa265d | 116 | qdev_set_nic_properties(dev, &nd_table[0]); |
3c6ef471 | 117 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d | 118 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
20cf850c | 119 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base); |
1356b98d AF |
120 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq); |
121 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq); | |
57aa265d MW |
122 | |
123 | return dev; | |
124 | } | |
125 | ||
a8170e5e | 126 | static inline DeviceState *milkymist_softusb_create(hwaddr base, |
38d33393 MW |
127 | qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size, |
128 | uint32_t dmem_base, uint32_t dmem_size) | |
129 | { | |
130 | DeviceState *dev; | |
131 | ||
3e80f690 | 132 | dev = qdev_new("milkymist-softusb"); |
38d33393 | 133 | qdev_prop_set_uint32(dev, "pmem_size", pmem_size); |
38d33393 | 134 | qdev_prop_set_uint32(dev, "dmem_size", dmem_size); |
3c6ef471 | 135 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
1356b98d | 136 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); |
c34e1205 PM |
137 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base); |
138 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base); | |
1356b98d | 139 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); |
38d33393 MW |
140 | |
141 | return dev; | |
142 | } | |
143 | ||
121d0712 | 144 | #endif /* QEMU_HW_MILKYMIST_HW_H */ |